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31 lines
594 B
C
31 lines
594 B
C
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/** @file
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AsmDisableCache function
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Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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/**
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Set CD bit and clear NW bit of CR0 followed by a WBINVD.
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Disables the caches by setting the CD bit of CR0 to 1, clearing the NW bit of CR0 to 0,
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and executing a WBINVD instruction. This function is only available on IA-32 and x64.
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**/
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VOID
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EFIAPI
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AsmDisableCache (
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VOID
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)
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{
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_asm {
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mov eax, cr0
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bts eax, 30
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btr eax, 29
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mov cr0, eax
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wbinvd
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}
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}
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