mirror of
https://github.com/CloverHackyColor/CloverBootloader.git
synced 2024-12-26 16:47:40 +01:00
312 lines
11 KiB
C
312 lines
11 KiB
C
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/** @file
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This driver installs Single Segment Pci Configuration 2 PPI
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to provide read, write and modify access to Pci configuration space in PEI phase.
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To follow PI specification, these services also support access to the unaligned Pci address.
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Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include <PiPei.h>
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#include <Ppi/PciCfg2.h>
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#include <Library/BaseLib.h>
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#include <Library/DebugLib.h>
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#include <Library/PciLib.h>
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#include <Library/PeimEntryPoint.h>
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#include <Library/PeiServicesLib.h>
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#include <IndustryStandard/Pci.h>
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/**
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Convert EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS to PCI_LIB_ADDRESS.
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@param Address PCI address with EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS format.
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@return PCI address with PCI_LIB_ADDRESS format.
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**/
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UINTN
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PciCfgAddressConvert (
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EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *Address
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)
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{
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if (Address->ExtendedRegister == 0) {
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return PCI_LIB_ADDRESS (Address->Bus, Address->Device, Address->Function, Address->Register);
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}
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return PCI_LIB_ADDRESS (Address->Bus, Address->Device, Address->Function, Address->ExtendedRegister);
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}
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/**
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Reads from a given location in the PCI configuration space.
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@param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.
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@param This Pointer to local data for the interface.
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@param Width The width of the access. Enumerated in bytes.
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See EFI_PEI_PCI_CFG_PPI_WIDTH above.
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@param Address The physical address of the access. The format of
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the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.
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@param Buffer A pointer to the buffer of data.
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@retval EFI_SUCCESS The function completed successfully.
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@retval EFI_INVALID_PARAMETER The invalid access width.
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**/
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EFI_STATUS
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EFIAPI
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PciCfg2Read (
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IN CONST EFI_PEI_SERVICES **PeiServices,
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IN CONST EFI_PEI_PCI_CFG2_PPI *This,
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IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,
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IN UINT64 Address,
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IN OUT VOID *Buffer
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)
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{
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UINTN PciLibAddress;
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PciLibAddress = PciCfgAddressConvert ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &Address);
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if (Width == EfiPeiPciCfgWidthUint8) {
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*((UINT8 *) Buffer) = PciRead8 (PciLibAddress);
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} else if (Width == EfiPeiPciCfgWidthUint16) {
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if ((PciLibAddress & 0x01) == 0) {
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//
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// Aligned Pci address access
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//
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WriteUnaligned16 (((UINT16 *) Buffer), PciRead16 (PciLibAddress));
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} else {
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//
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// Unaligned Pci address access, break up the request into byte by byte.
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//
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*((UINT8 *) Buffer) = PciRead8 (PciLibAddress);
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*((UINT8 *) Buffer + 1) = PciRead8 (PciLibAddress + 1);
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}
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} else if (Width == EfiPeiPciCfgWidthUint32) {
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if ((PciLibAddress & 0x03) == 0) {
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//
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// Aligned Pci address access
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//
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WriteUnaligned32 (((UINT32 *) Buffer), PciRead32 (PciLibAddress));
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} else if ((PciLibAddress & 0x01) == 0) {
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//
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// Unaligned Pci address access, break up the request into word by word.
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//
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WriteUnaligned16 (((UINT16 *) Buffer), PciRead16 (PciLibAddress));
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WriteUnaligned16 (((UINT16 *) Buffer + 1), PciRead16 (PciLibAddress + 2));
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} else {
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//
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// Unaligned Pci address access, break up the request into byte by byte.
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//
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*((UINT8 *) Buffer) = PciRead8 (PciLibAddress);
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*((UINT8 *) Buffer + 1) = PciRead8 (PciLibAddress + 1);
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*((UINT8 *) Buffer + 2) = PciRead8 (PciLibAddress + 2);
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*((UINT8 *) Buffer + 3) = PciRead8 (PciLibAddress + 3);
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}
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} else {
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return EFI_INVALID_PARAMETER;
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}
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return EFI_SUCCESS;
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}
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/**
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Write to a given location in the PCI configuration space.
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@param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.
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@param This Pointer to local data for the interface.
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@param Width The width of the access. Enumerated in bytes.
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See EFI_PEI_PCI_CFG_PPI_WIDTH above.
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@param Address The physical address of the access. The format of
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the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.
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@param Buffer A pointer to the buffer of data.
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@retval EFI_SUCCESS The function completed successfully.
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@retval EFI_INVALID_PARAMETER The invalid access width.
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**/
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EFI_STATUS
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EFIAPI
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PciCfg2Write (
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IN CONST EFI_PEI_SERVICES **PeiServices,
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IN CONST EFI_PEI_PCI_CFG2_PPI *This,
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IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,
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IN UINT64 Address,
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IN OUT VOID *Buffer
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)
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{
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UINTN PciLibAddress;
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PciLibAddress = PciCfgAddressConvert ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &Address);
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if (Width == EfiPeiPciCfgWidthUint8) {
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PciWrite8 (PciLibAddress, *((UINT8 *) Buffer));
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} else if (Width == EfiPeiPciCfgWidthUint16) {
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if ((PciLibAddress & 0x01) == 0) {
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//
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// Aligned Pci address access
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//
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PciWrite16 (PciLibAddress, ReadUnaligned16 ((UINT16 *) Buffer));
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} else {
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//
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// Unaligned Pci address access, break up the request into byte by byte.
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//
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PciWrite8 (PciLibAddress, *((UINT8 *) Buffer));
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PciWrite8 (PciLibAddress + 1, *((UINT8 *) Buffer + 1));
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}
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} else if (Width == EfiPeiPciCfgWidthUint32) {
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if ((PciLibAddress & 0x03) == 0) {
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//
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// Aligned Pci address access
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//
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PciWrite32 (PciLibAddress, ReadUnaligned32 ((UINT32 *) Buffer));
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} else if ((PciLibAddress & 0x01) == 0) {
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//
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// Unaligned Pci address access, break up the request into word by word.
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//
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PciWrite16 (PciLibAddress, ReadUnaligned16 ((UINT16 *) Buffer));
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PciWrite16 (PciLibAddress + 2, ReadUnaligned16 ((UINT16 *) Buffer + 1));
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} else {
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//
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// Unaligned Pci address access, break up the request into byte by byte.
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//
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PciWrite8 (PciLibAddress, *((UINT8 *) Buffer));
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PciWrite8 (PciLibAddress + 1, *((UINT8 *) Buffer + 1));
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PciWrite8 (PciLibAddress + 2, *((UINT8 *) Buffer + 2));
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PciWrite8 (PciLibAddress + 3, *((UINT8 *) Buffer + 3));
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}
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} else {
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return EFI_INVALID_PARAMETER;
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}
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return EFI_SUCCESS;
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}
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/**
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This function performs a read-modify-write operation on the contents from a given
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location in the PCI configuration space.
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@param PeiServices An indirect pointer to the PEI Services Table
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published by the PEI Foundation.
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@param This Pointer to local data for the interface.
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@param Width The width of the access. Enumerated in bytes. Type
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EFI_PEI_PCI_CFG_PPI_WIDTH is defined in Read().
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@param Address The physical address of the access.
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@param SetBits Points to value to bitwise-OR with the read configuration value.
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The size of the value is determined by Width.
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@param ClearBits Points to the value to negate and bitwise-AND with the read configuration value.
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The size of the value is determined by Width.
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@retval EFI_SUCCESS The function completed successfully.
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@retval EFI_INVALID_PARAMETER The invalid access width.
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**/
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EFI_STATUS
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EFIAPI
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PciCfg2Modify (
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IN CONST EFI_PEI_SERVICES **PeiServices,
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IN CONST EFI_PEI_PCI_CFG2_PPI *This,
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IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,
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IN UINT64 Address,
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IN VOID *SetBits,
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IN VOID *ClearBits
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)
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{
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UINTN PciLibAddress;
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UINT16 ClearValue16;
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UINT16 SetValue16;
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UINT32 ClearValue32;
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UINT32 SetValue32;
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PciLibAddress = PciCfgAddressConvert ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &Address);
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if (Width == EfiPeiPciCfgWidthUint8) {
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PciAndThenOr8 (PciLibAddress, (UINT8) (~(*(UINT8 *) ClearBits)), *((UINT8 *) SetBits));
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} else if (Width == EfiPeiPciCfgWidthUint16) {
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if ((PciLibAddress & 0x01) == 0) {
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//
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// Aligned Pci address access
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//
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ClearValue16 = (UINT16) (~ReadUnaligned16 ((UINT16 *) ClearBits));
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SetValue16 = ReadUnaligned16 ((UINT16 *) SetBits);
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PciAndThenOr16 (PciLibAddress, ClearValue16, SetValue16);
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} else {
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//
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// Unaligned Pci address access, break up the request into byte by byte.
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//
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PciAndThenOr8 (PciLibAddress, (UINT8) (~(*(UINT8 *) ClearBits)), *((UINT8 *) SetBits));
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PciAndThenOr8 (PciLibAddress + 1, (UINT8) (~(*((UINT8 *) ClearBits + 1))), *((UINT8 *) SetBits + 1));
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}
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} else if (Width == EfiPeiPciCfgWidthUint32) {
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if ((PciLibAddress & 0x03) == 0) {
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//
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// Aligned Pci address access
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//
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ClearValue32 = (UINT32) (~ReadUnaligned32 ((UINT32 *) ClearBits));
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SetValue32 = ReadUnaligned32 ((UINT32 *) SetBits);
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PciAndThenOr32 (PciLibAddress, ClearValue32, SetValue32);
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} else if ((PciLibAddress & 0x01) == 0) {
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//
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// Unaligned Pci address access, break up the request into word by word.
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//
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ClearValue16 = (UINT16) (~ReadUnaligned16 ((UINT16 *) ClearBits));
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SetValue16 = ReadUnaligned16 ((UINT16 *) SetBits);
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PciAndThenOr16 (PciLibAddress, ClearValue16, SetValue16);
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ClearValue16 = (UINT16) (~ReadUnaligned16 ((UINT16 *) ClearBits + 1));
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SetValue16 = ReadUnaligned16 ((UINT16 *) SetBits + 1);
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PciAndThenOr16 (PciLibAddress + 2, ClearValue16, SetValue16);
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} else {
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//
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// Unaligned Pci address access, break up the request into byte by byte.
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//
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PciAndThenOr8 (PciLibAddress, (UINT8) (~(*(UINT8 *) ClearBits)), *((UINT8 *) SetBits));
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PciAndThenOr8 (PciLibAddress + 1, (UINT8) (~(*((UINT8 *) ClearBits + 1))), *((UINT8 *) SetBits + 1));
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PciAndThenOr8 (PciLibAddress + 2, (UINT8) (~(*((UINT8 *) ClearBits + 2))), *((UINT8 *) SetBits + 2));
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PciAndThenOr8 (PciLibAddress + 3, (UINT8) (~(*((UINT8 *) ClearBits + 3))), *((UINT8 *) SetBits + 3));
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}
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} else {
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return EFI_INVALID_PARAMETER;
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}
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return EFI_SUCCESS;
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}
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EFI_PEI_PCI_CFG2_PPI gPciCfg2Ppi = {
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PciCfg2Read,
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PciCfg2Write,
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PciCfg2Modify,
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0
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};
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EFI_PEI_PPI_DESCRIPTOR gPciCfg2PpiList = {
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(EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
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&gEfiPciCfg2PpiGuid,
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&gPciCfg2Ppi
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};
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/**
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Module's entry function.
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This routine will install EFI_PEI_PCI_CFG2_PPI.
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@param FileHandle Handle of the file being invoked.
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@param PeiServices Describes the list of possible PEI Services.
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@return Whether success to install service.
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**/
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EFI_STATUS
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EFIAPI
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PeimInitializePciCfg (
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IN EFI_PEI_FILE_HANDLE FileHandle,
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IN CONST EFI_PEI_SERVICES **PeiServices
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)
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{
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EFI_STATUS Status;
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(**(EFI_PEI_SERVICES **)PeiServices).PciCfg = &gPciCfg2Ppi;
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Status = PeiServicesInstallPpi (&gPciCfg2PpiList);
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ASSERT_EFI_ERROR (Status);
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return Status;
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}
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