2019-09-03 11:58:42 +02:00
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/*
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* File: HdaController.c
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*
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* Copyright (c) 2018 John Davis
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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2019-11-27 12:16:02 +01:00
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#include <Library/HdaModels.h>
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2019-09-03 11:58:42 +02:00
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#include "HdaController.h"
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#include "HdaControllerComponentName.h"
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VOID
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EFIAPI
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HdaControllerStreamPollTimerHandler(
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IN EFI_EVENT Event,
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IN VOID *Context)
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{
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// Create variables.
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EFI_STATUS Status;
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HDA_STREAM *HdaStream = (HDA_STREAM*)Context;
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EFI_PCI_IO_PROTOCOL *PciIo = HdaStream->HdaControllerDev->PciIo;
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UINT8 HdaStreamSts = 0;
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UINT32 HdaStreamDmaPos;
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UINTN HdaSourceLength;
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UINTN HdaCurrentBlock;
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UINTN HdaNextBlock;
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// Get stream status.
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Status = PciIo->Mem.Read(PciIo, EfiPciIoWidthFifoUint8, PCI_HDA_BAR, HDA_REG_SDNSTS(HdaStream->Index), 1, &HdaStreamSts);
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ASSERT_EFI_ERROR(Status);
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// If there was a FIFO error or DESC error, halt.
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ASSERT ((HdaStreamSts & (HDA_REG_SDNSTS_FIFOE | HDA_REG_SDNSTS_DESE)) == 0);
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// Has the completion bit been set?
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if (HdaStreamSts & HDA_REG_SDNSTS_BCIS) {
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// Are we done playing the stream? If so we can stop now.
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if (HdaStream->BufferSourceDone) {
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// Stop stream.
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Status = HdaControllerSetStream(HdaStream, FALSE);
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ASSERT_EFI_ERROR(Status);
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// Stop timer.
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Status = gBS->SetTimer(HdaStream->PollTimer, TimerCancel, 0);
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ASSERT_EFI_ERROR(Status);
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// Trigger callback.
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if (HdaStream->Callback)
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HdaStream->Callback(HdaStream->Output ? EfiHdaIoTypeOutput : EfiHdaIoTypeInput,
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HdaStream->CallbackContext1, HdaStream->CallbackContext2, HdaStream->CallbackContext3);
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goto CLEAR_BIT;
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}
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// Get stream DMA position.
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HdaStreamDmaPos = HdaStream->HdaControllerDev->DmaPositions[HdaStream->Index].Position;
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HdaCurrentBlock = HdaStreamDmaPos / HDA_BDL_BLOCKSIZE;
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HdaNextBlock = HdaCurrentBlock + 1;
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HdaNextBlock %= HDA_BDL_ENTRY_COUNT;
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// Have we reached the end of the source buffer? If so the stream will stop on the next block.
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if (HdaStream->BufferSourcePosition >= HdaStream->BufferSourceLength) {
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// Zero out next block.
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2020-02-15 15:29:59 +01:00
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SetMem(HdaStream->BufferData + (HdaNextBlock * HDA_BDL_BLOCKSIZE), HDA_BDL_BLOCKSIZE, 0);
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2019-09-03 11:58:42 +02:00
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// Set flag to stop stream on the next block.
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HdaStream->BufferSourceDone = TRUE;
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// DEBUG((DEBUG_INFO, "Block %u of %u is the last! (current position 0x%X, buffer 0x%X)\n",
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// HdaStreamDmaPos / HDA_BDL_BLOCKSIZE, HDA_BDL_ENTRY_COUNT, HdaStreamDmaPos, HdaStream->BufferSourcePosition));
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goto CLEAR_BIT;
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}
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// Determine number of bytes to pull from or push to source data.
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HdaSourceLength = HDA_BDL_BLOCKSIZE;
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if ((HdaStream->BufferSourcePosition + HdaSourceLength) > HdaStream->BufferSourceLength)
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HdaSourceLength = HdaStream->BufferSourceLength - HdaStream->BufferSourcePosition;
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// Is this an output stream (copy data to)?
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if (HdaStream->Output) {
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// Copy data to DMA buffer.
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if (HdaSourceLength < HDA_BDL_BLOCKSIZE)
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2020-02-15 15:29:59 +01:00
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SetMem(HdaStream->BufferData + (HdaNextBlock * HDA_BDL_BLOCKSIZE), HDA_BDL_BLOCKSIZE, 0);
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2020-02-14 05:15:10 +01:00
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CopyMem(HdaStream->BufferData + (HdaNextBlock * HDA_BDL_BLOCKSIZE), HdaStream->BufferSource + HdaStream->BufferSourcePosition, HdaSourceLength);
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2019-09-03 11:58:42 +02:00
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} else { // Input stream (copy data from).
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// Copy data from DMA buffer.
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2020-02-14 05:15:10 +01:00
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CopyMem(HdaStream->BufferSource + HdaStream->BufferSourcePosition, HdaStream->BufferData + (HdaNextBlock * HDA_BDL_BLOCKSIZE), HdaSourceLength);
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2019-09-03 11:58:42 +02:00
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}
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// Increase source position.
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HdaStream->BufferSourcePosition += HdaSourceLength;
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// DEBUG((DEBUG_INFO, "Block %u of %u filled! (current position 0x%X, buffer 0x%X)\n",
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// HdaStreamDmaPos / HDA_BDL_BLOCKSIZE, HDA_BDL_ENTRY_COUNT, HdaStreamDmaPos, HdaStream->BufferSourcePosition));
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CLEAR_BIT:
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// Reset completion bit.
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HdaStreamSts = HDA_REG_SDNSTS_BCIS;
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Status = PciIo->Mem.Write(PciIo, EfiPciIoWidthUint8, PCI_HDA_BAR, HDA_REG_SDNSTS(HdaStream->Index), 1, &HdaStreamSts);
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ASSERT_EFI_ERROR(Status);
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}
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}
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EFI_STATUS
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EFIAPI
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HdaControllerInitPciHw(
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IN HDA_CONTROLLER_DEV *HdaControllerDev)
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{
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// DEBUG((DEBUG_INFO, "HdaControllerInitPciHw(): start\n"));
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// Create variables.
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EFI_STATUS Status;
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EFI_PCI_IO_PROTOCOL *PciIo = HdaControllerDev->PciIo;
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UINT64 PciSupports = 0;
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UINT8 HdaTcSel;
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UINT16 HdaDevC;
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// Get original PCI I/O attributes.
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Status = PciIo->Attributes(PciIo, EfiPciIoAttributeOperationGet, 0, &HdaControllerDev->OriginalPciAttributes);
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if (EFI_ERROR(Status))
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return Status;
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HdaControllerDev->OriginalPciAttributesSaved = TRUE;
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// Get currently supported PCI I/O attributes.
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Status = PciIo->Attributes(PciIo, EfiPciIoAttributeOperationSupported, 0, &PciSupports);
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if (EFI_ERROR(Status))
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return Status;
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// Enable the PCI device.
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PciSupports &= EFI_PCI_DEVICE_ENABLE;
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Status = PciIo->Attributes(PciIo, EfiPciIoAttributeOperationEnable, PciSupports, NULL);
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if (EFI_ERROR(Status))
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return Status;
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// Get vendor and device IDs of PCI device.
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Status = PciIo->Pci.Read(PciIo, EfiPciIoWidthUint32, PCI_VENDOR_ID_OFFSET, 1, &HdaControllerDev->VendorId);
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if (EFI_ERROR (Status))
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return Status;
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// DEBUG((DEBUG_INFO, "HdaControllerInitPciHw(): controller %4X:%4X\n",
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// GET_PCI_VENDOR_ID(HdaControllerDev->VendorId), GET_PCI_DEVICE_ID(HdaControllerDev->VendorId)));
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// Is this an Intel controller?
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if (GET_PCI_VENDOR_ID(HdaControllerDev->VendorId) == VEN_INTEL_ID) {
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// Set TC0 in TCSEL register.
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Status = PciIo->Pci.Read(PciIo, EfiPciIoWidthUint8, PCI_HDA_TCSEL_OFFSET, 1, &HdaTcSel);
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if (EFI_ERROR (Status))
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return Status;
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HdaTcSel &= PCI_HDA_TCSEL_TC0_MASK;
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Status = PciIo->Pci.Write(PciIo, EfiPciIoWidthUint8, PCI_HDA_TCSEL_OFFSET, 1, &HdaTcSel);
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if (EFI_ERROR (Status))
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return Status;
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}
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// Get device control PCI register.
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Status = PciIo->Pci.Read(PciIo, EfiPciIoWidthUint16, PCI_HDA_DEVC_OFFSET, 1, &HdaDevC);
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if (EFI_ERROR (Status))
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return Status;
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// If No Snoop is currently enabled, disable it.
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if (HdaDevC & PCI_HDA_DEVC_NOSNOOPEN) {
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HdaDevC &= ~PCI_HDA_DEVC_NOSNOOPEN;
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Status = PciIo->Pci.Write(PciIo, EfiPciIoWidthUint16, PCI_HDA_DEVC_OFFSET, 1, &HdaDevC);
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if (EFI_ERROR (Status))
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return Status;
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}
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// Get major/minor version.
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Status = PciIo->Mem.Read(PciIo, EfiPciIoWidthUint8, PCI_HDA_BAR, HDA_REG_VMAJ, 1, &HdaControllerDev->MajorVersion);
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if (EFI_ERROR(Status))
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return Status;
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Status = PciIo->Mem.Read(PciIo, EfiPciIoWidthUint8, PCI_HDA_BAR, HDA_REG_VMIN, 1, &HdaControllerDev->MinorVersion);
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if (EFI_ERROR(Status))
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return Status;
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// Validate version. If invalid abort.
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// DEBUG((DEBUG_INFO, "HdaControllerInitPciHw(): controller version %u.%u\n",
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// HdaControllerDev->MajorVersion, HdaControllerDev->MinorVersion));
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if (HdaControllerDev->MajorVersion < HDA_VERSION_MIN_MAJOR) {
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Status = EFI_UNSUPPORTED;
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return Status;
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}
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// Get capabilities.
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Status = PciIo->Mem.Read(PciIo, EfiPciIoWidthUint16, PCI_HDA_BAR, HDA_REG_GCAP, 1, &HdaControllerDev->Capabilities);
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if (EFI_ERROR(Status))
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return Status;
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// DEBUG((DEBUG_INFO, "HdaControllerInitPciHw(): capabilities:\n 64-bit: %s Serial Data Out Signals: %u\n",
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// HdaControllerDev->Capabilities & HDA_REG_GCAP_64OK ? L"Yes" : L"No",
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// HDA_REG_GCAP_NSDO(HdaControllerDev->Capabilities)));
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// DEBUG((DEBUG_INFO, " Bidir streams: %u Input streams: %u Output streams: %u\n",
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// HDA_REG_GCAP_BSS(HdaControllerDev->Capabilities), HDA_REG_GCAP_ISS(HdaControllerDev->Capabilities),
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// HDA_REG_GCAP_OSS(HdaControllerDev->Capabilities)));
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// Success.
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return EFI_SUCCESS;
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}
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EFI_STATUS
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EFIAPI
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HdaControllerReset(
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IN HDA_CONTROLLER_DEV *HdaControllerDev)
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{
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// DEBUG((DEBUG_INFO, "HdaControllerReset(): start\n"));
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// Create variables.
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EFI_STATUS Status;
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EFI_PCI_IO_PROTOCOL *PciIo = HdaControllerDev->PciIo;
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UINT32 HdaGCtl = 0;
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UINT64 Tmp = 0;
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// Get value of CRST bit.
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Status = PciIo->Mem.Read(PciIo, EfiPciIoWidthUint32, PCI_HDA_BAR, HDA_REG_GCTL, 1, &HdaGCtl);
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if (EFI_ERROR(Status))
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return Status;
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// Check if the controller is already in reset. If not, clear bit.
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if (!(HdaGCtl & HDA_REG_GCTL_CRST)) {
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HdaGCtl &= ~HDA_REG_GCTL_CRST;
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Status = PciIo->Mem.Write(PciIo, EfiPciIoWidthUint32, PCI_HDA_BAR, HDA_REG_GCTL, 1, &HdaGCtl);
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if (EFI_ERROR(Status))
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return Status;
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}
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// Set CRST bit to begin the process of coming out of reset.
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HdaGCtl |= HDA_REG_GCTL_CRST;
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Status = PciIo->Mem.Write(PciIo, EfiPciIoWidthUint32, PCI_HDA_BAR, HDA_REG_GCTL, 1, &HdaGCtl);
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if (EFI_ERROR(Status))
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return Status;
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// Wait for bit to be set. Once bit is set, the controller is ready.
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Status = PciIo->PollMem(PciIo, EfiPciIoWidthUint32, PCI_HDA_BAR, HDA_REG_GCTL,
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HDA_REG_GCTL_CRST, HDA_REG_GCTL_CRST, MS_TO_NANOSECOND(100), &Tmp);
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if (EFI_ERROR(Status))
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return Status;
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// Wait 100ms to ensure all codecs have also reset.
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gBS->Stall(MS_TO_MICROSECOND(100));
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// Controller is reset.
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// DEBUG((DEBUG_INFO, "HdaControllerReset(): done\n"));
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return EFI_SUCCESS;
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}
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EFI_STATUS
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EFIAPI
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HdaControllerScanCodecs(
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IN HDA_CONTROLLER_DEV *HdaControllerDev)
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{
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// DEBUG((DEBUG_INFO, "HdaControllerScanCodecs(): start\n"));
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// Create variables.
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EFI_STATUS Status;
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EFI_PCI_IO_PROTOCOL *PciIo;
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UINT16 HdaStatests = 0;
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EFI_HDA_IO_VERB_LIST HdaCodecVerbList;
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UINT32 VendorVerb;
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UINT32 VendorResponse;
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UINT8 i;
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// Streams.
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UINTN CurrentOutputStreamIndex = 0;
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UINTN CurrentInputStreamIndex = 0;
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// Protocols.
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HDA_IO_PRIVATE_DATA *HdaIoPrivateData;
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VOID *TmpProtocol;
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if (!HdaControllerDev) {
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return EFI_INVALID_PARAMETER;
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}
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PciIo = HdaControllerDev->PciIo;
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// Get STATESTS register.
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Status = PciIo->Mem.Read(PciIo, EfiPciIoWidthUint16, PCI_HDA_BAR, HDA_REG_STATESTS, 1, &HdaStatests);
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if (EFI_ERROR(Status))
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return Status;
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// Create verb list with single item.
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VendorVerb = HDA_CODEC_VERB(HDA_VERB_GET_PARAMETER, HDA_PARAMETER_VENDOR_ID);
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2020-02-15 15:29:59 +01:00
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SetMem(&HdaCodecVerbList, sizeof(EFI_HDA_IO_VERB_LIST), 0);
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2019-09-03 11:58:42 +02:00
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HdaCodecVerbList.Count = 1;
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HdaCodecVerbList.Verbs = &VendorVerb;
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HdaCodecVerbList.Responses = &VendorResponse;
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// Iterate through register looking for active codecs.
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for (i = 0; i < HDA_MAX_CODECS; i++) {
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// Do we have a codec at this address?
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if ((HdaStatests & (1 << i))) {
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// DEBUG((DEBUG_INFO, "HdaControllerScanCodecs(): found codec @ 0x%X\n", i));
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// Try to get the vendor ID. If this fails, ignore the codec.
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VendorResponse = 0;
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Status = HdaControllerSendCommands(HdaControllerDev, i, HDA_NID_ROOT, &HdaCodecVerbList);
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if ((EFI_ERROR(Status)) || (VendorResponse == 0))
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continue;
|
|
|
|
|
|
|
|
// Create HDA I/O protocol private data structure.
|
|
|
|
HdaIoPrivateData = AllocateZeroPool(sizeof(HDA_IO_PRIVATE_DATA));
|
|
|
|
if (HdaIoPrivateData == NULL) {
|
|
|
|
Status = EFI_OUT_OF_RESOURCES;
|
|
|
|
goto FREE_CODECS;
|
|
|
|
}
|
|
|
|
|
|
|
|
// Fill HDA I/O protocol private data structure.
|
|
|
|
HdaIoPrivateData->Signature = HDA_CONTROLLER_PRIVATE_DATA_SIGNATURE;
|
|
|
|
HdaIoPrivateData->HdaCodecAddress = i;
|
|
|
|
HdaIoPrivateData->HdaControllerDev = HdaControllerDev;
|
|
|
|
HdaIoPrivateData->HdaIo.GetAddress = HdaControllerHdaIoGetAddress;
|
|
|
|
HdaIoPrivateData->HdaIo.SendCommand = HdaControllerHdaIoSendCommand;
|
|
|
|
HdaIoPrivateData->HdaIo.SetupStream = HdaControllerHdaIoSetupStream;
|
|
|
|
HdaIoPrivateData->HdaIo.CloseStream = HdaControllerHdaIoCloseStream;
|
|
|
|
HdaIoPrivateData->HdaIo.GetStream = HdaControllerHdaIoGetStream;
|
|
|
|
HdaIoPrivateData->HdaIo.StartStream = HdaControllerHdaIoStartStream;
|
|
|
|
HdaIoPrivateData->HdaIo.StopStream = HdaControllerHdaIoStopStream;
|
|
|
|
|
|
|
|
// Assign output stream.
|
|
|
|
if (CurrentOutputStreamIndex < HdaControllerDev->OutputStreamsCount) {
|
|
|
|
// DEBUG((DEBUG_INFO, "Assigning output stream %u to codec\n", CurrentOutputStreamIndex));
|
|
|
|
HdaIoPrivateData->HdaOutputStream = HdaControllerDev->OutputStreams + CurrentOutputStreamIndex;
|
|
|
|
CurrentOutputStreamIndex++;
|
|
|
|
}
|
|
|
|
|
|
|
|
// Assign input stream.
|
|
|
|
if (CurrentInputStreamIndex < HdaControllerDev->InputStreamsCount) {
|
|
|
|
// DEBUG((DEBUG_INFO, "Assigning input stream %u to codec\n", CurrentInputStreamIndex));
|
|
|
|
HdaIoPrivateData->HdaInputStream = HdaControllerDev->InputStreams + CurrentInputStreamIndex;
|
|
|
|
CurrentInputStreamIndex++;
|
|
|
|
}
|
|
|
|
|
|
|
|
// Add to array.
|
|
|
|
HdaControllerDev->HdaIoChildren[i].PrivateData = HdaIoPrivateData;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
// Clear STATESTS register.
|
|
|
|
HdaStatests = HDA_REG_STATESTS_CLEAR;
|
|
|
|
Status = PciIo->Mem.Write(PciIo, EfiPciIoWidthUint16, PCI_HDA_BAR, HDA_REG_STATESTS, 1, &HdaStatests);
|
|
|
|
if (EFI_ERROR(Status))
|
|
|
|
return Status;
|
|
|
|
|
|
|
|
// Install protocols on each codec.
|
|
|
|
|
|
|
|
for (i = 0; i < HDA_MAX_CODECS; i++) {
|
|
|
|
// Do we have a codec at this address?
|
|
|
|
if (HdaControllerDev->HdaIoChildren[i].PrivateData != NULL) {
|
|
|
|
// Create Device Path for codec.
|
|
|
|
EFI_HDA_IO_DEVICE_PATH HdaIoDevicePathNode; //EFI_HDA_IO_DEVICE_PATH_TEMPLATE;
|
|
|
|
HdaIoDevicePathNode.Header.Type = MESSAGING_DEVICE_PATH;
|
|
|
|
HdaIoDevicePathNode.Header.SubType = MSG_VENDOR_DP;
|
|
|
|
HdaIoDevicePathNode.Header.Length[0] = (UINT8)(sizeof(EFI_HDA_IO_DEVICE_PATH));
|
|
|
|
HdaIoDevicePathNode.Header.Length[1] = (UINT8)((sizeof(EFI_HDA_IO_DEVICE_PATH)) >> 8);
|
|
|
|
HdaIoDevicePathNode.Guid = gEfiHdaIoDevicePathGuid;
|
2020-02-14 05:15:10 +01:00
|
|
|
// CopyMem((VOID*)&HdaIoDevicePathNode.Guid, (VOID*)&gEfiHdaIoDevicePathGuid, sizeof(EFI_GUID));
|
2019-09-03 11:58:42 +02:00
|
|
|
HdaIoDevicePathNode.Address = i;
|
|
|
|
HdaControllerDev->HdaIoChildren[i].DevicePath = AppendDevicePathNode(HdaControllerDev->DevicePath, (EFI_DEVICE_PATH_PROTOCOL*)&HdaIoDevicePathNode);
|
|
|
|
if (HdaControllerDev->HdaIoChildren[i].DevicePath == NULL) {
|
|
|
|
Status = EFI_INVALID_PARAMETER;
|
|
|
|
goto FREE_CODECS;
|
|
|
|
}
|
|
|
|
|
|
|
|
// Install protocols for the codec. The codec driver will later bind to this.
|
|
|
|
HdaControllerDev->HdaIoChildren[i].Handle = NULL;
|
|
|
|
Status = gBS->InstallMultipleProtocolInterfaces(&HdaControllerDev->HdaIoChildren[i].Handle,
|
|
|
|
&gEfiDevicePathProtocolGuid, HdaControllerDev->HdaIoChildren[i].DevicePath,
|
|
|
|
&gEfiHdaIoProtocolGuid, &HdaControllerDev->HdaIoChildren[i].PrivateData->HdaIo, NULL);
|
|
|
|
if (EFI_ERROR(Status))
|
|
|
|
goto FREE_CODECS;
|
|
|
|
|
|
|
|
// Connect child to parent.
|
|
|
|
Status = gBS->OpenProtocol(HdaControllerDev->ControllerHandle, &gEfiPciIoProtocolGuid, &TmpProtocol,
|
|
|
|
HdaControllerDev->DriverBinding->DriverBindingHandle, HdaControllerDev->HdaIoChildren[i].Handle, EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER);
|
|
|
|
if (EFI_ERROR(Status))
|
|
|
|
goto FREE_CODECS;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return EFI_SUCCESS;
|
|
|
|
|
|
|
|
FREE_CODECS:
|
|
|
|
//DEBUG((DEBUG_INFO, "HdaControllerScanCodecs(): failed to load driver for codec @ 0x%X\n", i));
|
|
|
|
|
|
|
|
return Status;
|
|
|
|
}
|
|
|
|
|
|
|
|
EFI_STATUS
|
|
|
|
EFIAPI
|
|
|
|
HdaControllerSendCommands(
|
|
|
|
IN HDA_CONTROLLER_DEV *HdaDev,
|
|
|
|
IN UINT8 CodecAddress,
|
|
|
|
IN UINT8 Node,
|
|
|
|
IN EFI_HDA_IO_VERB_LIST *Verbs)
|
|
|
|
{
|
|
|
|
//DEBUG((DEBUG_INFO, "HdaControllerSendCommands(): start\n"));
|
|
|
|
|
|
|
|
// Create variables.
|
|
|
|
EFI_STATUS Status;
|
|
|
|
EFI_PCI_IO_PROTOCOL *PciIo;
|
|
|
|
UINT32 *HdaCorb;
|
|
|
|
UINT64 *HdaRirb;
|
|
|
|
UINT32 RemainingVerbs;
|
|
|
|
UINT32 RemainingResponses;
|
|
|
|
UINT16 HdaCorbReadPointer = 0;
|
|
|
|
UINT16 HdaRirbWritePointer = 0;
|
|
|
|
BOOLEAN ResponseReceived;
|
|
|
|
UINT8 ResponseTimeout;
|
|
|
|
UINT64 RirbResponse;
|
|
|
|
UINT32 VerbCommand;
|
|
|
|
BOOLEAN Retry = FALSE;
|
|
|
|
|
|
|
|
// Ensure parameters are valid.
|
|
|
|
if (!HdaDev || (CodecAddress >= HDA_MAX_CODECS) || !Verbs || (Verbs->Count < 1))
|
|
|
|
return EFI_INVALID_PARAMETER;
|
|
|
|
|
|
|
|
// Get pointers to CORB and RIRB.
|
|
|
|
HdaCorb = HdaDev->CorbBuffer;
|
|
|
|
HdaRirb = HdaDev->RirbBuffer;
|
|
|
|
|
|
|
|
PciIo = HdaDev->PciIo;
|
|
|
|
|
|
|
|
// Lock.
|
|
|
|
AcquireSpinLock(&HdaDev->SpinLock);
|
|
|
|
|
|
|
|
START:
|
|
|
|
RemainingVerbs = Verbs->Count;
|
|
|
|
RemainingResponses = Verbs->Count;
|
|
|
|
do {
|
|
|
|
// Keep sending verbs until they are all sent.
|
|
|
|
if (RemainingVerbs) {
|
|
|
|
// Get current CORB read pointer.
|
|
|
|
Status = PciIo->Mem.Read(PciIo, EfiPciIoWidthUint16, PCI_HDA_BAR, HDA_REG_CORBRP, 1, &HdaCorbReadPointer);
|
|
|
|
if (EFI_ERROR(Status))
|
|
|
|
goto DONE;
|
|
|
|
//DEBUG((DEBUG_INFO, "old RP: 0x%X\n", HdaCorbReadPointer));
|
|
|
|
|
|
|
|
// Add verbs to CORB until all of them are added or the CORB becomes full.
|
|
|
|
while (RemainingVerbs && ((HdaDev->CorbWritePointer + 1 % HdaDev->CorbEntryCount) != HdaCorbReadPointer)) {
|
|
|
|
// Move write pointer and write verb to CORB.
|
|
|
|
HdaDev->CorbWritePointer++;
|
|
|
|
HdaDev->CorbWritePointer %= HdaDev->CorbEntryCount;
|
|
|
|
VerbCommand = HDA_CORB_VERB(CodecAddress, Node, Verbs->Verbs[Verbs->Count - RemainingVerbs]);
|
|
|
|
HdaCorb[HdaDev->CorbWritePointer] = VerbCommand;
|
|
|
|
|
|
|
|
// Move to next verb.
|
|
|
|
RemainingVerbs--;
|
|
|
|
}
|
|
|
|
|
|
|
|
// Set CORB write pointer.
|
|
|
|
Status = PciIo->Mem.Write(PciIo, EfiPciIoWidthUint16, PCI_HDA_BAR, HDA_REG_CORBWP, 1, &HdaDev->CorbWritePointer);
|
|
|
|
if (EFI_ERROR(Status))
|
|
|
|
goto DONE;
|
|
|
|
}
|
|
|
|
|
|
|
|
// Get responses from RIRB.
|
|
|
|
ResponseReceived = FALSE;
|
|
|
|
ResponseTimeout = 10;
|
|
|
|
while (!ResponseReceived) {
|
|
|
|
// Get current RIRB write pointer.
|
|
|
|
Status = PciIo->Mem.Read(PciIo, EfiPciIoWidthUint16, PCI_HDA_BAR, HDA_REG_RIRBWP, 1, &HdaRirbWritePointer);
|
|
|
|
if (EFI_ERROR(Status))
|
|
|
|
goto DONE;
|
|
|
|
|
|
|
|
// If the read and write pointers differ, there are responses waiting.
|
|
|
|
while (HdaDev->RirbReadPointer != HdaRirbWritePointer) {
|
|
|
|
// Increment RIRB read pointer.
|
|
|
|
HdaDev->RirbReadPointer++;
|
|
|
|
HdaDev->RirbReadPointer %= HdaDev->RirbEntryCount;
|
|
|
|
|
|
|
|
// Get response and ensure it belongs to the current codec.
|
|
|
|
RirbResponse = HdaRirb[HdaDev->RirbReadPointer];
|
|
|
|
if (HDA_RIRB_CAD(RirbResponse) != CodecAddress || HDA_RIRB_UNSOL(RirbResponse)) {
|
|
|
|
DEBUG((DEBUG_INFO, "Unknown response!\n"));
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
|
|
|
// Add response to list.
|
|
|
|
Verbs->Responses[Verbs->Count - RemainingResponses] = HDA_RIRB_RESP(RirbResponse);
|
|
|
|
RemainingResponses--;
|
|
|
|
ResponseReceived = TRUE;
|
|
|
|
}
|
|
|
|
|
|
|
|
// If no response still, wait a bit.
|
|
|
|
if (!ResponseReceived) {
|
|
|
|
// If timeout reached, fail.
|
|
|
|
if (!ResponseTimeout) {
|
|
|
|
// DEBUG((DEBUG_INFO, "Command: 0x%X\n", VerbCommand));
|
|
|
|
Status = EFI_TIMEOUT;
|
|
|
|
goto TIMEOUT;
|
|
|
|
}
|
|
|
|
|
|
|
|
ResponseTimeout--;
|
|
|
|
gBS->Stall(MS_TO_MICROSECOND(5));
|
|
|
|
if (ResponseTimeout < 5) {
|
|
|
|
DEBUG((DEBUG_INFO, "%u timeouts reached while waiting for response!\n", ResponseTimeout));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
} while (RemainingVerbs || RemainingResponses);
|
|
|
|
Status = EFI_SUCCESS;
|
|
|
|
goto DONE;
|
|
|
|
|
|
|
|
TIMEOUT:
|
|
|
|
// DEBUG((DEBUG_INFO, "Timeout!\n"));
|
|
|
|
if (!Retry) {
|
|
|
|
// DEBUG((DEBUG_INFO, "Stall detected, restarting CORB and RIRB!\n"));
|
|
|
|
Status = HdaControllerSetCorb(HdaDev, FALSE);
|
|
|
|
if (EFI_ERROR(Status))
|
|
|
|
goto DONE;
|
|
|
|
Status = HdaControllerSetRirb(HdaDev, FALSE);
|
|
|
|
if (EFI_ERROR(Status))
|
|
|
|
goto DONE;
|
|
|
|
Status = HdaControllerSetCorb(HdaDev, TRUE);
|
|
|
|
if (EFI_ERROR(Status))
|
|
|
|
goto DONE;
|
|
|
|
Status = HdaControllerSetRirb(HdaDev, TRUE);
|
|
|
|
if (EFI_ERROR(Status))
|
|
|
|
goto DONE;
|
|
|
|
|
|
|
|
// Try again.
|
|
|
|
Retry = TRUE;
|
|
|
|
goto START;
|
|
|
|
}
|
|
|
|
|
|
|
|
DONE:
|
|
|
|
ReleaseSpinLock(&HdaDev->SpinLock);
|
|
|
|
return Status;
|
|
|
|
}
|
|
|
|
|
|
|
|
EFI_STATUS
|
|
|
|
EFIAPI
|
|
|
|
HdaControllerInstallProtocols(
|
|
|
|
IN HDA_CONTROLLER_DEV *HdaControllerDev)
|
|
|
|
{
|
|
|
|
// DEBUG((DEBUG_INFO, "HdaControllerInstallProtocols(): start\n"));
|
|
|
|
|
|
|
|
// Create variables.
|
|
|
|
HDA_CONTROLLER_INFO_PRIVATE_DATA *HdaControllerInfoData;
|
|
|
|
|
|
|
|
// Allocate space for info protocol data.
|
|
|
|
HdaControllerInfoData = AllocateZeroPool(sizeof(HDA_CONTROLLER_INFO_PRIVATE_DATA));
|
|
|
|
if (HdaControllerInfoData == NULL)
|
|
|
|
return EFI_OUT_OF_RESOURCES;
|
|
|
|
|
|
|
|
// Populate data.
|
|
|
|
HdaControllerInfoData->Signature = HDA_CONTROLLER_PRIVATE_DATA_SIGNATURE;
|
|
|
|
HdaControllerInfoData->HdaControllerDev = HdaControllerDev;
|
|
|
|
HdaControllerInfoData->HdaControllerInfo.GetName = HdaControllerInfoGetName;
|
|
|
|
|
|
|
|
// Install protocols.
|
|
|
|
HdaControllerDev->HdaControllerInfoData = HdaControllerInfoData;
|
|
|
|
return gBS->InstallMultipleProtocolInterfaces(&HdaControllerDev->ControllerHandle,
|
|
|
|
&gEfiHdaControllerInfoProtocolGuid, &HdaControllerInfoData->HdaControllerInfo,
|
|
|
|
&gEfiCallerIdGuid, HdaControllerDev, NULL);
|
|
|
|
}
|
|
|
|
|
|
|
|
VOID
|
|
|
|
EFIAPI
|
|
|
|
HdaControllerCleanup(
|
|
|
|
IN HDA_CONTROLLER_DEV *HdaControllerDev)
|
|
|
|
{
|
|
|
|
// DEBUG((DEBUG_INFO, "HdaControllerCleanup(): start\n"));
|
|
|
|
|
|
|
|
// Create variables.
|
|
|
|
EFI_STATUS Status;
|
|
|
|
EFI_PCI_IO_PROTOCOL *PciIo;
|
|
|
|
UINT32 HdaGCtl = 0;
|
|
|
|
UINT8 i;
|
|
|
|
|
|
|
|
// If controller device is already free, we are done.
|
|
|
|
if (HdaControllerDev == NULL)
|
|
|
|
return;
|
|
|
|
|
|
|
|
PciIo = HdaControllerDev->PciIo;
|
|
|
|
|
|
|
|
// Clean HDA Controller info protocol.
|
|
|
|
if (HdaControllerDev->HdaControllerInfoData != NULL) {
|
|
|
|
// Uninstall protocol.
|
|
|
|
// DEBUG((DEBUG_INFO, "HdaControllerCleanup(): clean HDA Controller Info\n"));
|
|
|
|
Status = gBS->UninstallProtocolInterface(HdaControllerDev->ControllerHandle,
|
|
|
|
&gEfiHdaControllerInfoProtocolGuid, &HdaControllerDev->HdaControllerInfoData->HdaControllerInfo);
|
|
|
|
ASSERT_EFI_ERROR(Status);
|
|
|
|
|
|
|
|
// Free data.
|
|
|
|
FreePool(HdaControllerDev->HdaControllerInfoData);
|
|
|
|
}
|
|
|
|
|
|
|
|
// Clean HDA I/O children.
|
|
|
|
for (i = 0; i < HDA_MAX_CODECS; i++) {
|
|
|
|
// Clean Device Path protocol.
|
|
|
|
if (HdaControllerDev->HdaIoChildren[i].DevicePath != NULL) {
|
|
|
|
// Uninstall protocol.
|
|
|
|
// DEBUG((DEBUG_INFO, "HdaControllerCleanup(): clean Device Path index %u\n", i));
|
|
|
|
Status = gBS->UninstallProtocolInterface(HdaControllerDev->HdaIoChildren[i].Handle,
|
|
|
|
&gEfiDevicePathProtocolGuid, HdaControllerDev->HdaIoChildren[i].DevicePath);
|
|
|
|
ASSERT_EFI_ERROR(Status);
|
|
|
|
|
|
|
|
// Free Device Path.
|
|
|
|
FreePool(HdaControllerDev->HdaIoChildren[i].DevicePath);
|
|
|
|
}
|
|
|
|
|
|
|
|
// Clean HDA I/O protocol.
|
|
|
|
if (HdaControllerDev->HdaIoChildren[i].PrivateData != NULL) {
|
|
|
|
// Uninstall protocol.
|
|
|
|
// DEBUG((DEBUG_INFO, "HdaControllerCleanup(): clean HDA I/O index %u\n", i));
|
|
|
|
Status = gBS->UninstallProtocolInterface(HdaControllerDev->HdaIoChildren[i].Handle,
|
|
|
|
&gEfiHdaIoProtocolGuid, &HdaControllerDev->HdaIoChildren[i].PrivateData->HdaIo);
|
|
|
|
ASSERT_EFI_ERROR(Status);
|
|
|
|
|
|
|
|
// Free private data.
|
|
|
|
FreePool(HdaControllerDev->HdaIoChildren[i].PrivateData);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
// Cleanup streams.
|
|
|
|
HdaControllerCleanupStreams(HdaControllerDev);
|
|
|
|
|
|
|
|
// Stop and cleanup CORB and RIRB.
|
|
|
|
HdaControllerCleanupCorb(HdaControllerDev);
|
|
|
|
HdaControllerCleanupRirb(HdaControllerDev);
|
|
|
|
|
|
|
|
// Get value of CRST bit.
|
|
|
|
Status = PciIo->Mem.Read(PciIo, EfiPciIoWidthUint32, PCI_HDA_BAR, HDA_REG_GCTL, 1, &HdaGCtl);
|
|
|
|
|
|
|
|
// Place controller into a reset state to stop it.
|
|
|
|
if (!(EFI_ERROR(Status))) {
|
|
|
|
HdaGCtl &= ~HDA_REG_GCTL_CRST;
|
|
|
|
Status = PciIo->Mem.Write(PciIo, EfiPciIoWidthUint32, PCI_HDA_BAR, HDA_REG_GCTL, 1, &HdaGCtl);
|
|
|
|
}
|
|
|
|
|
|
|
|
// Free controller device.
|
|
|
|
gBS->UninstallProtocolInterface(HdaControllerDev->ControllerHandle,
|
|
|
|
&gEfiCallerIdGuid, HdaControllerDev);
|
|
|
|
FreePool(HdaControllerDev);
|
|
|
|
}
|
|
|
|
|
|
|
|
EFI_STATUS
|
|
|
|
EFIAPI
|
|
|
|
HdaControllerDriverBindingSupported(
|
|
|
|
IN EFI_DRIVER_BINDING_PROTOCOL *This,
|
|
|
|
IN EFI_HANDLE ControllerHandle,
|
|
|
|
IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath OPTIONAL)
|
|
|
|
{
|
|
|
|
|
|
|
|
// Create variables.
|
|
|
|
EFI_STATUS Status;
|
|
|
|
EFI_PCI_IO_PROTOCOL *PciIo = 0;
|
|
|
|
HDA_PCI_CLASSREG HdaClassReg;
|
|
|
|
|
|
|
|
// Open PCI I/O protocol. If this fails, it's not a PCI device.
|
|
|
|
Status = gBS->OpenProtocol(ControllerHandle, &gEfiPciIoProtocolGuid, (VOID**)&PciIo,
|
|
|
|
This->DriverBindingHandle, ControllerHandle, EFI_OPEN_PROTOCOL_BY_DRIVER);
|
|
|
|
if (EFI_ERROR(Status))
|
|
|
|
return Status;
|
|
|
|
|
|
|
|
// Read class code from PCI.
|
|
|
|
Status = PciIo->Pci.Read(PciIo, EfiPciIoWidthUint8, PCI_CLASSCODE_OFFSET,
|
|
|
|
sizeof(HDA_PCI_CLASSREG) / sizeof(UINT8), &HdaClassReg);
|
|
|
|
if (EFI_ERROR(Status))
|
|
|
|
goto CLOSE_PCIIO;
|
|
|
|
|
|
|
|
// Check class code. If not an HDA controller, we cannot support it.
|
|
|
|
//may check also PCI_CLASS_MEDIA_AUDIO
|
|
|
|
if ((HdaClassReg.Class != PCI_CLASS_MEDIA) || (HdaClassReg.SubClass != PCI_CLASS_MEDIA_HDA)) {
|
|
|
|
Status = EFI_UNSUPPORTED;
|
|
|
|
goto CLOSE_PCIIO;
|
|
|
|
}
|
|
|
|
Status = EFI_SUCCESS;
|
|
|
|
|
|
|
|
CLOSE_PCIIO:
|
|
|
|
// Close PCI I/O protocol and return status.
|
|
|
|
gBS->CloseProtocol(ControllerHandle, &gEfiPciIoProtocolGuid, This->DriverBindingHandle, ControllerHandle);
|
|
|
|
return Status;
|
|
|
|
}
|
|
|
|
|
|
|
|
EFI_STATUS
|
|
|
|
EFIAPI
|
|
|
|
HdaControllerDriverBindingStart(
|
|
|
|
IN EFI_DRIVER_BINDING_PROTOCOL *This,
|
|
|
|
IN EFI_HANDLE ControllerHandle,
|
|
|
|
IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath OPTIONAL)
|
|
|
|
{
|
|
|
|
// DEBUG((DEBUG_INFO, "HdaControllerDriverBindingStart(): start\n"));
|
|
|
|
|
|
|
|
// Create variables.
|
|
|
|
EFI_STATUS Status;
|
|
|
|
EFI_PCI_IO_PROTOCOL *PciIo;
|
|
|
|
EFI_DEVICE_PATH_PROTOCOL *HdaControllerDevicePath;
|
|
|
|
HDA_CONTROLLER_DEV *HdaControllerDev;
|
|
|
|
|
|
|
|
// Open PCI I/O protocol.
|
|
|
|
Status = gBS->OpenProtocol(ControllerHandle, &gEfiPciIoProtocolGuid, (VOID**)&PciIo,
|
|
|
|
This->DriverBindingHandle, ControllerHandle, EFI_OPEN_PROTOCOL_BY_DRIVER);
|
|
|
|
if (EFI_ERROR (Status))
|
|
|
|
return Status;
|
|
|
|
|
|
|
|
// Open Device Path protocol.
|
|
|
|
Status = gBS->OpenProtocol(ControllerHandle, &gEfiDevicePathProtocolGuid, (VOID**)&HdaControllerDevicePath,
|
|
|
|
This->DriverBindingHandle, ControllerHandle, EFI_OPEN_PROTOCOL_BY_DRIVER);
|
|
|
|
if (EFI_ERROR (Status))
|
|
|
|
goto CLOSE_PCIIO;
|
|
|
|
|
|
|
|
// Allocate controller device.
|
|
|
|
HdaControllerDev = AllocateZeroPool(sizeof(HDA_CONTROLLER_DEV));
|
|
|
|
if (HdaControllerDev == NULL) {
|
|
|
|
Status = EFI_OUT_OF_RESOURCES;
|
|
|
|
goto CLOSE_PCIIO;
|
|
|
|
}
|
|
|
|
|
|
|
|
// Fill controller device data.
|
|
|
|
HdaControllerDev->Signature = HDA_CONTROLLER_PRIVATE_DATA_SIGNATURE;
|
|
|
|
HdaControllerDev->PciIo = PciIo;
|
|
|
|
HdaControllerDev->DevicePath = HdaControllerDevicePath;
|
|
|
|
HdaControllerDev->DriverBinding = This;
|
|
|
|
HdaControllerDev->ControllerHandle = ControllerHandle;
|
|
|
|
InitializeSpinLock(&HdaControllerDev->SpinLock);
|
|
|
|
|
|
|
|
// Setup PCI hardware.
|
2019-11-27 12:16:02 +01:00
|
|
|
do {
|
|
|
|
Status = HdaControllerInitPciHw(HdaControllerDev);
|
|
|
|
if (EFI_ERROR(Status))
|
|
|
|
break;
|
|
|
|
|
|
|
|
// Get controller name.
|
|
|
|
HdaControllerGetName(HdaControllerDev->VendorId, &HdaControllerDev->Name);
|
|
|
|
|
|
|
|
// Reset controller.
|
|
|
|
Status = HdaControllerReset(HdaControllerDev);
|
|
|
|
if (EFI_ERROR(Status))
|
|
|
|
break;
|
|
|
|
|
|
|
|
// Install info protocol.
|
|
|
|
Status = HdaControllerInstallProtocols(HdaControllerDev);
|
|
|
|
if (EFI_ERROR(Status))
|
|
|
|
break;
|
|
|
|
|
|
|
|
// Initialize CORB and RIRB.
|
|
|
|
Status = HdaControllerInitCorb(HdaControllerDev);
|
|
|
|
if (EFI_ERROR(Status))
|
|
|
|
break;
|
|
|
|
Status = HdaControllerInitRirb(HdaControllerDev);
|
|
|
|
if (EFI_ERROR(Status))
|
|
|
|
break;
|
|
|
|
|
|
|
|
// needed for QEMU.
|
2019-09-03 11:58:42 +02:00
|
|
|
#ifdef QEMU
|
2019-11-27 12:16:02 +01:00
|
|
|
UINT16 dd = 0xFF;
|
|
|
|
PciIo->Mem.Write(PciIo, EfiPciIoWidthUint16, PCI_HDA_BAR, HDA_REG_RINTCNT, 1, &dd);
|
2019-09-03 11:58:42 +02:00
|
|
|
#endif
|
|
|
|
|
2019-11-27 12:16:02 +01:00
|
|
|
// Start CORB and RIRB
|
|
|
|
Status = HdaControllerSetCorb(HdaControllerDev, TRUE);
|
|
|
|
if (EFI_ERROR(Status))
|
|
|
|
break;
|
|
|
|
Status = HdaControllerSetRirb(HdaControllerDev, TRUE);
|
|
|
|
if (EFI_ERROR(Status))
|
|
|
|
break;
|
2019-09-03 11:58:42 +02:00
|
|
|
|
2019-11-27 12:16:02 +01:00
|
|
|
// Init streams.
|
|
|
|
Status = HdaControllerInitStreams(HdaControllerDev);
|
|
|
|
if (EFI_ERROR(Status))
|
|
|
|
break;
|
2019-09-03 11:58:42 +02:00
|
|
|
|
2019-11-27 12:16:02 +01:00
|
|
|
// Scan for codecs.
|
|
|
|
Status = HdaControllerScanCodecs(HdaControllerDev);
|
|
|
|
// ASSERT_EFI_ERROR(Status);
|
2019-09-03 11:58:42 +02:00
|
|
|
|
2019-11-27 12:16:02 +01:00
|
|
|
// DEBUG((DEBUG_INFO, "HdaControllerDriverBindingStart(): done\n"));
|
|
|
|
return Status;
|
|
|
|
} while (FALSE);
|
2019-09-03 11:58:42 +02:00
|
|
|
|
2019-11-27 12:16:02 +01:00
|
|
|
//FREE_CONTROLLER:
|
2019-09-03 11:58:42 +02:00
|
|
|
// Restore PCI attributes if needed.
|
|
|
|
if (HdaControllerDev->OriginalPciAttributesSaved)
|
|
|
|
PciIo->Attributes(PciIo, EfiPciIoAttributeOperationSet, HdaControllerDev->OriginalPciAttributes, NULL);
|
|
|
|
|
|
|
|
// Free controller device.
|
|
|
|
HdaControllerCleanup(HdaControllerDev);
|
|
|
|
|
|
|
|
CLOSE_PCIIO:
|
|
|
|
// Close protocols.
|
|
|
|
gBS->CloseProtocol(ControllerHandle, &gEfiDevicePathProtocolGuid, This->DriverBindingHandle, ControllerHandle);
|
|
|
|
gBS->CloseProtocol(ControllerHandle, &gEfiPciIoProtocolGuid, This->DriverBindingHandle, ControllerHandle);
|
|
|
|
return Status;
|
|
|
|
}
|
|
|
|
|
|
|
|
EFI_STATUS
|
|
|
|
EFIAPI
|
|
|
|
HdaControllerDriverBindingStop(
|
|
|
|
IN EFI_DRIVER_BINDING_PROTOCOL *This,
|
|
|
|
IN EFI_HANDLE ControllerHandle,
|
|
|
|
IN UINTN NumberOfChildren,
|
|
|
|
IN EFI_HANDLE *ChildHandleBuffer OPTIONAL)
|
|
|
|
{
|
|
|
|
// DEBUG((DEBUG_INFO, "HdaControllerDriverBindingStop(): start\n"));
|
|
|
|
// Create variables.
|
|
|
|
EFI_STATUS Status;
|
|
|
|
HDA_CONTROLLER_DEV *HdaControllerDev = NULL;
|
|
|
|
|
|
|
|
// Get codec device.
|
|
|
|
Status = gBS->OpenProtocol(ControllerHandle, &gEfiCallerIdGuid, (VOID**)&HdaControllerDev,
|
|
|
|
This->DriverBindingHandle, ControllerHandle, EFI_OPEN_PROTOCOL_GET_PROTOCOL);
|
|
|
|
if (!(EFI_ERROR(Status))) {
|
|
|
|
// Ensure controller device is valid.
|
|
|
|
if (HdaControllerDev->Signature != HDA_CONTROLLER_PRIVATE_DATA_SIGNATURE)
|
|
|
|
return EFI_INVALID_PARAMETER;
|
|
|
|
|
|
|
|
// Restore PCI attributes if needed.
|
|
|
|
if (HdaControllerDev->OriginalPciAttributesSaved)
|
|
|
|
HdaControllerDev->PciIo->Attributes(HdaControllerDev->PciIo, EfiPciIoAttributeOperationSet,
|
|
|
|
HdaControllerDev->OriginalPciAttributes, NULL);
|
|
|
|
|
|
|
|
// Cleanup controller.
|
|
|
|
HdaControllerCleanup(HdaControllerDev);
|
|
|
|
}
|
|
|
|
|
|
|
|
// Close protocols.
|
|
|
|
gBS->CloseProtocol(ControllerHandle, &gEfiDevicePathProtocolGuid, This->DriverBindingHandle, ControllerHandle);
|
|
|
|
gBS->CloseProtocol(ControllerHandle, &gEfiPciIoProtocolGuid, This->DriverBindingHandle, ControllerHandle);
|
|
|
|
return EFI_SUCCESS;
|
|
|
|
}
|