2020-04-16 11:09:22 +02:00
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/*
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* Pci.h
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*
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* Created on: 16 Apr 2020
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* Author: jief
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*/
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#ifndef INCLUDE_PCI_H_
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#define INCLUDE_PCI_H_
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2021-05-05 19:10:10 +02:00
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#include <stdint.h>
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2021-09-28 10:28:45 +02:00
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#include "../cpp_foundation/XBool.h"
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2020-04-16 11:09:22 +02:00
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/* PCI */
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#define PCI_BASE_ADDRESS_0 0x10 /* 32 bits */
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#define PCI_BASE_ADDRESS_1 0x14 /* 32 bits [htype 0,1 only] */
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#define PCI_BASE_ADDRESS_2 0x18 /* 32 bits [htype 0 only] */
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#define PCI_BASE_ADDRESS_3 0x1c /* 32 bits */
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#define PCI_BASE_ADDRESS_4 0x20 /* 32 bits */
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#define PCI_BASE_ADDRESS_5 0x24 /* 32 bits */
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#define PCI_CLASS_MEDIA_HDA 0x03
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#define PCIADDR(bus, dev, func) ((1 << 31) | ((bus) << 16) | ((dev) << 11) | ((func) << 8))
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typedef struct {
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2021-05-05 19:10:10 +02:00
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uint32_t :2;
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uint32_t reg :6;
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uint32_t func:3;
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uint32_t dev :5;
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uint32_t bus :8;
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uint32_t :7;
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uint32_t eb :1;
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2020-04-16 11:09:22 +02:00
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} pci_addr_t;
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2021-10-03 19:33:03 +02:00
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typedef union pci_dev_t {
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2021-09-28 10:28:45 +02:00
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uint32_t addr = 0;
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2020-04-16 11:09:22 +02:00
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pci_addr_t bits;
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} pci_dev_t;
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typedef struct pci_dt_t {
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// EFI_PCI_IO_PROTOCOL *PciIo;
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// PCI_TYPE00 Pci;
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2021-09-28 10:28:45 +02:00
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EFI_HANDLE DeviceHandle = NULL;
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UINT8* regs = NULL;
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pci_dev_t dev = pci_dev_t();
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2020-04-16 11:09:22 +02:00
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2021-09-28 10:28:45 +02:00
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UINT16 vendor_id = 0;
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UINT16 device_id = 0;
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2020-04-16 11:09:22 +02:00
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union {
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struct {
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UINT16 vendor_id;
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UINT16 device_id;
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} subsys;
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UINT32 subsys_id;
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2021-09-28 10:28:45 +02:00
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} subsys_id_union = { {0, 0} };
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UINT8 revision = 0;
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UINT8 subclass = 0;
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UINT16 class_id = 0;
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2020-04-16 11:09:22 +02:00
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2021-09-28 10:28:45 +02:00
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struct pci_dt_t *parent = NULL;
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struct pci_dt_t *children = NULL;
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struct pci_dt_t *next = NULL;
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2021-09-28 15:54:31 +02:00
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XBool used = false;
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2020-04-16 11:09:22 +02:00
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} pci_dt_t;
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#endif /* INCLUDE_PCI_H_ */
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