mirror of
https://github.com/CloverHackyColor/CloverBootloader.git
synced 2024-12-02 13:03:28 +01:00
312 lines
8.3 KiB
C
312 lines
8.3 KiB
C
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/*
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* Copyright 2009-2021 The OpenSSL Project Authors. All Rights Reserved.
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*
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* Licensed under the Apache License 2.0 (the "License"). You may not use
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* this file except in compliance with the License. You can obtain a copy
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* in the file LICENSE in the source distribution or at
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* https://www.openssl.org/source/license.html
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*/
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <setjmp.h>
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#include <signal.h>
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#include <unistd.h>
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#if defined(__linux) || defined(_AIX)
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# include <sys/utsname.h>
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#endif
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#if defined(_AIX53) /* defined even on post-5.3 */
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# include <sys/systemcfg.h>
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# if !defined(__power_set)
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# define __power_set(a) (_system_configuration.implementation & (a))
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# endif
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#endif
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#if defined(__APPLE__) && defined(__MACH__)
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# include <sys/types.h>
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# include <sys/sysctl.h>
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#endif
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#include <openssl/crypto.h>
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#include "internal/cryptlib.h"
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#include "crypto/ppc_arch.h"
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unsigned int OPENSSL_ppccap_P = 0;
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static sigset_t all_masked;
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static sigjmp_buf ill_jmp;
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static void ill_handler(int sig)
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{
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siglongjmp(ill_jmp, sig);
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}
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void OPENSSL_fpu_probe(void);
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void OPENSSL_ppc64_probe(void);
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void OPENSSL_altivec_probe(void);
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void OPENSSL_crypto207_probe(void);
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void OPENSSL_madd300_probe(void);
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long OPENSSL_rdtsc_mftb(void);
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long OPENSSL_rdtsc_mfspr268(void);
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uint32_t OPENSSL_rdtsc(void)
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{
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if (OPENSSL_ppccap_P & PPC_MFTB)
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return OPENSSL_rdtsc_mftb();
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else if (OPENSSL_ppccap_P & PPC_MFSPR268)
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return OPENSSL_rdtsc_mfspr268();
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else
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return 0;
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}
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size_t OPENSSL_instrument_bus_mftb(unsigned int *, size_t);
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size_t OPENSSL_instrument_bus_mfspr268(unsigned int *, size_t);
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size_t OPENSSL_instrument_bus(unsigned int *out, size_t cnt)
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{
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if (OPENSSL_ppccap_P & PPC_MFTB)
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return OPENSSL_instrument_bus_mftb(out, cnt);
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else if (OPENSSL_ppccap_P & PPC_MFSPR268)
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return OPENSSL_instrument_bus_mfspr268(out, cnt);
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else
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return 0;
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}
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size_t OPENSSL_instrument_bus2_mftb(unsigned int *, size_t, size_t);
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size_t OPENSSL_instrument_bus2_mfspr268(unsigned int *, size_t, size_t);
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size_t OPENSSL_instrument_bus2(unsigned int *out, size_t cnt, size_t max)
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{
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if (OPENSSL_ppccap_P & PPC_MFTB)
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return OPENSSL_instrument_bus2_mftb(out, cnt, max);
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else if (OPENSSL_ppccap_P & PPC_MFSPR268)
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return OPENSSL_instrument_bus2_mfspr268(out, cnt, max);
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else
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return 0;
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}
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#if defined(__GLIBC__) && defined(__GLIBC_PREREQ)
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# if __GLIBC_PREREQ(2, 16)
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# include <sys/auxv.h>
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# define OSSL_IMPLEMENT_GETAUXVAL
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# elif defined(__ANDROID_API__)
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/* see https://developer.android.google.cn/ndk/guides/cpu-features */
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# if __ANDROID_API__ >= 18
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# include <sys/auxv.h>
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# define OSSL_IMPLEMENT_GETAUXVAL
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# endif
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# endif
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#endif
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#if defined(__FreeBSD__)
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# include <sys/param.h>
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# if __FreeBSD_version >= 1200000
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# include <sys/auxv.h>
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# define OSSL_IMPLEMENT_GETAUXVAL
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static unsigned long getauxval(unsigned long key)
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{
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unsigned long val = 0ul;
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if (elf_aux_info((int)key, &val, sizeof(val)) != 0)
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return 0ul;
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return val;
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}
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# endif
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#endif
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/* I wish <sys/auxv.h> was universally available */
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#define HWCAP 16 /* AT_HWCAP */
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#define HWCAP_PPC64 (1U << 30)
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#define HWCAP_ALTIVEC (1U << 28)
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#define HWCAP_FPU (1U << 27)
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#define HWCAP_POWER6_EXT (1U << 9)
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#define HWCAP_VSX (1U << 7)
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#define HWCAP2 26 /* AT_HWCAP2 */
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#define HWCAP_VEC_CRYPTO (1U << 25)
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#define HWCAP_ARCH_3_00 (1U << 23)
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# if defined(__GNUC__) && __GNUC__>=2
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__attribute__ ((constructor))
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# endif
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void OPENSSL_cpuid_setup(void)
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{
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char *e;
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struct sigaction ill_oact, ill_act;
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sigset_t oset;
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static int trigger = 0;
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if (trigger)
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return;
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trigger = 1;
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if ((e = getenv("OPENSSL_ppccap"))) {
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OPENSSL_ppccap_P = strtoul(e, NULL, 0);
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return;
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}
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OPENSSL_ppccap_P = 0;
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#if defined(_AIX)
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OPENSSL_ppccap_P |= PPC_FPU;
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if (sizeof(size_t) == 4) {
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struct utsname uts;
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# if defined(_SC_AIX_KERNEL_BITMODE)
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if (sysconf(_SC_AIX_KERNEL_BITMODE) != 64)
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return;
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# endif
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if (uname(&uts) != 0 || atoi(uts.version) < 6)
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return;
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}
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# if defined(__power_set)
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/*
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* Value used in __power_set is a single-bit 1<<n one denoting
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* specific processor class. Incidentally 0xffffffff<<n can be
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* used to denote specific processor and its successors.
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*/
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if (sizeof(size_t) == 4) {
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/* In 32-bit case PPC_FPU64 is always fastest [if option] */
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if (__power_set(0xffffffffU<<13)) /* POWER5 and later */
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OPENSSL_ppccap_P |= PPC_FPU64;
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} else {
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/* In 64-bit case PPC_FPU64 is fastest only on POWER6 */
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if (__power_set(0x1U<<14)) /* POWER6 */
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OPENSSL_ppccap_P |= PPC_FPU64;
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}
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if (__power_set(0xffffffffU<<14)) /* POWER6 and later */
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OPENSSL_ppccap_P |= PPC_ALTIVEC;
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if (__power_set(0xffffffffU<<16)) /* POWER8 and later */
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OPENSSL_ppccap_P |= PPC_CRYPTO207;
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if (__power_set(0xffffffffU<<17)) /* POWER9 and later */
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OPENSSL_ppccap_P |= PPC_MADD300;
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return;
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# endif
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#endif
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#if defined(__APPLE__) && defined(__MACH__)
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OPENSSL_ppccap_P |= PPC_FPU;
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{
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int val;
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size_t len = sizeof(val);
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if (sysctlbyname("hw.optional.64bitops", &val, &len, NULL, 0) == 0) {
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if (val)
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OPENSSL_ppccap_P |= PPC_FPU64;
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}
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len = sizeof(val);
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if (sysctlbyname("hw.optional.altivec", &val, &len, NULL, 0) == 0) {
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if (val)
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OPENSSL_ppccap_P |= PPC_ALTIVEC;
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}
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return;
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}
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#endif
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#ifdef OSSL_IMPLEMENT_GETAUXVAL
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{
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unsigned long hwcap = getauxval(HWCAP);
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unsigned long hwcap2 = getauxval(HWCAP2);
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if (hwcap & HWCAP_FPU) {
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OPENSSL_ppccap_P |= PPC_FPU;
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if (sizeof(size_t) == 4) {
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/* In 32-bit case PPC_FPU64 is always fastest [if option] */
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if (hwcap & HWCAP_PPC64)
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OPENSSL_ppccap_P |= PPC_FPU64;
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} else {
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/* In 64-bit case PPC_FPU64 is fastest only on POWER6 */
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if (hwcap & HWCAP_POWER6_EXT)
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OPENSSL_ppccap_P |= PPC_FPU64;
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}
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}
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if (hwcap & HWCAP_ALTIVEC) {
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OPENSSL_ppccap_P |= PPC_ALTIVEC;
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if ((hwcap & HWCAP_VSX) && (hwcap2 & HWCAP_VEC_CRYPTO))
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OPENSSL_ppccap_P |= PPC_CRYPTO207;
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}
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if (hwcap2 & HWCAP_ARCH_3_00) {
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OPENSSL_ppccap_P |= PPC_MADD300;
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}
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}
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#endif
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sigfillset(&all_masked);
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sigdelset(&all_masked, SIGILL);
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sigdelset(&all_masked, SIGTRAP);
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#ifdef SIGEMT
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sigdelset(&all_masked, SIGEMT);
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#endif
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sigdelset(&all_masked, SIGFPE);
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sigdelset(&all_masked, SIGBUS);
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sigdelset(&all_masked, SIGSEGV);
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memset(&ill_act, 0, sizeof(ill_act));
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ill_act.sa_handler = ill_handler;
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ill_act.sa_mask = all_masked;
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sigprocmask(SIG_SETMASK, &ill_act.sa_mask, &oset);
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sigaction(SIGILL, &ill_act, &ill_oact);
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#ifndef OSSL_IMPLEMENT_GETAUXVAL
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if (sigsetjmp(ill_jmp,1) == 0) {
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OPENSSL_fpu_probe();
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OPENSSL_ppccap_P |= PPC_FPU;
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if (sizeof(size_t) == 4) {
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# ifdef __linux
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struct utsname uts;
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if (uname(&uts) == 0 && strcmp(uts.machine, "ppc64") == 0)
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# endif
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if (sigsetjmp(ill_jmp, 1) == 0) {
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OPENSSL_ppc64_probe();
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OPENSSL_ppccap_P |= PPC_FPU64;
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}
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} else {
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/*
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* Wanted code detecting POWER6 CPU and setting PPC_FPU64
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*/
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}
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}
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if (sigsetjmp(ill_jmp, 1) == 0) {
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OPENSSL_altivec_probe();
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OPENSSL_ppccap_P |= PPC_ALTIVEC;
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if (sigsetjmp(ill_jmp, 1) == 0) {
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OPENSSL_crypto207_probe();
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OPENSSL_ppccap_P |= PPC_CRYPTO207;
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}
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}
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if (sigsetjmp(ill_jmp, 1) == 0) {
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OPENSSL_madd300_probe();
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OPENSSL_ppccap_P |= PPC_MADD300;
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}
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#endif
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if (sigsetjmp(ill_jmp, 1) == 0) {
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OPENSSL_rdtsc_mftb();
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OPENSSL_ppccap_P |= PPC_MFTB;
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} else if (sigsetjmp(ill_jmp, 1) == 0) {
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OPENSSL_rdtsc_mfspr268();
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OPENSSL_ppccap_P |= PPC_MFSPR268;
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}
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sigaction(SIGILL, &ill_oact, NULL);
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sigprocmask(SIG_SETMASK, &oset, NULL);
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}
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