mirror of
https://github.com/CloverHackyColor/CloverBootloader.git
synced 2024-11-30 12:43:41 +01:00
338 lines
8.6 KiB
NASM
338 lines
8.6 KiB
NASM
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TITLE CpuAsm.asm:
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;------------------------------------------------------------------------------
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;*
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;* Copyright (c) 2008 - 2011, Intel Corporation. All rights reserved.<BR>
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;* This program and the accompanying materials
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;* are licensed and made available under the terms and conditions of the BSD License
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;* which accompanies this distribution. The full text of the license may be found at
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;* http://opensource.org/licenses/bsd-license.php
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;*
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;* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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;* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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;*
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;* CpuAsm.asm
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;*
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;* Abstract:
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;*
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;------------------------------------------------------------------------------
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.code
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EXTRN mErrorCodeFlag:DWORD ; Error code flags for exceptions
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;
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; point to the external interrupt vector table
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;
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ExternalVectorTablePtr QWORD 0
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InitializeExternalVectorTablePtr PROC PUBLIC
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mov ExternalVectorTablePtr, rcx
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ret
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InitializeExternalVectorTablePtr ENDP
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;------------------------------------------------------------------------------
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; VOID
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; SetCodeSelector (
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; UINT16 Selector
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; );
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;------------------------------------------------------------------------------
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SetCodeSelector PROC PUBLIC
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sub rsp, 0x14
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lea rax, setCodeSelectorLongJump
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mov [rsp], rax
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mov [rsp+8], cx
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;* I'm not sure how to encode this. We need to jmp [esp], where in esp there is
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;* w16(selector):q64(address).
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;* in gcc version this is encoded as 48 ff 2c 24 [ rex.W ljmpq (%esp) ]
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;* but in VC jmp qword ptr [rsp] generates code ff 24 24 [ jmpq(%esp) ]
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;* so I've just inserted db 0x48 to emit REX.W and get original 48 ff 2c 24
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db 0x48
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jmp fword ptr [rsp]
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setCodeSelectorLongJump:
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add rsp, 0x14
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ret
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SetCodeSelector ENDP
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;------------------------------------------------------------------------------
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; VOID
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; SetDataSelectors (
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; UINT16 Selector
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; );
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;------------------------------------------------------------------------------
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SetDataSelectors PROC PUBLIC
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mov ss, cx
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mov ds, cx
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mov es, cx
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mov fs, cx
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mov gs, cx
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ret
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SetDataSelectors ENDP
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;---------------------------------------;
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; CommonInterruptEntry ;
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;---------------------------------------;
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; The follow algorithm is used for the common interrupt routine.
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CommonInterruptEntry PROC PUBLIC
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cli
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;
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; All interrupt handlers are invoked through interrupt gates, so
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; IF flag automatically cleared at the entry point
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;
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;
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; Calculate vector number
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;
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xchg rcx, [rsp] ; get the return address of call, actually, it is the address of vector number.
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movzx ecx, word ptr [rcx]
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cmp ecx, 32 ; Intel reserved vector for exceptions?
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jae NoErrorCode
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bt mErrorCodeFlag, ecx
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jc @F
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NoErrorCode:
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;
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; Push a dummy error code on the stack
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; to maintain coherent stack map
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;
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push [rsp]
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mov qword ptr [rsp + 8], 0
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@@:
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push rbp
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mov rbp, rsp
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;
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; Stack:
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; +---------------------+ <-- 16-byte aligned ensured by processor
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; + Old SS +
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; +---------------------+
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; + Old RSP +
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; +---------------------+
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; + RFlags +
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; +---------------------+
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; + CS +
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; +---------------------+
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; + RIP +
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; +---------------------+
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; + Error Code +
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; +---------------------+
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; + RCX / Vector Number +
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; +---------------------+
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; + RBP +
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; +---------------------+ <-- RBP, 16-byte aligned
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;
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;
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; Since here the stack pointer is 16-byte aligned, so
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; EFI_FX_SAVE_STATE_X64 of EFI_SYSTEM_CONTEXT_x64
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; is 16-byte aligned
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;
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;; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;
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;; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;
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push r15
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push r14
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push r13
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push r12
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push r11
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push r10
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push r9
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push r8
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push rax
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push qword ptr [rbp + 8] ; RCX
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push rdx
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push rbx
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push qword ptr [rbp + 48] ; RSP
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push qword ptr [rbp] ; RBP
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push rsi
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push rdi
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;; UINT64 Gs, Fs, Es, Ds, Cs, Ss; insure high 16 bits of each is zero
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movzx rax, word ptr [rbp + 56]
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push rax ; for ss
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movzx rax, word ptr [rbp + 32]
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push rax ; for cs
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mov rax, ds
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push rax
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mov rax, es
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push rax
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mov rax, fs
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push rax
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mov rax, gs
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push rax
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mov [rbp + 8], rcx ; save vector number
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;; UINT64 Rip;
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push qword ptr [rbp + 24]
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;; UINT64 Gdtr[2], Idtr[2];
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xor rax, rax
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push rax
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push rax
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sidt [rsp]
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xchg rax, [rsp + 2]
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xchg rax, [rsp]
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xchg rax, [rsp + 8]
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xor rax, rax
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push rax
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push rax
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sgdt [rsp]
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xchg rax, [rsp + 2]
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xchg rax, [rsp]
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xchg rax, [rsp + 8]
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;; UINT64 Ldtr, Tr;
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xor rax, rax
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str ax
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push rax
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sldt ax
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push rax
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;; UINT64 RFlags;
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push qword ptr [rbp + 40]
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;; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;
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mov rax, cr8
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push rax
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mov rax, cr4
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or rax, 208h
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mov cr4, rax
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push rax
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mov rax, cr3
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push rax
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mov rax, cr2
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push rax
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xor rax, rax
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push rax
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mov rax, cr0
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push rax
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;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
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mov rax, dr7
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push rax
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mov rax, dr6
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push rax
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mov rax, dr3
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push rax
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mov rax, dr2
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push rax
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mov rax, dr1
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push rax
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mov rax, dr0
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push rax
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;; FX_SAVE_STATE_X64 FxSaveState;
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sub rsp, 512
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mov rdi, rsp
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db 0fh, 0aeh, 07h ;fxsave [rdi]
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;; UEFI calling convention for x64 requires that Direction flag in EFLAGs is clear
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cld
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;; UINT32 ExceptionData;
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push qword ptr [rbp + 16]
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;; call into exception handler
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mov rcx, [rbp + 8]
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mov rax, ExternalVectorTablePtr ; get the interrupt vectors base
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mov rax, [rax + rcx * 8]
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or rax, rax ; NULL?
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je nonNullValue;
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;; Prepare parameter and call
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; mov rcx, [rbp + 8]
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mov rdx, rsp
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;
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; Per X64 calling convention, allocate maximum parameter stack space
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; and make sure RSP is 16-byte aligned
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;
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sub rsp, 4 * 8 + 8
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call rax
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add rsp, 4 * 8 + 8
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nonNullValue:
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cli
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;; UINT64 ExceptionData;
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add rsp, 8
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;; FX_SAVE_STATE_X64 FxSaveState;
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mov rsi, rsp
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db 0fh, 0aeh, 0Eh ; fxrstor [rsi]
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add rsp, 512
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;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
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;; Skip restoration of DRx registers to support in-circuit emualators
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;; or debuggers set breakpoint in interrupt/exception context
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add rsp, 8 * 6
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;; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;
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pop rax
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mov cr0, rax
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add rsp, 8 ; not for Cr1
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pop rax
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mov cr2, rax
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pop rax
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mov cr3, rax
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pop rax
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mov cr4, rax
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pop rax
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mov cr8, rax
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;; UINT64 RFlags;
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pop qword ptr [rbp + 40]
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;; UINT64 Ldtr, Tr;
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;; UINT64 Gdtr[2], Idtr[2];
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;; Best not let anyone mess with these particular registers...
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add rsp, 48
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;; UINT64 Rip;
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pop qword ptr [rbp + 24]
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;; UINT64 Gs, Fs, Es, Ds, Cs, Ss;
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pop rax
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; mov gs, rax ; not for gs
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pop rax
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; mov fs, rax ; not for fs
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; (X64 will not use fs and gs, so we do not restore it)
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pop rax
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mov es, rax
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pop rax
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mov ds, rax
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pop qword ptr [rbp + 32] ; for cs
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pop qword ptr [rbp + 56] ; for ss
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;; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;
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;; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;
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pop rdi
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pop rsi
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add rsp, 8 ; not for rbp
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pop qword ptr [rbp + 48] ; for rsp
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pop rbx
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pop rdx
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pop rcx
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pop rax
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pop r8
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pop r9
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pop r10
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pop r11
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pop r12
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pop r13
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pop r14
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pop r15
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mov rsp, rbp
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pop rbp
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add rsp, 16
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iretq
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CommonInterruptEntry ENDP
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END
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