mirror of
https://github.com/CloverHackyColor/CloverBootloader.git
synced 2024-11-27 12:15:19 +01:00
401 lines
16 KiB
C
401 lines
16 KiB
C
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/** @file
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Copyright (C) 2020, vit9696. All rights reserved.
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All rights reserved.
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#ifndef APPLE_RTC_H
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#define APPLE_RTC_H
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/**
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Sample RTC memory dump from MBP12,1 running 10.15.4:
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00: 33 02 01 00 12 22 04 16 04 20 26 02 70 80 FF FF
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10: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
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20: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
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30: 01 FE 20 FF FF FF FF FF F8 11 FF FF FF 00 1A 7C
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40: 00 00 00 00 FE 00 00 00 00 00 00 00 00 00 00 00
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50: 00 00 00 00 00 00 00 FF 0B D1 80 00 05 00 00 00
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60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
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70: 00 00 00 00 00 00 00 00 FF FF FF FF FF FF FF FF
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80: 44 45 41 44 00 00 00 00 00 00 00 00 00 00 00 00
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90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
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A0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
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B0: 76 CF 85 13 00 00 00 00 00 00 00 00 00 00 00 00
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C0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
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D0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
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E0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
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F0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
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**/
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/**
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APPLE_RTC_BG_COLOR_ADDR - background colour.
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APPLE_RTC_BG_COMPLEMENT_ADDR - complementary byte to background colour.
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0x00 - Grey background (applies to 10.9 and older).
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0x01 - Black background (applies to 10.10 and newer).
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Valid pair gives APPLE_RTC_BG_COLOR_ADDR ^ APPLE_RTC_BG_COMPLEMENT_ADDR == 0xFF.
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Otherwise background colour should be treated as 0, grey.
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Prior to rebooting to MacEFI firmare upgrade /usr/libexec/efiupdater
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removes DefaultBackgroundColor NVRAM variable and resets background to black.
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When performing hibernate wake OSInfo writes chooses the background colour
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based on reported macOS version (grey for 10.9 and below, black otherwise).
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**/
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#define APPLE_RTC_BG_COLOR_ADDR 0x30
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#define APPLE_RTC_BG_COMPLEMENT_ADDR 0x31
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/**
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APPLE_RTC_BG_COLOR_ADDR values.
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**/
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#define APPLE_RTC_BG_COLOR_GRAY 0x00
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#define APPLE_RTC_BG_COLOR_BLACK 0x01
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/**
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By default masked out with 0xF8.
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Connected thunderbolt devices can set 3 lower bits.
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BIT3 seems to be set when InstallWindowsUEFI was present at boot.
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See ThunderboltNhi and PchInitDxe.
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**/
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#define APPLE_RTC_FIRMWARE_STATE_ADDR 0x38
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/**
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Used by ApplePlatformInit, 1 byte.
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**/
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#define APPLE_RTC_FIRMWARE_3D_ADDR 0x3D
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/**
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Bitmask of started test indices.
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Little endian 32-bit number.
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Note: memory testing statuses are a bit more complicated,
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but we do not need too much detail atm.
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**/
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#define APPLE_RTC_MEM_TEST_ACCEPT_ADDR 0x44
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/**
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Bitmask of request test indices.
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Little endian 32-bit number.
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**/
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#define APPLE_RTC_MEM_TEST_REQUEST_ADDR 0x48
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/**
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Bitmask of performed test indices.
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Little endian 32-bit number.
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**/
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#define APPLE_RTC_MEM_TEST_RESULT_ADDR 0x4C
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/**
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Another unknown reserved address.
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**/
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#define APPLE_RTC_FIRMWARE_57_ADDR 0x57
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/**
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Firmware boot progress, mostly maintained by AppleBds.
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0x00, 0x01, 0x02 - Set by RomIntegrityPei.
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0x04 - Normal boot started. At this step AppleBds will process hibernation,
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enable video output, check battery state, perform memory test, etc.
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0x05 - Exit Boot Services called. Set in AppleBds event handler.
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**/
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#define APPLE_RTC_FIRMWARE_PROGRESS_ADDR 0x5C
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/**
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Apple RTC reserved memory area for unclear purposes, normally filled with FF.
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Should not be erased during PRAM reset (CMD+OPT+P+R).
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**/
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#define APPLE_RTC_RESERVED_ADDR 0x78
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/**
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Apple RTC reserved memory size.
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**/
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#define APPLE_RTC_RESERVED_LENGTH 8
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/**
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Hibernation image encryption data, a copy of IOHibernateRTCVariables.
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See AppleRTCHibernateVars type in AppleHibernate.h for the definition.
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- Valid hibernation image encryption data starts with "AAPL" magic.
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- Erased hibernation image encryption data starts with "DEAD" magic.
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Normally handled by AppleBds prior to transfering control to the bootloader.
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**/
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#define APPLE_RTC_HIBERNATION_KEY_ADDR 0x80
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/**
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Effectively equals to sizeof (AppleRTCHibernateVars).
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**/
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#define APPLE_RTC_HIBERNATION_KEY_LENGTH 0x2C
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/**
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Firmware upgrade control and status byte.
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0x00 - Normal boot. AppleBds resets to this value upon BOOT_ON_FLASH_UPDATE
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prior to running BootRomFlash. BootRomFlash may itself reset to this
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value on successful(?) flashing. Mirrored to NOBP SMC key.
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0x01 - Alternative unsuccessful (?) result of firmware flashing written
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by BootRomFlash. Mirrored to NOBP SMC key. Also set in ApplePlatformInit.
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0x02 - Schedule firmware upgrade. Closed-source bless part writes this value
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when intending to upgrade MacEFI firmware.
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0x03 - Peform firmware upgrade. BootRomFlash writes this value prior to
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rebooting into BOOT_ON_FLASH_UPDATE mode. Might be needed due to region
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unlock.
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**/
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#define APPLE_RTC_FIRMWARE_UPGRADE_ADDR 0xAC
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/**
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AppleBds zeroes this byte at the same time it reaches normal booting phase (0x4)
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in APPLE_RTC_FIRMWARE_PROGRESS_ADDR. This may be set to non-zero value by ApplePlatformInit.
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**/
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#define APPLE_RTC_FIRMWARE_CHECK_ADDR 0xAF
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/**
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Data contained in RTC allowing to trace various power management events.
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Called via AppleRTC::rtcRecordTracePoint and also used for EfiBoot wake log.
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**/
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#define APPLE_RTC_TRACE_POINT_ADDR 0xB0
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/**
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Trace point data contains a total of 8 bytes, but they seem to have varying purpose.
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**/
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#define APPLE_RTC_TRACE_POINT_LENGTH 8
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/**
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Trace data is a 32-bit value, which format depends on the phase
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(APPLE_RTC_TRACE_PHASE_ADDR) the platform is currently in.
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For the kernel this may e.g. contain PCI device index currently put
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in sleep or being awoken (kIOPMTracePointSleepPowerPlaneDrivers
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or kIOPMTracePointWakePowerPlaneDrivers).
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For EfiBoot this is named hibernatin wake log. It is also written to
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wake-failure NVRAM variable (and later DeviceTree).
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**/
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#define APPLE_RTC_TRACE_DATA_ADDR 0xB0
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/**
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Trace data length.
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**/
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#define APPLE_RTC_TRACE_DATA_LENGTH 4
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/**
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Mask of events, which happened during booting.
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These events are appended during the boot progress.
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Note, unlike APPLE_RTC_WL_EVENT_ADDR/APPLE_RTC_WL_EVENT_EXTRA_ADDR,
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which only get updated in hibernate wake, this value is always written
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when a non-zero event is supplied.
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**/
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#define APPLE_RTC_WL_MASK_ADDR 0xB1
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/**
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Known event bits.
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**/
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#define APPLE_RTC_WL_MASK_BOOT_STARTED BIT0 ///< Called early at boot.efi startup.
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#define APPLE_RTC_WL_MASK_BOOT_FAILED BIT1 ///< gBS->Exit: Boot failed; will sleep for 10 seconds before exiting.
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#define APPLE_RTC_WL_MASK_BOOT_KERNEL BIT2 ///< Called right before jumping to the kernel code.
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#define APPLE_RTC_WL_MASK_CS_UNLOCKED BIT3 ///< Set along with APPLE_RTC_WL_CS_VOLUME_UNLOCKED.
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#define APPLE_RTC_WL_MASK_HIB_CLEAR_KEYS BIT4 ///< Removed boot-image-key, EFI_STATUS in EXTRA.
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#define APPLE_RTC_WL_MASK_HIB_CLEAR_IMG BIT5 ///< Removed boot-image, will reboot now.
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#define APPLE_RTC_WL_MASK_BOOT_RESET BIT6 ///< gBS->Reset was called.
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/**
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Event index that happened last during booting.
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0xB2 is the event type and 0xB3 is its subtype.
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**/
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#define APPLE_RTC_WL_EVENT_ADDR 0xB2
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#define APPLE_RTC_WL_EVENT_EXTRA_ADDR 0xB3
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/**
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Known events.
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**/
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#define APPLE_RTC_WL_EVENT_DEFAULT 0 ///< For everything.
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#define APPLE_RTC_WL_INIT_DEVICE_TREE 2 ///< Before first "Start InitDeviceTree".
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#define APPLE_RTC_WL_KERNEL_ALLOC_CALL_GATE 3 ///< After "End InitDeviceTree".
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#define APPLE_RTC_WL_INIT_MEMORY_CONFIG 4 ///< Before "Start InitMemoryConfig".
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#define APPLE_RTC_WL_HIB_CHECK 5 ///< Before "Start CheckHibernate".
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#define APPLE_RTC_WL_CS_LOAD_CONFIGURATION 6 ///< Before "Start LoadCoreStorageConfiguration".
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#define APPLE_RTC_WL_GET_FDE_KEY 7 ///< Before reading HBKP key.
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#define APPLE_RTC_WL_HIB_WAKE_START 8 ///< Before reading FACP table.
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#define APPLE_RTC_WL_HIB_GET_MMAP 9 ///< Before GetMemoryMap for hibernation.
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#define APPLE_RTC_WL_HIB_HWSIG_VALID 10 ///< After confirming FACP signature validity with the image.
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#define APPLE_RTC_WL_HIB_MEM_ALLOC 11 ///< Before restore1CodePhysPage / runtimePages allocation.
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#define APPLE_RTC_WL_HIB_SPLASH 12 ///< Before "Start OpenBootGraphics".
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#define APPLE_RTC_WL_HIB_READ 13 ///< After "Start hibernate read".
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#define APPLE_RTC_WL_HIB_HANDOFF 14 ///< Before adjusting IOHibernateImageHeader and booting kernel.
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#define APPLE_RTC_WL_HIB_EXIT_BOOT_SERVICES 15 ///< Done ExitBootServices for hibernate, EFI_STATUS in EXTRA.
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#define APPLE_RTC_WL_HIB_KERNEL_START 16 ///< Calling kernel entry point for hibernate.
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#define APPLE_RTC_WL_HIB_FINISH_FDE 17 ///< After "Start FinishFDEHibernate".
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#define APPLE_RTC_WL_HIB_WIRED_KEY_VALID 18 ///< Before APPLE_RTC_WL_HIBERNATE_WAKE_START with valid FDE key.
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#define APPLE_RTC_WL_RECOVERY_OS_FOUND 19 ///< After detecting com.apple.recovery.boot in boot path.
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#define APPLE_RTC_WL_CS_VOLUME_UNLOCKED 20 ///< After "End UnlockCoreStorageVolumeKey" with EFI_STATUS in EXTRA.
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#define APPLE_RTC_WL_KERNEL_LOAD_CACHE_FAIL 22 ///< Failed to load kernel cache, EFI_STATUS in EXTRA.
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#define APPLE_RTC_WL_HIB_BS_MISSING 23 ///< Missing boot-signature, EFI_STATUS in EXTRA.
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#define APPLE_RTC_WL_HIB_BIK_MISSING 24 ///< Missing boot-image-key, EFI_STATUS in EXTRA.
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#define APPLE_RTC_WL_RECOVERY_OS_REBOOT 25 ///< Before rebooting into recovery with APPLE_RTC_WL_MASK_BOOT_RESET.
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#define APPLE_RTC_WL_LOGIN_WINDOW_PWRESET 26 ///< Requested FDE password recovery.
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#define APPLE_RTC_WL_LOGIN_WINDOW_GUEST 27 ///< Chose guest in FV2 login window, will gBS->Reset now.
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#define APPLE_RTC_WL_LOGIN_WINDOW_RESET 28 ///< Chose reset in FV2 login window, will gBS->Reset now.
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#define APPLE_RTC_WL_LOGIN_WINDOW_HIB 29 ///< Will save hibernation data after FV2 login window and shutdown.
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#define APPLE_RTC_WL_LOGIN_WINDOW_SHUTDOWN 30 ///< Chose shutdown in FV2 login window, will gBS->Reset now.
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#define APPLE_RTC_WL_LOGIN_WINDOW_FAIL 31 ///< After "End LoginWindow Initialize", EFI_STATUS in EXTRA.
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#define APPLE_RTC_WL_HIB_ABORT_SAFE_MODE 32 ///< Hibernation aborted due to safe mode, after "Start CheckHibernate".
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#define APPLE_RTC_WL_HIB_BI_ALLOC 33 ///< Failed to allocate memory for boot-image, EFI_STATUS in EXTRA.
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#define APPLE_RTC_WL_HIB_BI_MISSING 34 ///< Missing boot-image variable or 0 size, EFI_STATUS in EXTRA.
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#define APPLE_RTC_WL_HIB_BI_INVALID 35 ///< Did not find valid data in boot-image.
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#define APPLE_RTC_WL_HIB_BI_DP_ALLOC 36 ///< Failed to allocate boot-image device path(?).
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#define APPLE_RTC_WL_HIB_BI_DP_ZERO 37 ///< boot-image contains empty DP(?).
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#define APPLE_RTC_WL_HIB_BI_DP_MISSING 38 ///< Failed to locate boot-image device path, EFI_STATUS in EXTRA.
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#define APPLE_RTC_WL_HIB_BI_DP_NO_DISK_IO 39 ///< Failed to find Disk I/O protocol, EFI_STATUS in EXTRA.
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#define APPLE_RTC_WL_HIB_BI_DP_NI_BLOCK_IO 40 ///< Failed to find Block I/O protocol, EFI_STATUS in EXTRA.
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/**
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Certain components have the ability to log their wake progress
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directly via RTC. See XNU IOPMPrivate.h for more details.
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LoginWindow - 4 bits
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CoreDisplay - 8 bits
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CoreGraphics - 8 bits
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Apparently these look mostly unused, at least in release builds.
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CoreDisplay is known to report 0 (very helpful) on screen wake.
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I guess we can abuse them if we want.
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**/
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#define APPLE_RTC_TRACE_LOGIN_WINDOW_ADDR 0xB4
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#define APPLE_RTC_TRACE_CORE_DISPLAY_ADDR 0xB5
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#define APPLE_RTC_TRACE_CORE_GRAPHICS_ADDR 0xB6
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/**
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Trace point power phase e.g. kIOPMTracePointSystemUp.
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See XNU IOPMPrivate.h for more details.
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**/
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#define APPLE_RTC_TRACE_PHASE_ADDR 0xB7
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/**
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256-bit full disk encryption (FDE) key used for authenticated restart.
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AppleRTC and other kexts name it key stash.
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Written by AppleRTC at the request of IOHibernateSMCVariables I/O registry
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entry submitted either by XNU kernel or AppleFDEKeyStore.kext. The variable
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itself is a pair of 64-bit values: key size and key address in kernel memory.
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This was replaced with HBKP SMC key in modern Macs.
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*** VirtualSMC addendum ***
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Since this value is no longer used due to HBKP present in almost every Mac
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we badly abuse this area when vertualising SMC.
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When HBKP SMC key is written VirtualSMC AES-128 encrypts the submitted value
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with a unique key and writes the result to an NVRAM variable (vsmc-key).
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The AES encryption key goes to RTC at this addrress instead.
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Afterwards the EFI module implementing SMC protocol performs the decryption.
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TODO: Replace AES with one-time pad, i.e. increase the temporary key size
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to 256 bits and just XOR the value. This will break old VirtualSmc.efi
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module, but we do not care anymore.
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**/
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#define APPLE_RTC_FDE_KEY_ADDR 0xD0
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/**
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FDE key maximum and default, as AES-256-XTS has 256-bit key.
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For smaller keys remaining bytes are zeroed.
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**/
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#define APPLE_RTC_FDE_KEY_LENGTH 0x20
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/**
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FDE key state. Normally written by ApplePlatformInit.
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0x00 - The key is either present or not.
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0x41 - The key is not present, and should be copied to RTC from HBKP
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SMC key prior to transfering control to the bootloader. After the
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copying succeeds this value is overwritten with 0x00. Normally
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this is done by AppleBds.
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**/
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#define APPLE_RTC_FDE_STATE_ADDR 0xF0
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/**
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Known values for APPLE_RTC_FDE_STATE_ADDR.
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**/
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#define APPLE_RTC_FDE_STATE_DEFAULT 0x00
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#define APPLE_RTC_FDE_STATE_NEED_KEY 0x41
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/**
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Checksum is calculated starting from this address.
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**/
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#define APPLE_RTC_CHECKSUM_START 0x0E
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/**
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First 64 bytes are RTC core and are hashed separately.
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**/
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#define APPLE_RTC_CORE_SIZE 0x40
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/**
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All Apple hardware cares about 256 bytes of RTC memory.
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**/
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#define APPLE_RTC_TOTAL_SIZE 0x100
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/**
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Apple checksum custom CRC polynomial.
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Apple checksum is a modified version of ANSI CRC16 in REFIN mode (0xA001 poly).
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See http://zlib.net/crc_v3.txt for more details.
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Effective poly is 0x2001 due to a bitwise OR with BIT15.
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The change turns CRC16 into CRC14, making BIT14 and BIT15 always zero.
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This modification is commonly found in legacy Phoenix firmwares,
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where it was used for password hashing as found by dogbert:
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http://sites.google.com/site/dogber1/blag/pwgen-5dec.py
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**/
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#define APPLE_RTC_CHECKSUM_POLYNOMIAL 0x2001
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/**
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Apple checksum rounds.
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||
|
Only 7 shifts per byte are performed instead of the usual 8.
|
||
|
This might improve checksum quality against specific data, but the exact
|
||
|
reasons are unknown. The algorithm did not change since its introduction
|
||
|
in 10.4.x, and since Apple Developer Transition Kit was based on Phoenix
|
||
|
firmware, this could just be a quick change to get a different checksum.
|
||
|
**/
|
||
|
#define APPLE_RTC_CHECKSUM_ROUNDS 7
|
||
|
|
||
|
/**
|
||
|
Checksum for Apple RTC with core part of the memory hashed:
|
||
|
[APPLE_RTC_CHECKSUM_SART, APPLE_RTC_CORE_SIZE).
|
||
|
**/
|
||
|
#define APPLE_RTC_CORE_CHECKSUM_ADDR1 0x3E
|
||
|
#define APPLE_RTC_CORE_CHECKSUM_ADDR2 0x3F
|
||
|
|
||
|
/**
|
||
|
Apple RTC core checksum to byte convertion macros.
|
||
|
BYTE1 BIT0~BIT7 = CHECKSUM BIT0~BIT7
|
||
|
BYTE2 BIT1~BIT7 = CHECKSUM BIT8~BIT14
|
||
|
**/
|
||
|
#define APPLE_RTC_CORE_CHECKSUM_BYTE1(Checksum) ((UINT8) ((UINT32) (Checksum) & 0xFFU))
|
||
|
#define APPLE_RTC_CORE_CHECKSUM_BYTE2(Checksum) ((UINT8) (((UINT32) (Checksum) >> 7U) & 0xFEU))
|
||
|
|
||
|
/**
|
||
|
Checksum for Apple RTC with all the memory hashed:
|
||
|
[APPLE_RTC_CHECKSUM_SART, APPLE_RTC_TOTAL_SIZE).
|
||
|
**/
|
||
|
#define APPLE_RTC_MAIN_CHECKSUM_ADDR1 0x58
|
||
|
#define APPLE_RTC_MAIN_CHECKSUM_ADDR2 0x59
|
||
|
|
||
|
/**
|
||
|
Apple RTC main checksum to byte convertion macros.
|
||
|
BYTE1 BIT0~BIT7 = CHECKSUM BIT0~BIT7
|
||
|
BYTE2 BIT0~BIT7 = CHECKSUM BIT8~BIT15
|
||
|
**/
|
||
|
#define APPLE_RTC_MAIN_CHECKSUM_BYTE1(Checksum) ((UINT8) (((UINT32) (Checksum) >> 8U) & 0xFFU))
|
||
|
#define APPLE_RTC_MAIN_CHECKSUM_BYTE2(Checksum) ((UINT8) ((UINT32) (Checksum) & 0xFFU))
|
||
|
|
||
|
#endif // APPLE_RTC_H
|