mirror of
https://github.com/CloverHackyColor/CloverBootloader.git
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810 lines
25 KiB
C
810 lines
25 KiB
C
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/** @file
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ProcessorSubClass.c
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Copyright (c) 2022, Ampere Computing LLC. All rights reserved.
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Copyright (c) 2021, NUVIA Inc. All rights reserved.<BR>
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Copyright (c) 2015, Hisilicon Limited. All rights reserved.
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Copyright (c) 2015, Linaro Limited. All rights reserved.
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include <Uefi.h>
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#include <Protocol/Smbios.h>
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#include <IndustryStandard/ArmCache.h>
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#include <IndustryStandard/ArmStdSmc.h>
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#include <IndustryStandard/SmBios.h>
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#include <Library/ArmLib.h>
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#include <Library/ArmSmcLib.h>
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#include <Library/BaseLib.h>
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#include <Library/BaseMemoryLib.h>
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#include <Library/DebugLib.h>
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#include <Library/HiiLib.h>
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#include <Library/IoLib.h>
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#include <Library/MemoryAllocationLib.h>
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#include <Library/OemMiscLib.h>
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#include <Library/PcdLib.h>
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#include <Library/PrintLib.h>
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#include <Library/UefiBootServicesTableLib.h>
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#include <Library/UefiLib.h>
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#include "SmbiosProcessor.h"
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extern UINT8 ProcessorSubClassStrings[];
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#define CACHE_SOCKETED_SHIFT 3
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#define CACHE_LOCATION_SHIFT 5
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#define CACHE_ENABLED_SHIFT 7
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#define CACHE_OPERATION_MODE_SHIFT 8
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typedef enum {
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CacheModeWriteThrough = 0, ///< Cache is write-through
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CacheModeWriteBack, ///< Cache is write-back
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CacheModeVariesWithAddress, ///< Cache mode varies by address
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CacheModeUnknown, ///< Cache mode is unknown
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CacheModeMax
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} CACHE_OPERATION_MODE;
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typedef enum {
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CacheLocationInternal = 0, ///< Cache is internal to the processor
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CacheLocationExternal, ///< Cache is external to the processor
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CacheLocationReserved, ///< Reserved
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CacheLocationUnknown, ///< Cache location is unknown
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CacheLocationMax
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} CACHE_LOCATION;
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EFI_HII_HANDLE mHiiHandle;
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EFI_SMBIOS_PROTOCOL *mSmbios;
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SMBIOS_TABLE_TYPE4 mSmbiosProcessorTableTemplate = {
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{ // Hdr
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EFI_SMBIOS_TYPE_PROCESSOR_INFORMATION, // Type
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sizeof (SMBIOS_TABLE_TYPE4), // Length
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0 // Handle
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},
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1, // Socket
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CentralProcessor, // ProcessorType
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ProcessorFamilyIndicatorFamily2, // ProcessorFamily
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2, // ProcessorManufacture
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{ // ProcessorId
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{ // Signature
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0
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},
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{ // FeatureFlags
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0
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}
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},
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3, // ProcessorVersion
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{ // Voltage
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0
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},
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0, // ExternalClock
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0, // MaxSpeed
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0, // CurrentSpeed
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0, // Status
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ProcessorUpgradeUnknown, // ProcessorUpgrade
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0xFFFF, // L1CacheHandle
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0xFFFF, // L2CacheHandle
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0xFFFF, // L3CacheHandle
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4, // SerialNumber
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5, // AssetTag
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6, // PartNumber
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0, // CoreCount
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0, // EnabledCoreCount
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0, // ThreadCount
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0, // ProcessorCharacteristics
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ProcessorFamilyARM, // ProcessorFamily2
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0, // CoreCount2
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0, // EnabledCoreCount2
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0 // ThreadCount2
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};
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/** Sets the HII variable `StringId` is `Pcd` isn't empty.
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@param Pcd The FixedAtBuild PCD that contains the string to fetch.
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@param StringId The string identifier to set.
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**/
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#define SET_HII_STRING_IF_PCD_NOT_EMPTY(Pcd, StringId) \
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do { \
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CHAR16 *Str; \
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Str = (CHAR16*)PcdGetPtr (Pcd); \
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if (StrLen (Str) > 0) { \
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HiiSetString (mHiiHandle, StringId, Str, NULL); \
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} \
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} while (0)
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/** Fetches the specified processor's frequency in Hz.
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@param ProcessorNumber The processor number
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@return The clock frequency in MHz
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**/
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UINT16
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GetCpuFrequency (
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IN UINT8 ProcessorNumber
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)
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{
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return (UINT16)(OemGetCpuFreq (ProcessorNumber) / 1000 / 1000);
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}
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/** Gets a description of the specified cache.
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@param[in] CacheLevel Zero-based cache level (e.g. L1 cache is 0).
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@param[in] DataCache Cache is a data cache.
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@param[in] UnifiedCache Cache is a unified cache.
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@param[out] CacheSocketStr The description of the specified cache
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@return The number of Unicode characters in CacheSocketStr not including the
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terminating NUL.
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**/
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UINTN
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GetCacheSocketStr (
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IN UINT8 CacheLevel,
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IN BOOLEAN DataCache,
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IN BOOLEAN UnifiedCache,
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OUT CHAR16 *CacheSocketStr
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)
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{
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UINTN CacheSocketStrLen;
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if ((CacheLevel == CpuCacheL1) && !DataCache && !UnifiedCache) {
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CacheSocketStrLen = UnicodeSPrint (
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CacheSocketStr,
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SMBIOS_STRING_MAX_LENGTH - 1,
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L"L%x Instruction Cache",
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CacheLevel
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);
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} else if ((CacheLevel == CpuCacheL1) && DataCache) {
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CacheSocketStrLen = UnicodeSPrint (
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CacheSocketStr,
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SMBIOS_STRING_MAX_LENGTH - 1,
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L"L%x Data Cache",
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CacheLevel
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);
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} else {
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CacheSocketStrLen = UnicodeSPrint (
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CacheSocketStr,
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SMBIOS_STRING_MAX_LENGTH - 1,
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L"L%x Cache",
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CacheLevel
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);
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}
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return CacheSocketStrLen;
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}
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/** Fills in the Type 7 record with the cache architecture information
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read from the CPU registers.
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@param[in] CacheLevel Cache level (e.g. L1, L2).
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@param[in] DataCache Cache is a data cache.
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@param[in] UnifiedCache Cache is a unified cache.
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@param[out] Type7Record The Type 7 record to fill in.
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**/
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VOID
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ConfigureCacheArchitectureInformation (
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IN UINT8 CacheLevel,
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IN BOOLEAN DataCache,
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IN BOOLEAN UnifiedCache,
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OUT SMBIOS_TABLE_TYPE7 *Type7Record
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)
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{
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UINT8 Associativity;
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UINT32 CacheSize32;
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UINT16 CacheSize16;
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UINT64 CacheSize64;
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if (!DataCache && !UnifiedCache) {
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Type7Record->SystemCacheType = CacheTypeInstruction;
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} else if (DataCache) {
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Type7Record->SystemCacheType = CacheTypeData;
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} else if (UnifiedCache) {
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Type7Record->SystemCacheType = CacheTypeUnified;
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} else {
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ASSERT (FALSE);
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}
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CacheSize64 = SmbiosProcessorGetCacheSize (
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CacheLevel,
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DataCache,
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UnifiedCache
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);
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Associativity = SmbiosProcessorGetCacheAssociativity (
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CacheLevel,
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DataCache,
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UnifiedCache
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);
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CacheSize64 /= 1024; // Minimum granularity is 1K
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// Encode the cache size into the format SMBIOS wants
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if (CacheSize64 < MAX_INT16) {
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CacheSize16 = CacheSize64;
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CacheSize32 = CacheSize16;
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} else if ((CacheSize64 / 64) < MAX_INT16) {
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CacheSize16 = (1 << 15) | (CacheSize64 / 64);
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CacheSize32 = (1 << 31) | (CacheSize64 / 64);
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} else {
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if ((CacheSize64 / 1024) <= 2047) {
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CacheSize32 = CacheSize64;
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} else {
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CacheSize32 = (1 << 31) | (CacheSize64 / 64);
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}
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CacheSize16 = -1;
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}
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Type7Record->MaximumCacheSize = CacheSize16;
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Type7Record->InstalledSize = CacheSize16;
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Type7Record->MaximumCacheSize2 = CacheSize32;
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Type7Record->InstalledSize2 = CacheSize32;
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switch (Associativity) {
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case 2:
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Type7Record->Associativity = CacheAssociativity2Way;
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break;
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case 4:
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Type7Record->Associativity = CacheAssociativity4Way;
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break;
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case 8:
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Type7Record->Associativity = CacheAssociativity8Way;
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break;
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case 12:
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Type7Record->Associativity = CacheAssociativity12Way;
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break;
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case 16:
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Type7Record->Associativity = CacheAssociativity16Way;
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break;
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case 20:
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Type7Record->Associativity = CacheAssociativity20Way;
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break;
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case 24:
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Type7Record->Associativity = CacheAssociativity24Way;
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break;
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case 32:
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Type7Record->Associativity = CacheAssociativity32Way;
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break;
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case 48:
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Type7Record->Associativity = CacheAssociativity48Way;
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break;
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case 64:
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Type7Record->Associativity = CacheAssociativity64Way;
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break;
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default:
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Type7Record->Associativity = CacheAssociativityOther;
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break;
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}
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Type7Record->CacheConfiguration = (CacheModeUnknown << CACHE_OPERATION_MODE_SHIFT) |
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(1 << CACHE_ENABLED_SHIFT) |
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(CacheLocationUnknown << CACHE_LOCATION_SHIFT) |
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(0 << CACHE_SOCKETED_SHIFT) |
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(CacheLevel - 1);
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}
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/** Allocates and initializes an SMBIOS_TABLE_TYPE7 structure.
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@param[in] CacheLevel The cache level (L1-L7).
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@param[in] DataCache Cache is a data cache.
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@param[in] UnifiedCache Cache is a unified cache.
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@return A pointer to the Type 7 structure. Returns NULL on failure.
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**/
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SMBIOS_TABLE_TYPE7 *
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AllocateAndInitCacheInformation (
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IN UINT8 CacheLevel,
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IN BOOLEAN DataCache,
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IN BOOLEAN UnifiedCache
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)
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{
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SMBIOS_TABLE_TYPE7 *Type7Record;
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EFI_STRING CacheSocketStr;
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UINTN CacheSocketStrLen;
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UINTN StringBufferSize;
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CHAR8 *OptionalStrStart;
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UINTN TableSize;
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// Allocate and fetch the cache description
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StringBufferSize = sizeof (CHAR16) * SMBIOS_STRING_MAX_LENGTH;
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CacheSocketStr = AllocateZeroPool (StringBufferSize);
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if (CacheSocketStr == NULL) {
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return NULL;
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}
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CacheSocketStrLen = GetCacheSocketStr (
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CacheLevel,
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DataCache,
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UnifiedCache,
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CacheSocketStr
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);
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TableSize = sizeof (SMBIOS_TABLE_TYPE7) + CacheSocketStrLen + 1 + 1;
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Type7Record = AllocateZeroPool (TableSize);
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if (Type7Record == NULL) {
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FreePool (CacheSocketStr);
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return NULL;
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}
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Type7Record->Hdr.Type = EFI_SMBIOS_TYPE_CACHE_INFORMATION;
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Type7Record->Hdr.Length = sizeof (SMBIOS_TABLE_TYPE7);
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Type7Record->Hdr.Handle = SMBIOS_HANDLE_PI_RESERVED;
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Type7Record->SocketDesignation = 1;
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Type7Record->SupportedSRAMType.Unknown = 1;
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Type7Record->CurrentSRAMType.Unknown = 1;
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Type7Record->CacheSpeed = 0;
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Type7Record->ErrorCorrectionType = CacheErrorUnknown;
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OptionalStrStart = (CHAR8 *)(Type7Record + 1);
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UnicodeStrToAsciiStrS (CacheSocketStr, OptionalStrStart, CacheSocketStrLen + 1);
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FreePool (CacheSocketStr);
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return Type7Record;
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}
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/**
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Add Type 7 SMBIOS Record for Cache Information.
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@param[in] ProcessorIndex Processor number of specified processor.
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@param[out] L1CacheHandle Pointer to the handle of the L1 Cache SMBIOS record.
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@param[out] L2CacheHandle Pointer to the handle of the L2 Cache SMBIOS record.
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@param[out] L3CacheHandle Pointer to the handle of the L3 Cache SMBIOS record.
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**/
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VOID
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AddSmbiosCacheTypeTable (
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IN UINTN ProcessorIndex,
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OUT EFI_SMBIOS_HANDLE *L1CacheHandle,
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OUT EFI_SMBIOS_HANDLE *L2CacheHandle,
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OUT EFI_SMBIOS_HANDLE *L3CacheHandle
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)
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{
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EFI_STATUS Status;
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SMBIOS_TABLE_TYPE7 *Type7Record;
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EFI_SMBIOS_HANDLE SmbiosHandle;
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UINT8 CacheLevel;
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UINT8 MaxCacheLevel;
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BOOLEAN DataCacheType;
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BOOLEAN SeparateCaches;
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Status = EFI_SUCCESS;
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MaxCacheLevel = 0;
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// See if there's an L1 cache present.
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MaxCacheLevel = SmbiosProcessorGetMaxCacheLevel ();
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if (MaxCacheLevel < 1) {
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return;
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}
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for (CacheLevel = 1; CacheLevel <= MaxCacheLevel; CacheLevel++) {
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Type7Record = NULL;
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SeparateCaches = SmbiosProcessorHasSeparateCaches (CacheLevel);
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// At each level of cache, we can have a single type (unified, instruction or data),
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// or two types - separate data and instruction caches. If we have separate
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// instruction and data caches, then on the first iteration (CacheSubLevel = 0)
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// process the instruction cache.
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for (DataCacheType = 0; DataCacheType <= 1; DataCacheType++) {
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// If there's no separate data/instruction cache, skip the second iteration
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if ((DataCacheType == 1) && !SeparateCaches) {
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continue;
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}
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Type7Record = AllocateAndInitCacheInformation (
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CacheLevel,
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DataCacheType,
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!SeparateCaches
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);
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if (Type7Record == NULL) {
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continue;
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}
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ConfigureCacheArchitectureInformation (
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CacheLevel,
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DataCacheType,
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!SeparateCaches,
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Type7Record
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);
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// Allow the platform to fill in other information such as speed, SRAM type etc.
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if (!OemGetCacheInformation (
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ProcessorIndex,
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CacheLevel,
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DataCacheType,
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!SeparateCaches,
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Type7Record
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))
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{
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continue;
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}
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SmbiosHandle = SMBIOS_HANDLE_PI_RESERVED;
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// Finally, install the table
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Status = mSmbios->Add (
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mSmbios,
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NULL,
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&SmbiosHandle,
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(EFI_SMBIOS_TABLE_HEADER *)Type7Record
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);
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if (EFI_ERROR (Status)) {
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continue;
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}
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// Config L1/L2/L3 Cache Handle
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switch (CacheLevel) {
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case CpuCacheL1:
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*L1CacheHandle = SmbiosHandle;
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break;
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case CpuCacheL2:
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*L2CacheHandle = SmbiosHandle;
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break;
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case CpuCacheL3:
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*L3CacheHandle = SmbiosHandle;
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break;
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default:
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break;
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}
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}
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}
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}
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/** Allocates a Type 4 Processor Information structure and sets the
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strings following the data fields.
|
||
|
|
||
|
@param[out] Type4Record The Type 4 structure to allocate and initialize
|
||
|
@param[in] ProcessorIndex The index of the processor
|
||
|
@param[in] Populated Whether the specified processor is
|
||
|
populated.
|
||
|
|
||
|
@retval EFI_SUCCESS The Type 4 structure was successfully
|
||
|
allocated and the strings initialized.
|
||
|
@retval EFI_OUT_OF_RESOURCES Could not allocate memory needed.
|
||
|
**/
|
||
|
EFI_STATUS
|
||
|
AllocateType4AndSetProcessorInformationStrings (
|
||
|
SMBIOS_TABLE_TYPE4 **Type4Record,
|
||
|
UINT8 ProcessorIndex,
|
||
|
BOOLEAN Populated
|
||
|
)
|
||
|
{
|
||
|
EFI_STATUS Status;
|
||
|
EFI_STRING_ID ProcessorManu;
|
||
|
EFI_STRING_ID ProcessorVersion;
|
||
|
EFI_STRING_ID SerialNumber;
|
||
|
EFI_STRING_ID AssetTag;
|
||
|
EFI_STRING_ID PartNumber;
|
||
|
EFI_STRING ProcessorStr;
|
||
|
EFI_STRING ProcessorManuStr;
|
||
|
EFI_STRING ProcessorVersionStr;
|
||
|
EFI_STRING SerialNumberStr;
|
||
|
EFI_STRING AssetTagStr;
|
||
|
EFI_STRING PartNumberStr;
|
||
|
CHAR8 *OptionalStrStart;
|
||
|
CHAR8 *StrStart;
|
||
|
UINTN ProcessorStrLen;
|
||
|
UINTN ProcessorManuStrLen;
|
||
|
UINTN ProcessorVersionStrLen;
|
||
|
UINTN SerialNumberStrLen;
|
||
|
UINTN AssetTagStrLen;
|
||
|
UINTN PartNumberStrLen;
|
||
|
UINTN TotalSize;
|
||
|
UINTN StringBufferSize;
|
||
|
|
||
|
Status = EFI_SUCCESS;
|
||
|
|
||
|
ProcessorManuStr = NULL;
|
||
|
ProcessorVersionStr = NULL;
|
||
|
SerialNumberStr = NULL;
|
||
|
AssetTagStr = NULL;
|
||
|
PartNumberStr = NULL;
|
||
|
|
||
|
ProcessorManu = STRING_TOKEN (STR_PROCESSOR_MANUFACTURE);
|
||
|
ProcessorVersion = STRING_TOKEN (STR_PROCESSOR_VERSION);
|
||
|
SerialNumber = STRING_TOKEN (STR_PROCESSOR_SERIAL_NUMBER);
|
||
|
AssetTag = STRING_TOKEN (STR_PROCESSOR_ASSET_TAG);
|
||
|
PartNumber = STRING_TOKEN (STR_PROCESSOR_PART_NUMBER);
|
||
|
|
||
|
SET_HII_STRING_IF_PCD_NOT_EMPTY (PcdProcessorManufacturer, ProcessorManu);
|
||
|
SET_HII_STRING_IF_PCD_NOT_EMPTY (PcdProcessorAssetTag, AssetTag);
|
||
|
|
||
|
if (StrLen ((CHAR16 *)FixedPcdGetPtr (PcdProcessorSerialNumber)) > 0) {
|
||
|
HiiSetString (mHiiHandle, SerialNumber, (CHAR16 *)FixedPcdGetPtr (PcdProcessorSerialNumber), NULL);
|
||
|
} else {
|
||
|
OemUpdateSmbiosInfo (mHiiHandle, SerialNumber, ProcessorSerialNumType04);
|
||
|
}
|
||
|
|
||
|
if (StrLen ((CHAR16 *)FixedPcdGetPtr (PcdProcessorPartNumber)) > 0) {
|
||
|
HiiSetString (mHiiHandle, PartNumber, (CHAR16 *)FixedPcdGetPtr (PcdProcessorPartNumber), NULL);
|
||
|
} else {
|
||
|
OemUpdateSmbiosInfo (mHiiHandle, PartNumber, ProcessorPartNumType04);
|
||
|
}
|
||
|
|
||
|
if (StrLen ((CHAR16 *)FixedPcdGetPtr (PcdProcessorVersion)) > 0) {
|
||
|
HiiSetString (mHiiHandle, ProcessorVersion, (CHAR16 *)FixedPcdGetPtr (PcdProcessorVersion), NULL);
|
||
|
} else {
|
||
|
OemUpdateSmbiosInfo (mHiiHandle, ProcessorVersion, ProcessorVersionType04);
|
||
|
}
|
||
|
|
||
|
// Processor Designation
|
||
|
StringBufferSize = sizeof (CHAR16) * SMBIOS_STRING_MAX_LENGTH;
|
||
|
ProcessorStr = AllocateZeroPool (StringBufferSize);
|
||
|
if (ProcessorStr == NULL) {
|
||
|
return EFI_OUT_OF_RESOURCES;
|
||
|
}
|
||
|
|
||
|
ProcessorStrLen = UnicodeSPrint (
|
||
|
ProcessorStr,
|
||
|
StringBufferSize,
|
||
|
L"CPU%02d",
|
||
|
ProcessorIndex + 1
|
||
|
);
|
||
|
|
||
|
// Processor Manufacture
|
||
|
ProcessorManuStr = HiiGetPackageString (&gEfiCallerIdGuid, ProcessorManu, NULL);
|
||
|
ProcessorManuStrLen = StrLen (ProcessorManuStr);
|
||
|
|
||
|
// Processor Version
|
||
|
ProcessorVersionStr = HiiGetPackageString (&gEfiCallerIdGuid, ProcessorVersion, NULL);
|
||
|
ProcessorVersionStrLen = StrLen (ProcessorVersionStr);
|
||
|
|
||
|
// Serial Number
|
||
|
SerialNumberStr = HiiGetPackageString (&gEfiCallerIdGuid, SerialNumber, NULL);
|
||
|
SerialNumberStrLen = StrLen (SerialNumberStr);
|
||
|
|
||
|
// Asset Tag
|
||
|
AssetTagStr = HiiGetPackageString (&gEfiCallerIdGuid, AssetTag, NULL);
|
||
|
AssetTagStrLen = StrLen (AssetTagStr);
|
||
|
|
||
|
// Part Number
|
||
|
PartNumberStr = HiiGetPackageString (&gEfiCallerIdGuid, PartNumber, NULL);
|
||
|
PartNumberStrLen = StrLen (PartNumberStr);
|
||
|
|
||
|
TotalSize = sizeof (SMBIOS_TABLE_TYPE4) +
|
||
|
ProcessorStrLen + 1 +
|
||
|
ProcessorManuStrLen + 1 +
|
||
|
ProcessorVersionStrLen + 1 +
|
||
|
SerialNumberStrLen + 1 +
|
||
|
AssetTagStrLen + 1 +
|
||
|
PartNumberStrLen + 1 + 1;
|
||
|
|
||
|
*Type4Record = AllocateZeroPool (TotalSize);
|
||
|
if (*Type4Record == NULL) {
|
||
|
Status = EFI_OUT_OF_RESOURCES;
|
||
|
goto Exit;
|
||
|
}
|
||
|
|
||
|
CopyMem (*Type4Record, &mSmbiosProcessorTableTemplate, sizeof (SMBIOS_TABLE_TYPE4));
|
||
|
|
||
|
OptionalStrStart = (CHAR8 *)(*Type4Record + 1);
|
||
|
UnicodeStrToAsciiStrS (
|
||
|
ProcessorStr,
|
||
|
OptionalStrStart,
|
||
|
ProcessorStrLen + 1
|
||
|
);
|
||
|
|
||
|
StrStart = OptionalStrStart + ProcessorStrLen + 1;
|
||
|
UnicodeStrToAsciiStrS (
|
||
|
ProcessorManuStr,
|
||
|
StrStart,
|
||
|
ProcessorManuStrLen + 1
|
||
|
);
|
||
|
|
||
|
StrStart += ProcessorManuStrLen + 1;
|
||
|
UnicodeStrToAsciiStrS (
|
||
|
ProcessorVersionStr,
|
||
|
StrStart,
|
||
|
ProcessorVersionStrLen + 1
|
||
|
);
|
||
|
|
||
|
StrStart += ProcessorVersionStrLen + 1;
|
||
|
UnicodeStrToAsciiStrS (
|
||
|
SerialNumberStr,
|
||
|
StrStart,
|
||
|
SerialNumberStrLen + 1
|
||
|
);
|
||
|
|
||
|
StrStart += SerialNumberStrLen + 1;
|
||
|
UnicodeStrToAsciiStrS (
|
||
|
AssetTagStr,
|
||
|
StrStart,
|
||
|
AssetTagStrLen + 1
|
||
|
);
|
||
|
|
||
|
StrStart += AssetTagStrLen + 1;
|
||
|
UnicodeStrToAsciiStrS (
|
||
|
PartNumberStr,
|
||
|
StrStart,
|
||
|
PartNumberStrLen + 1
|
||
|
);
|
||
|
|
||
|
Exit:
|
||
|
FreePool (ProcessorStr);
|
||
|
FreePool (ProcessorManuStr);
|
||
|
FreePool (ProcessorVersionStr);
|
||
|
FreePool (SerialNumberStr);
|
||
|
FreePool (AssetTagStr);
|
||
|
FreePool (PartNumberStr);
|
||
|
|
||
|
return Status;
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
Add Type 4 SMBIOS Record for Processor Information.
|
||
|
|
||
|
@param[in] ProcessorIndex Processor index of specified processor.
|
||
|
|
||
|
**/
|
||
|
EFI_STATUS
|
||
|
AddSmbiosProcessorTypeTable (
|
||
|
IN UINTN ProcessorIndex
|
||
|
)
|
||
|
{
|
||
|
EFI_STATUS Status;
|
||
|
SMBIOS_TABLE_TYPE4 *Type4Record;
|
||
|
EFI_SMBIOS_HANDLE SmbiosHandle;
|
||
|
EFI_SMBIOS_HANDLE L1CacheHandle;
|
||
|
EFI_SMBIOS_HANDLE L2CacheHandle;
|
||
|
EFI_SMBIOS_HANDLE L3CacheHandle;
|
||
|
UINT8 *LegacyVoltage;
|
||
|
PROCESSOR_STATUS_DATA ProcessorStatus;
|
||
|
UINT64 *ProcessorId;
|
||
|
PROCESSOR_CHARACTERISTIC_FLAGS ProcessorCharacteristics;
|
||
|
OEM_MISC_PROCESSOR_DATA MiscProcessorData;
|
||
|
BOOLEAN ProcessorPopulated;
|
||
|
|
||
|
Type4Record = NULL;
|
||
|
|
||
|
MiscProcessorData.Voltage = 0;
|
||
|
MiscProcessorData.CurrentSpeed = 0;
|
||
|
MiscProcessorData.CoreCount = 0;
|
||
|
MiscProcessorData.CoresEnabled = 0;
|
||
|
MiscProcessorData.ThreadCount = 0;
|
||
|
MiscProcessorData.MaxSpeed = 0;
|
||
|
L1CacheHandle = 0xFFFF;
|
||
|
L2CacheHandle = 0xFFFF;
|
||
|
L3CacheHandle = 0xFFFF;
|
||
|
|
||
|
ProcessorPopulated = OemIsProcessorPresent (ProcessorIndex);
|
||
|
|
||
|
Status = AllocateType4AndSetProcessorInformationStrings (
|
||
|
&Type4Record,
|
||
|
ProcessorIndex,
|
||
|
ProcessorPopulated
|
||
|
);
|
||
|
if (EFI_ERROR (Status)) {
|
||
|
return Status;
|
||
|
}
|
||
|
|
||
|
OemGetProcessorInformation (
|
||
|
ProcessorIndex,
|
||
|
&ProcessorStatus,
|
||
|
(PROCESSOR_CHARACTERISTIC_FLAGS *)
|
||
|
&Type4Record->ProcessorCharacteristics,
|
||
|
&MiscProcessorData
|
||
|
);
|
||
|
|
||
|
if (ProcessorPopulated) {
|
||
|
AddSmbiosCacheTypeTable (
|
||
|
ProcessorIndex,
|
||
|
&L1CacheHandle,
|
||
|
&L2CacheHandle,
|
||
|
&L3CacheHandle
|
||
|
);
|
||
|
}
|
||
|
|
||
|
LegacyVoltage = (UINT8 *)&Type4Record->Voltage;
|
||
|
|
||
|
*LegacyVoltage = MiscProcessorData.Voltage;
|
||
|
Type4Record->CurrentSpeed = MiscProcessorData.CurrentSpeed;
|
||
|
Type4Record->MaxSpeed = MiscProcessorData.MaxSpeed;
|
||
|
Type4Record->Status = ProcessorStatus.Data;
|
||
|
Type4Record->L1CacheHandle = L1CacheHandle;
|
||
|
Type4Record->L2CacheHandle = L2CacheHandle;
|
||
|
Type4Record->L3CacheHandle = L3CacheHandle;
|
||
|
Type4Record->CoreCount = MiscProcessorData.CoreCount;
|
||
|
Type4Record->CoreCount2 = MiscProcessorData.CoreCount;
|
||
|
Type4Record->EnabledCoreCount = MiscProcessorData.CoresEnabled;
|
||
|
Type4Record->EnabledCoreCount2 = MiscProcessorData.CoresEnabled;
|
||
|
Type4Record->ThreadCount = MiscProcessorData.ThreadCount;
|
||
|
Type4Record->ThreadCount2 = MiscProcessorData.ThreadCount;
|
||
|
|
||
|
Type4Record->CurrentSpeed = GetCpuFrequency (ProcessorIndex);
|
||
|
Type4Record->ExternalClock =
|
||
|
(UINT16)(SmbiosGetExternalClockFrequency () / 1000 / 1000);
|
||
|
|
||
|
ProcessorId = (UINT64 *)&Type4Record->ProcessorId;
|
||
|
*ProcessorId = SmbiosGetProcessorId ();
|
||
|
|
||
|
ProcessorCharacteristics = SmbiosGetProcessorCharacteristics ();
|
||
|
Type4Record->ProcessorCharacteristics |= *((UINT64 *)&ProcessorCharacteristics);
|
||
|
|
||
|
Type4Record->ProcessorFamily = SmbiosGetProcessorFamily ();
|
||
|
Type4Record->ProcessorFamily2 = SmbiosGetProcessorFamily2 ();
|
||
|
|
||
|
SmbiosHandle = SMBIOS_HANDLE_PI_RESERVED;
|
||
|
Status = mSmbios->Add (
|
||
|
mSmbios,
|
||
|
NULL,
|
||
|
&SmbiosHandle,
|
||
|
(EFI_SMBIOS_TABLE_HEADER *)Type4Record
|
||
|
);
|
||
|
|
||
|
if (EFI_ERROR (Status)) {
|
||
|
DEBUG ((
|
||
|
DEBUG_ERROR,
|
||
|
"[%a]:[%dL] Smbios Type04 Table Log Failed! %r \n",
|
||
|
__FUNCTION__,
|
||
|
DEBUG_LINE_NUMBER,
|
||
|
Status
|
||
|
));
|
||
|
}
|
||
|
|
||
|
FreePool (Type4Record);
|
||
|
|
||
|
return Status;
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
Standard EFI driver point.
|
||
|
|
||
|
@param ImageHandle Handle for the image of this driver
|
||
|
@param SystemTable Pointer to the EFI System Table
|
||
|
|
||
|
@retval EFI_SUCCESS The data was successfully stored.
|
||
|
|
||
|
**/
|
||
|
EFI_STATUS
|
||
|
EFIAPI
|
||
|
ProcessorSubClassEntryPoint (
|
||
|
IN EFI_HANDLE ImageHandle,
|
||
|
IN EFI_SYSTEM_TABLE *SystemTable
|
||
|
)
|
||
|
{
|
||
|
EFI_STATUS Status;
|
||
|
UINT32 ProcessorIndex;
|
||
|
|
||
|
//
|
||
|
// Locate dependent protocols
|
||
|
//
|
||
|
Status = gBS->LocateProtocol (&gEfiSmbiosProtocolGuid, NULL, (VOID **)&mSmbios);
|
||
|
if (EFI_ERROR (Status)) {
|
||
|
DEBUG ((DEBUG_ERROR, "Could not locate SMBIOS protocol. %r\n", Status));
|
||
|
return Status;
|
||
|
}
|
||
|
|
||
|
//
|
||
|
// Add our default strings to the HII database. They will be modified later.
|
||
|
//
|
||
|
mHiiHandle = HiiAddPackages (
|
||
|
&gEfiCallerIdGuid,
|
||
|
NULL,
|
||
|
ProcessorSubClassStrings,
|
||
|
NULL,
|
||
|
NULL
|
||
|
);
|
||
|
if (mHiiHandle == NULL) {
|
||
|
return EFI_OUT_OF_RESOURCES;
|
||
|
}
|
||
|
|
||
|
//
|
||
|
// Add SMBIOS tables for populated sockets.
|
||
|
//
|
||
|
for (ProcessorIndex = 0; ProcessorIndex < OemGetMaxProcessors (); ProcessorIndex++) {
|
||
|
Status = AddSmbiosProcessorTypeTable (ProcessorIndex);
|
||
|
if (EFI_ERROR (Status)) {
|
||
|
DEBUG ((DEBUG_ERROR, "Add Processor Type Table Failed! %r.\n", Status));
|
||
|
return Status;
|
||
|
}
|
||
|
}
|
||
|
|
||
|
return Status;
|
||
|
}
|