mirror of
https://github.com/CloverHackyColor/CloverBootloader.git
synced 2024-12-05 13:33:33 +01:00
463 lines
12 KiB
C
463 lines
12 KiB
C
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/** @file
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PEIM to produce gPeiUsb2HostControllerPpiGuid based on gPeiUsbControllerPpiGuid
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which is used to enable recovery function from USB Drivers.
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Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include "EhcPeim.h"
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/**
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Create helper QTD/QH for the EHCI device.
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@param Ehc The EHCI device.
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@retval EFI_OUT_OF_RESOURCES Failed to allocate resource for helper QTD/QH.
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@retval EFI_SUCCESS Helper QH/QTD are created.
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**/
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EFI_STATUS
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EhcCreateHelpQ (
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IN PEI_USB2_HC_DEV *Ehc
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)
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{
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USB_ENDPOINT Ep;
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PEI_EHC_QH *Qh;
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QH_HW *QhHw;
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PEI_EHC_QTD *Qtd;
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//
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// Create an inactive Qtd to terminate the short packet read.
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//
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Qtd = EhcCreateQtd (Ehc, NULL, 0, QTD_PID_INPUT, 0, 64);
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if (Qtd == NULL) {
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return EFI_OUT_OF_RESOURCES;
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}
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Qtd->QtdHw.Status = QTD_STAT_HALTED;
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Ehc->ShortReadStop = Qtd;
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//
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// Create a QH to act as the EHC reclamation header.
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// Set the header to loopback to itself.
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//
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Ep.DevAddr = 0;
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Ep.EpAddr = 1;
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Ep.Direction = EfiUsbDataIn;
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Ep.DevSpeed = EFI_USB_SPEED_HIGH;
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Ep.MaxPacket = 64;
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Ep.HubAddr = 0;
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Ep.HubPort = 0;
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Ep.Toggle = 0;
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Ep.Type = EHC_BULK_TRANSFER;
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Ep.PollRate = 1;
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Qh = EhcCreateQh (Ehc, &Ep);
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if (Qh == NULL) {
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return EFI_OUT_OF_RESOURCES;
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}
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QhHw = &Qh->QhHw;
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QhHw->HorizonLink = QH_LINK (QhHw, EHC_TYPE_QH, FALSE);
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QhHw->Status = QTD_STAT_HALTED;
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QhHw->ReclaimHead = 1;
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Ehc->ReclaimHead = Qh;
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//
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// Create a dummy QH to act as the terminator for periodical schedule
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//
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Ep.EpAddr = 2;
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Ep.Type = EHC_INT_TRANSFER_SYNC;
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Qh = EhcCreateQh (Ehc, &Ep);
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if (Qh == NULL) {
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return EFI_OUT_OF_RESOURCES;
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}
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Qh->QhHw.Status = QTD_STAT_HALTED;
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Ehc->PeriodOne = Qh;
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return EFI_SUCCESS;
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}
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/**
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Initialize the schedule data structure such as frame list.
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@param Ehc The EHCI device to init schedule data for.
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@retval EFI_OUT_OF_RESOURCES Failed to allocate resource to init schedule data.
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@retval EFI_SUCCESS The schedule data is initialized.
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**/
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EFI_STATUS
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EhcInitSched (
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IN PEI_USB2_HC_DEV *Ehc
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)
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{
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VOID *Buf;
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EFI_PHYSICAL_ADDRESS PhyAddr;
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VOID *Map;
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UINTN Index;
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UINT32 *Desc;
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EFI_STATUS Status;
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EFI_PHYSICAL_ADDRESS PciAddr;
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//
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// First initialize the periodical schedule data:
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// 1. Allocate and map the memory for the frame list
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// 2. Create the help QTD/QH
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// 3. Initialize the frame entries
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// 4. Set the frame list register
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//
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//
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// The Frame List ocupies 4K bytes,
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// and must be aligned on 4-Kbyte boundaries.
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//
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Status = IoMmuAllocateBuffer (
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Ehc->IoMmu,
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1,
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&Buf,
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&PhyAddr,
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&Map
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);
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if (EFI_ERROR (Status) || (Buf == NULL)) {
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return EFI_OUT_OF_RESOURCES;
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}
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Ehc->PeriodFrame = Buf;
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Ehc->PeriodFrameMap = Map;
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Ehc->High32bitAddr = EHC_HIGH_32BIT (PhyAddr);
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//
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// Init memory pool management then create the helper
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// QTD/QH. If failed, previously allocated resources
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// will be freed by EhcFreeSched
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//
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Ehc->MemPool = UsbHcInitMemPool (
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Ehc,
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EHC_BIT_IS_SET (Ehc->HcCapParams, HCCP_64BIT),
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Ehc->High32bitAddr
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);
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if (Ehc->MemPool == NULL) {
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return EFI_OUT_OF_RESOURCES;
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}
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Status = EhcCreateHelpQ (Ehc);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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//
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// Initialize the frame list entries then set the registers
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//
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Desc = (UINT32 *) Ehc->PeriodFrame;
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PciAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, Ehc->PeriodOne, sizeof (PEI_EHC_QH));
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for (Index = 0; Index < EHC_FRAME_LEN; Index++) {
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Desc[Index] = QH_LINK (PciAddr, EHC_TYPE_QH, FALSE);
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}
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EhcWriteOpReg (Ehc, EHC_FRAME_BASE_OFFSET, EHC_LOW_32BIT (PhyAddr));
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//
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// Second initialize the asynchronous schedule:
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// Only need to set the AsynListAddr register to
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// the reclamation header
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//
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PciAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, Ehc->ReclaimHead, sizeof (PEI_EHC_QH));
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EhcWriteOpReg (Ehc, EHC_ASYNC_HEAD_OFFSET, EHC_LOW_32BIT (PciAddr));
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return EFI_SUCCESS;
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}
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/**
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Free the schedule data. It may be partially initialized.
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@param Ehc The EHCI device.
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**/
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VOID
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EhcFreeSched (
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IN PEI_USB2_HC_DEV *Ehc
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)
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{
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EhcWriteOpReg (Ehc, EHC_FRAME_BASE_OFFSET, 0);
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EhcWriteOpReg (Ehc, EHC_ASYNC_HEAD_OFFSET, 0);
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if (Ehc->PeriodOne != NULL) {
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UsbHcFreeMem (Ehc, Ehc->MemPool, Ehc->PeriodOne, sizeof (PEI_EHC_QH));
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Ehc->PeriodOne = NULL;
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}
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if (Ehc->ReclaimHead != NULL) {
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UsbHcFreeMem (Ehc, Ehc->MemPool, Ehc->ReclaimHead, sizeof (PEI_EHC_QH));
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Ehc->ReclaimHead = NULL;
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}
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if (Ehc->ShortReadStop != NULL) {
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UsbHcFreeMem (Ehc, Ehc->MemPool, Ehc->ShortReadStop, sizeof (PEI_EHC_QTD));
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Ehc->ShortReadStop = NULL;
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}
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if (Ehc->MemPool != NULL) {
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UsbHcFreeMemPool (Ehc, Ehc->MemPool);
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Ehc->MemPool = NULL;
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}
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if (Ehc->PeriodFrame != NULL) {
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IoMmuFreeBuffer (Ehc->IoMmu, 1, Ehc->PeriodFrame, Ehc->PeriodFrameMap);
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Ehc->PeriodFrame = NULL;
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}
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}
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/**
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Link the queue head to the asynchronous schedule list.
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UEFI only supports one CTRL/BULK transfer at a time
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due to its interfaces. This simplifies the AsynList
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management: A reclamation header is always linked to
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the AsyncListAddr, the only active QH is appended to it.
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@param Ehc The EHCI device.
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@param Qh The queue head to link.
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**/
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VOID
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EhcLinkQhToAsync (
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IN PEI_USB2_HC_DEV *Ehc,
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IN PEI_EHC_QH *Qh
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)
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{
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PEI_EHC_QH *Head;
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//
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// Append the queue head after the reclaim header, then
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// fix the hardware visiable parts (EHCI R1.0 page 72).
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// ReclaimHead is always linked to the EHCI's AsynListAddr.
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//
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Head = Ehc->ReclaimHead;
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Qh->NextQh = Head->NextQh;
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Head->NextQh = Qh;
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Qh->QhHw.HorizonLink = QH_LINK (Head, EHC_TYPE_QH, FALSE);;
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Head->QhHw.HorizonLink = QH_LINK (Qh, EHC_TYPE_QH, FALSE);
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}
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/**
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Unlink a queue head from the asynchronous schedule list.
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Need to synchronize with hardware.
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@param Ehc The EHCI device.
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@param Qh The queue head to unlink.
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**/
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VOID
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EhcUnlinkQhFromAsync (
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IN PEI_USB2_HC_DEV *Ehc,
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IN PEI_EHC_QH *Qh
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)
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{
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PEI_EHC_QH *Head;
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ASSERT (Ehc->ReclaimHead->NextQh == Qh);
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//
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// Remove the QH from reclamation head, then update the hardware
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// visiable part: Only need to loopback the ReclaimHead. The Qh
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// is pointing to ReclaimHead (which is staill in the list).
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//
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Head = Ehc->ReclaimHead;
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Head->NextQh = Qh->NextQh;
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Qh->NextQh = NULL;
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Head->QhHw.HorizonLink = QH_LINK (Head, EHC_TYPE_QH, FALSE);
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//
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// Set and wait the door bell to synchronize with the hardware
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//
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EhcSetAndWaitDoorBell (Ehc, EHC_GENERIC_TIMEOUT);
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return;
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}
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/**
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Check the URB's execution result and update the URB's
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result accordingly.
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@param Ehc The EHCI device.
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@param Urb The URB to check result.
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@retval TRUE URB transfer is finialized.
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@retval FALSE URB transfer is not finialized.
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**/
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BOOLEAN
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EhcCheckUrbResult (
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IN PEI_USB2_HC_DEV *Ehc,
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IN PEI_URB *Urb
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)
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{
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EFI_LIST_ENTRY *Entry;
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PEI_EHC_QTD *Qtd;
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QTD_HW *QtdHw;
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UINT8 State;
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BOOLEAN Finished;
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ASSERT ((Ehc != NULL) && (Urb != NULL) && (Urb->Qh != NULL));
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Finished = TRUE;
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Urb->Completed = 0;
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Urb->Result = EFI_USB_NOERROR;
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if (EhcIsHalt (Ehc) || EhcIsSysError (Ehc)) {
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Urb->Result |= EFI_USB_ERR_SYSTEM;
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goto ON_EXIT;
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}
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EFI_LIST_FOR_EACH (Entry, &Urb->Qh->Qtds) {
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Qtd = EFI_LIST_CONTAINER (Entry, PEI_EHC_QTD, QtdList);
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QtdHw = &Qtd->QtdHw;
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State = (UINT8) QtdHw->Status;
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if (EHC_BIT_IS_SET (State, QTD_STAT_HALTED)) {
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//
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// EHCI will halt the queue head when met some error.
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// If it is halted, the result of URB is finialized.
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//
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if ((State & QTD_STAT_ERR_MASK) == 0) {
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Urb->Result |= EFI_USB_ERR_STALL;
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}
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if (EHC_BIT_IS_SET (State, QTD_STAT_BABBLE_ERR)) {
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Urb->Result |= EFI_USB_ERR_BABBLE;
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}
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if (EHC_BIT_IS_SET (State, QTD_STAT_BUFF_ERR)) {
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Urb->Result |= EFI_USB_ERR_BUFFER;
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}
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if (EHC_BIT_IS_SET (State, QTD_STAT_TRANS_ERR) && (QtdHw->ErrCnt == 0)) {
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Urb->Result |= EFI_USB_ERR_TIMEOUT;
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}
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Finished = TRUE;
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goto ON_EXIT;
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} else if (EHC_BIT_IS_SET (State, QTD_STAT_ACTIVE)) {
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//
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// The QTD is still active, no need to check furthur.
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//
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Urb->Result |= EFI_USB_ERR_NOTEXECUTE;
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Finished = FALSE;
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goto ON_EXIT;
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} else {
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//
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// This QTD is finished OK or met short packet read. Update the
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// transfer length if it isn't a setup.
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//
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if (QtdHw->Pid != QTD_PID_SETUP) {
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Urb->Completed += Qtd->DataLen - QtdHw->TotalBytes;
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}
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if ((QtdHw->TotalBytes != 0) && (QtdHw->Pid == QTD_PID_INPUT)) {
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//EHC_DUMP_QH ((Urb->Qh, "Short packet read", FALSE));
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//
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// Short packet read condition. If it isn't a setup transfer,
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// no need to check furthur: the queue head will halt at the
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// ShortReadStop. If it is a setup transfer, need to check the
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// Status Stage of the setup transfer to get the finial result
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//
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if (QtdHw->AltNext == QTD_LINK (Ehc->ShortReadStop, FALSE)) {
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Finished = TRUE;
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goto ON_EXIT;
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}
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}
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}
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}
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ON_EXIT:
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//
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// Return the data toggle set by EHCI hardware, bulk and interrupt
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// transfer will use this to initialize the next transaction. For
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// Control transfer, it always start a new data toggle sequence for
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// new transfer.
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//
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// NOTICE: don't move DT update before the loop, otherwise there is
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// a race condition that DT is wrong.
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//
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Urb->DataToggle = (UINT8) Urb->Qh->QhHw.DataToggle;
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return Finished;
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}
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/**
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Execute the transfer by polling the URB. This is a synchronous operation.
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@param Ehc The EHCI device.
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@param Urb The URB to execute.
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@param TimeOut The time to wait before abort, in millisecond.
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@retval EFI_DEVICE_ERROR The transfer failed due to transfer error.
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@retval EFI_TIMEOUT The transfer failed due to time out.
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@retval EFI_SUCCESS The transfer finished OK.
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**/
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EFI_STATUS
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EhcExecTransfer (
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IN PEI_USB2_HC_DEV *Ehc,
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IN PEI_URB *Urb,
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IN UINTN TimeOut
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)
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{
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EFI_STATUS Status;
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UINTN Index;
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UINTN Loop;
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BOOLEAN Finished;
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BOOLEAN InfiniteLoop;
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Status = EFI_SUCCESS;
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Loop = TimeOut * EHC_1_MILLISECOND;
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Finished = FALSE;
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InfiniteLoop = FALSE;
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//
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// If Timeout is 0, then the caller must wait for the function to be completed
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// until EFI_SUCCESS or EFI_DEVICE_ERROR is returned.
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//
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if (TimeOut == 0) {
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InfiniteLoop = TRUE;
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}
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for (Index = 0; InfiniteLoop || (Index < Loop); Index++) {
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||
|
Finished = EhcCheckUrbResult (Ehc, Urb);
|
||
|
|
||
|
if (Finished) {
|
||
|
break;
|
||
|
}
|
||
|
|
||
|
MicroSecondDelay (EHC_1_MICROSECOND);
|
||
|
}
|
||
|
|
||
|
if (!Finished) {
|
||
|
Status = EFI_TIMEOUT;
|
||
|
} else if (Urb->Result != EFI_USB_NOERROR) {
|
||
|
Status = EFI_DEVICE_ERROR;
|
||
|
}
|
||
|
|
||
|
return Status;
|
||
|
}
|
||
|
|