diff --git a/Clover.dsc b/Clover.dsc index 41730b220..5041de790 100644 --- a/Clover.dsc +++ b/Clover.dsc @@ -203,6 +203,7 @@ # OcMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf OcMiscLib|OpenCorePkg/Library/OcMiscLib/OcMiscLib.inf OcOSInfoLib|OpenCorePkg/Library/OcOSInfoLib/OcOSInfoLib.inf + OcPciIoLib|OpenCorePkg/Library/OcPciIoLib/OcPciIoLib.inf # OcPngLib|OpenCorePkg/Library/OcPngLib/OcPngLib.inf OcRngLib|OpenCorePkg/Library/OcRngLib/OcRngLib.inf OcRtcLib|OpenCorePkg/Library/OcRtcLib/OcRtcLib.inf @@ -219,6 +220,7 @@ OcAppleKernelLib|OpenCorePkg/Library/OcAppleKernelLib/OcAppleKernelLib.inf OcMachoLib|OpenCorePkg/Library/OcMachoLib/OcMachoLib.inf OcVirtualFsLib|OpenCorePkg/Library/OcVirtualFsLib/OcVirtualFsLib.inf + OcPeCoffExtLib|OpenCorePkg/Library/OcPeCoffExtLib/OcPeCoffExtLib.inf OcMacInfoLib|OpenCorePkg/Library/OcMacInfoLib/OcMacInfoLib.inf OcApfsLib|OpenCorePkg/Library/OcApfsLib/OcApfsLib.inf OcAppleSecureBootLib|OpenCorePkg/Library/OcAppleSecureBootLib/OcAppleSecureBootLib.inf @@ -233,18 +235,22 @@ OcAppleUserInterfaceThemeLib|OpenCorePkg/Library/OcAppleUserInterfaceThemeLib/OcAppleUserInterfaceThemeLib.inf OcConfigurationLib|OpenCorePkg/Library/OcConfigurationLib/OcConfigurationLib.inf OcDevicePropertyLib|OpenCorePkg/Library/OcDevicePropertyLib/OcDevicePropertyLib.inf + OcDirectResetLib|OpenCorePkg/Library/OcDirectResetLib/OcDirectResetLib.inf # OcFirmwareVolumeLib|OpenCorePkg/Library/OcFirmwareVolumeLib/OcFirmwareVolumeLib.inf OcHashServicesLib|OpenCorePkg/Library/OcHashServicesLib/OcHashServicesLib.inf OcSmbiosLib|OpenCorePkg/Library/OcSmbiosLib/OcSmbiosLib.inf # OcSmcLib|OpenCorePkg/Library/OcSmcLib/OcSmcLib.inf OcUnicodeCollationEngGenericLib|OpenCorePkg/Library/OcUnicodeCollationEngLib/OcUnicodeCollationEngGenericLib.inf - OcPeCoffExtLib|OpenCorePkg/Library/OcPeCoffExtLib/OcPeCoffExtLib.inf - OcPeCoffLib|OpenCorePkg/Library/OcPeCoffLib/OcPeCoffLib.inf - OcVariableLib|OpenCorePkg/Library/OcVariableLib/OcVariableLib.inf +# OcPeCoffExtLib|OpenCorePkg/Library/OcPeCoffExtLib/OcPeCoffExtLib.inf +# OcPeCoffLib|OpenCorePkg/Library/OcPeCoffLib/OcPeCoffLib.inf + PeCoffLib2|MdePkg/Library/BasePeCoffLib2/BasePeCoffLib2.inf + UefiImageExtraActionLib|MdePkg/Library/BaseUefiImageExtraActionLibNull/BaseUefiImageExtraActionLibNull.inf ResetSystemLib|OpenCorePkg/Library/OcResetSystemLib/OcResetSystemLib.inf + OcVariableLib|OpenCorePkg/Library/OcVariableLib/OcVariableLib.inf + - OpenCoreLib|OpenCorePkg/Application/OpenCore/OpenCoreLib.inf +# OpenCoreLib|OpenCorePkg/Application/OpenCore/OpenCoreLib.inf OcDebugLogLibOc2Clover|OpenCorePkg/Library/OcDebugLogLibOc2Clover/OcDebugLogLibOc2Clover.inf #MachoLib|Library/MachoLib/MachoLib.inf @@ -307,10 +313,10 @@ DEFINE OC_INCLUDE_FLAG = -include OpenCoreFromClover.h !endif - OpenCorePkg/Application/OpenCore/OpenCoreLib.inf { - - *_*_*_CC_FLAGS = $(OC_INCLUDE_FLAG) - } +# OpenCorePkg/Application/OpenCore/OpenCoreLib.inf { +# +# *_*_*_CC_FLAGS = $(OC_INCLUDE_FLAG) +# } OpenCorePkg/Library/OcGuardLib/OcGuardLib.inf { *_*_*_CC_FLAGS = $(OC_INCLUDE_FLAG) @@ -489,6 +495,10 @@ *_*_*_CC_FLAGS = $(OC_INCLUDE_FLAG) } + OpenCorePkg/Library/OcDirectResetLib/OcDirectResetLib.inf { + + *_*_*_CC_FLAGS = $(OC_INCLUDE_FLAG) + } # OpenCorePkg/Library/OcFirmwareVolumeLib/OcFirmwareVolumeLib.inf { # # *_*_*_CC_FLAGS = $(OC_INCLUDE_FLAG) @@ -509,10 +519,10 @@ *_*_*_CC_FLAGS = $(OC_INCLUDE_FLAG) } - OpenCorePkg/Library/OcPeCoffLib/OcPeCoffLib.inf { - - *_*_*_CC_FLAGS = $(OC_INCLUDE_FLAG) - } +# OpenCorePkg/Library/OcPeCoffLib/OcPeCoffLib.inf { +# +# *_*_*_CC_FLAGS = $(OC_INCLUDE_FLAG) +# } OpenCorePkg/Library/OcVariableLib/OcVariableLib.inf { *_*_*_CC_FLAGS = $(OC_INCLUDE_FLAG) @@ -821,7 +831,7 @@ #Sample/Application/Sample.inf #gptsync/gptsync.inf bdmesg_efi/bdmesg.inf - OpenCorePkg/Application/ControlMsrE2/ControlMsrE2Clover.inf + #OpenCorePkg/Application/ControlMsrE2/ControlMsrE2Clover.inf !ifndef NO_CLOVER_SHELL ShellPkg/Library/UefiShellNetwork1CommandsLib/UefiShellNetwork1CommandsLib.inf @@ -869,6 +879,20 @@ rEFIt_UEFI/refit.inf { gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80000042 } +#from OpenCore +[PcdsPatchableInModule] + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterAccessWidth|8 + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio|FALSE + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseHardwareFlowControl|FALSE + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialDetectCable|FALSE + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x03F8 + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate|115200 + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialLineControl|0x03 + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialFifoControl|0x07 + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate|1843200 + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialPciDeviceInfo|{0xFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialExtendedTxFifoSize|64 + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterStride|1 [Components.X64] diff --git a/Include/IndustryStandard/VirtualMemory.h b/Include/IndustryStandard/VirtualMemory.h old mode 100755 new mode 100644 index a9c81c2d8..e2c8642b5 --- a/Include/IndustryStandard/VirtualMemory.h +++ b/Include/IndustryStandard/VirtualMemory.h @@ -27,18 +27,18 @@ SPDX-License-Identifier: BSD-2-Clause-Patent typedef union { struct { - UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory - UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write - UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User - UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching - UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached - UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU) - UINT64 Reserved:1; // Reserved - UINT64 MustBeZero:2; // Must Be Zero - UINT64 Available:3; // Available for use by system software - UINT64 PageTableBaseAddress:40; // Page Table Base Address - UINT64 AvabilableHigh:11; // Available for use by system software - UINT64 Nx:1; // No Execute bit + UINT64 Present : 1; // 0 = Not present in memory, 1 = Present in memory + UINT64 ReadWrite : 1; // 0 = Read-Only, 1= Read/Write + UINT64 UserSupervisor : 1; // 0 = Supervisor, 1=User + UINT64 WriteThrough : 1; // 0 = Write-Back caching, 1=Write-Through caching + UINT64 CacheDisabled : 1; // 0 = Cached, 1=Non-Cached + UINT64 Accessed : 1; // 0 = Not accessed, 1 = Accessed (set by CPU) + UINT64 Reserved : 1; // Reserved + UINT64 MustBeZero : 2; // Must Be Zero + UINT64 Available : 3; // Available for use by system software + UINT64 PageTableBaseAddress : 40; // Page Table Base Address + UINT64 AvabilableHigh : 11; // Available for use by system software + UINT64 Nx : 1; // No Execute bit } Bits; UINT64 Uint64; } PAGE_MAP_AND_DIRECTORY_POINTER; @@ -48,19 +48,19 @@ typedef union { // typedef union { struct { - UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory - UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write - UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User - UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching - UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached - UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU) - UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page - UINT64 PAT:1; // - UINT64 Global:1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write - UINT64 Available:3; // Available for use by system software - UINT64 PageTableBaseAddress:40; // Page Table Base Address - UINT64 AvabilableHigh:11; // Available for use by system software - UINT64 Nx:1; // 0 = Execute Code, 1 = No Code Execution + UINT64 Present : 1; // 0 = Not present in memory, 1 = Present in memory + UINT64 ReadWrite : 1; // 0 = Read-Only, 1= Read/Write + UINT64 UserSupervisor : 1; // 0 = Supervisor, 1=User + UINT64 WriteThrough : 1; // 0 = Write-Back caching, 1=Write-Through caching + UINT64 CacheDisabled : 1; // 0 = Cached, 1=Non-Cached + UINT64 Accessed : 1; // 0 = Not accessed, 1 = Accessed (set by CPU) + UINT64 Dirty : 1; // 0 = Not Dirty, 1 = written by processor on access to page + UINT64 PAT : 1; // Combines with CD, WT and MTRR to define true caching type + UINT64 Global : 1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write + UINT64 Available : 3; // Available for use by system software + UINT64 PageTableBaseAddress : 40; // Page Table Base Address + UINT64 AvabilableHigh : 11; // Available for use by system software + UINT64 Nx : 1; // 0 = Execute Code, 1 = No Code Execution } Bits; UINT64 Uint64; } PAGE_TABLE_4K_ENTRY; @@ -70,21 +70,21 @@ typedef union { // typedef union { struct { - UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory - UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write - UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User - UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching - UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached - UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU) - UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page - UINT64 MustBe1:1; // Must be 1 - UINT64 Global:1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write - UINT64 Available:3; // Available for use by system software - UINT64 PAT:1; // - UINT64 MustBeZero:8; // Must be zero; - UINT64 PageTableBaseAddress:31; // Page Table Base Address - UINT64 AvabilableHigh:11; // Available for use by system software - UINT64 Nx:1; // 0 = Execute Code, 1 = No Code Execution + UINT64 Present : 1; // 0 = Not present in memory, 1 = Present in memory + UINT64 ReadWrite : 1; // 0 = Read-Only, 1= Read/Write + UINT64 UserSupervisor : 1; // 0 = Supervisor, 1=User + UINT64 WriteThrough : 1; // 0 = Write-Back caching, 1=Write-Through caching + UINT64 CacheDisabled : 1; // 0 = Cached, 1=Non-Cached + UINT64 Accessed : 1; // 0 = Not accessed, 1 = Accessed (set by CPU) + UINT64 Dirty : 1; // 0 = Not Dirty, 1 = written by processor on access to page + UINT64 MustBe1 : 1; // Must be 1 + UINT64 Global : 1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write + UINT64 Available : 3; // Available for use by system software + UINT64 PAT : 1; // Combines with CD, WT and MTRR to define true caching type + UINT64 MustBeZero : 8; // Must be zero; + UINT64 PageTableBaseAddress : 31; // Page Table Base Address + UINT64 AvabilableHigh : 11; // Available for use by system software + UINT64 Nx : 1; // 0 = Execute Code, 1 = No Code Execution } Bits; UINT64 Uint64; } PAGE_TABLE_2M_ENTRY; @@ -94,60 +94,75 @@ typedef union { // typedef union { struct { - UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory - UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write - UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User - UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching - UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached - UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU) - UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page - UINT64 MustBe1:1; // Must be 1 - UINT64 Global:1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write - UINT64 Available:3; // Available for use by system software - UINT64 PAT:1; // - UINT64 MustBeZero:17; // Must be zero; - UINT64 PageTableBaseAddress:22; // Page Table Base Address - UINT64 AvabilableHigh:11; // Available for use by system software - UINT64 Nx:1; // 0 = Execute Code, 1 = No Code Execution + UINT64 Present : 1; // 0 = Not present in memory, 1 = Present in memory + UINT64 ReadWrite : 1; // 0 = Read-Only, 1= Read/Write + UINT64 UserSupervisor : 1; // 0 = Supervisor, 1=User + UINT64 WriteThrough : 1; // 0 = Write-Back caching, 1=Write-Through caching + UINT64 CacheDisabled : 1; // 0 = Cached, 1=Non-Cached + UINT64 Accessed : 1; // 0 = Not accessed, 1 = Accessed (set by CPU) + UINT64 Dirty : 1; // 0 = Not Dirty, 1 = written by processor on access to page + UINT64 MustBe1 : 1; // Must be 1 + UINT64 Global : 1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write + UINT64 Available : 3; // Available for use by system software + UINT64 PAT : 1; // Combines with CD, WT and MTRR to define true caching type + UINT64 MustBeZero : 17; // Must be zero; + UINT64 PageTableBaseAddress : 22; // Page Table Base Address + UINT64 AvabilableHigh : 11; // Available for use by system software + UINT64 Nx : 1; // 0 = Execute Code, 1 = No Code Execution } Bits; UINT64 Uint64; } PAGE_TABLE_1G_ENTRY; +// +// PAT index bits. +// typedef union { struct { - UINT64 PhysPgOffset:12; // 0 = Physical Page Offset - UINT64 PTOffset:9; // 0 = Page Table Offset - UINT64 PDOffset:9; // 0 = Page Directory Offset - UINT64 PDPOffset:9; // 0 = Page Directory Pointer Offset - UINT64 PML4Offset:9; // 0 = Page Map Level 4 Offset - UINT64 SignExtend:16; // 0 = Sign Extend + UINT8 WriteThrough : 1; // 0 = Write-Back caching, 1=Write-Through caching + UINT8 CacheDisabled : 1; // 0 = Cached, 1=Non-Cached + UINT8 PAT : 1; // Combines with CD, WT and MTRR to define true caching type + UINT8 Reserved : 5; // Reserved + } Bits; + UINT8 Index; +} PAT_INDEX; + +typedef union { + struct { + UINT64 PhysPgOffset : 12; // 0 = Physical Page Offset + UINT64 PTOffset : 9; // 0 = Page Table Offset + UINT64 PDOffset : 9; // 0 = Page Directory Offset + UINT64 PDPOffset : 9; // 0 = Page Directory Pointer Offset + UINT64 PML4Offset : 9; // 0 = Page Map Level 4 Offset + UINT64 SignExtend : 16; // 0 = Sign Extend } Pg4K; struct { - UINT64 PhysPgOffset:21; // 0 = Physical Page Offset - UINT64 PDOffset:9; // 0 = Page Directory Offset - UINT64 PDPOffset:9; // 0 = Page Directory Pointer Offset - UINT64 PML4Offset:9; // 0 = Page Map Level 4 Offset - UINT64 SignExtend:16; // 0 = Sign Extend + UINT64 PhysPgOffset : 21; // 0 = Physical Page Offset + UINT64 PDOffset : 9; // 0 = Page Directory Offset + UINT64 PDPOffset : 9; // 0 = Page Directory Pointer Offset + UINT64 PML4Offset : 9; // 0 = Page Map Level 4 Offset + UINT64 SignExtend : 16; // 0 = Sign Extend } Pg2M; struct { - UINT64 PhysPgOffset:30; // 0 = Physical Page Offset - UINT64 PDPOffset:9; // 0 = Page Directory Pointer Offset - UINT64 PML4Offset:9; // 0 = Page Map Level 4 Offset - UINT64 SignExtend:16; // 0 = Sign Extend + UINT64 PhysPgOffset : 30; // 0 = Physical Page Offset + UINT64 PDPOffset : 9; // 0 = Page Directory Pointer Offset + UINT64 PML4Offset : 9; // 0 = Page Map Level 4 Offset + UINT64 SignExtend : 16; // 0 = Sign Extend } Pg1G; UINT64 Uint64; } VIRTUAL_ADDR; -#define VA_FIX_SIGN_EXTEND(VA) ((VA).Pg4K.SignExtend = ((VA).Pg4K.PML4Offset & 0x100U) ? 0xFFFFU : 0U); +#define VA_FIX_SIGN_EXTEND(VA) ((VA).Pg4K.SignExtend = ((VA).Pg4K.PML4Offset & 0x100U) ? 0xFFFFU : 0U); #pragma pack(pop) -#define CR3_ADDR_MASK 0x000FFFFFFFFFF000ull -#define CR3_FLAG_PWT 0x0000000000000008ull -#define CR3_FLAG_PCD 0x0000000000000010ull +#define CR0_WP BIT16 -#define PAGING_4K_ADDRESS_MASK_64 0x000FFFFFFFFFF000ull -#define PAGING_2M_ADDRESS_MASK_64 0x000FFFFFFFE00000ull -#define PAGING_1G_ADDRESS_MASK_64 0x000FFFFFC0000000ull +#define CR3_ADDR_MASK 0x000FFFFFFFFFF000ull +#define CR3_FLAG_PWT 0x0000000000000008ull +#define CR3_FLAG_PCD 0x0000000000000010ull + +#define PAGING_4K_ADDRESS_MASK_64 0x000FFFFFFFFFF000ull +#define PAGING_2M_ADDRESS_MASK_64 0x000FFFFFFFE00000ull +#define PAGING_1G_ADDRESS_MASK_64 0x000FFFFFC0000000ull #endif // VIRTUAL_MEMORY_H diff --git a/OpenCorePkg b/OpenCorePkg index f184c6d35..a82ac0b0e 160000 --- a/OpenCorePkg +++ b/OpenCorePkg @@ -1 +1 @@ -Subproject commit f184c6d350c3ad000deff5d3f949d8fd7d3ec183 +Subproject commit a82ac0b0ec755ddc8094d4dd3f5c645ca1320090 diff --git a/rEFIt_UEFI/include/OC.h b/rEFIt_UEFI/include/OC.h index d078e2f34..599c9b639 100644 --- a/rEFIt_UEFI/include/OC.h +++ b/rEFIt_UEFI/include/OC.h @@ -37,15 +37,15 @@ extern OC_CPU_INFO mOpenCoreCpuInfo; //extern EFI_HANDLE mLoadHandle; -EFI_STATUS -EFIAPI -OcKernelFileOpen ( - IN EFI_FILE_PROTOCOL *This, - OUT EFI_FILE_PROTOCOL **NewHandle, - IN CHAR16 *FileName, - IN UINT64 OpenMode, - IN UINT64 Attributes - ); +//EFI_STATUS +//EFIAPI +//OcKernelFileOpen ( +// IN EFI_FILE_PROTOCOL *This, +// OUT EFI_FILE_PROTOCOL **NewHandle, +// IN CHAR16 *FileName, +// IN UINT64 OpenMode, +// IN UINT64 Attributes +// ); EFI_STATUS EFIAPI diff --git a/rEFIt_UEFI/refit.inf b/rEFIt_UEFI/refit.inf index 641ded1af..6bb00ee84 100644 --- a/rEFIt_UEFI/refit.inf +++ b/rEFIt_UEFI/refit.inf @@ -436,7 +436,7 @@ VideoBiosPatchLib # OpensslLib # for secureboot, I think WaveLib - OpenCoreLib + OcMainLib DebugLib OcDebugLogLibOc2Clover CppMemLib diff --git a/rEFIt_UEFI/refit/main.cpp b/rEFIt_UEFI/refit/main.cpp index 1fb13cf9b..147cdb61c 100644 --- a/rEFIt_UEFI/refit/main.cpp +++ b/rEFIt_UEFI/refit/main.cpp @@ -255,6 +255,106 @@ void AllocSmallBlocks() } } +OC_GLOBAL_CONFIG + mOpenCoreConfiguration; + +OC_STORAGE_CONTEXT + mOpenCoreStorage; + +OC_CPU_INFO + mOpenCoreCpuInfo; + +UINT8 + mOpenCoreBooterHash[SHA1_DIGEST_SIZE]; + +OC_RSA_PUBLIC_KEY * + mOpenCoreVaultKey; + +OC_PRIVILEGE_CONTEXT + mOpenCorePrivilege; + +EFI_HANDLE + mStorageHandle; + +EFI_DEVICE_PATH_PROTOCOL * + mStoragePath; + +CHAR16 * + mStorageRoot; + +VOID +OcMain ( + IN OC_STORAGE_CONTEXT *Storage, + IN EFI_DEVICE_PATH_PROTOCOL *LoadPath + ) +{ + EFI_STATUS Status; +// OC_PRIVILEGE_CONTEXT *Privilege; + + DEBUG ((DEBUG_INFO, "OC: OcMiscEarlyInit...\n")); + Status = OcMiscEarlyInit ( + Storage, + &mOpenCoreConfiguration, + mOpenCoreVaultKey + ); + + if (EFI_ERROR (Status)) { + return; + } + + OcCpuScanProcessor (&mOpenCoreCpuInfo); + + DEBUG ((DEBUG_INFO, "OC: OcLoadNvramSupport...\n")); + OcLoadNvramSupport (Storage, &mOpenCoreConfiguration); + DEBUG ((DEBUG_INFO, "OC: OcMiscMiddleInit...\n")); + OcMiscMiddleInit ( + Storage, + &mOpenCoreConfiguration, + mStorageRoot, + LoadPath, + mStorageHandle, + mOpenCoreConfiguration.Booter.Quirks.ForceBooterSignature ? mOpenCoreBooterHash : NULL + ); + DEBUG ((DEBUG_INFO, "OC: OcLoadUefiSupport...\n")); + OcLoadUefiSupport (Storage, &mOpenCoreConfiguration, &mOpenCoreCpuInfo, mOpenCoreBooterHash); + DEBUG_CODE_BEGIN (); + DEBUG ((DEBUG_INFO, "OC: OcMiscLoadSystemReport...\n")); + OcMiscLoadSystemReport (&mOpenCoreConfiguration, mStorageHandle); + DEBUG_CODE_END (); + DEBUG ((DEBUG_INFO, "OC: OcLoadAcpiSupport...\n")); + OcLoadAcpiSupport (&mOpenCoreStorage, &mOpenCoreConfiguration); + DEBUG ((DEBUG_INFO, "OC: OcLoadPlatformSupport...\n")); + OcLoadPlatformSupport (&mOpenCoreConfiguration, &mOpenCoreCpuInfo); + DEBUG ((DEBUG_INFO, "OC: OcLoadDevPropsSupport...\n")); + OcLoadDevPropsSupport (&mOpenCoreConfiguration); + DEBUG ((DEBUG_INFO, "OC: OcMiscLateInit...\n")); + OcMiscLateInit (Storage, &mOpenCoreConfiguration); + DEBUG ((DEBUG_INFO, "OC: OcLoadKernelSupport...\n")); + OcLoadKernelSupport (&mOpenCoreStorage, &mOpenCoreConfiguration, &mOpenCoreCpuInfo); + + if (mOpenCoreConfiguration.Misc.Security.EnablePassword) { + mOpenCorePrivilege.CurrentLevel = OcPrivilegeUnauthorized; + mOpenCorePrivilege.Hash = mOpenCoreConfiguration.Misc.Security.PasswordHash; + mOpenCorePrivilege.Salt = OC_BLOB_GET (&mOpenCoreConfiguration.Misc.Security.PasswordSalt); + mOpenCorePrivilege.SaltSize = mOpenCoreConfiguration.Misc.Security.PasswordSalt.Size; + +// Privilege = &mOpenCorePrivilege; + } else { +// Privilege = NULL; + } + + DEBUG ((DEBUG_INFO, "OC: All green, starting boot management...\n")); + +// OcMiscBoot ( +// &mOpenCoreStorage, +// &mOpenCoreConfiguration, +// Privilege, +// OcStartImage, +// mOpenCoreConfiguration.Uefi.Quirks.RequestBootVarRouting, +// mStorageHandle +// ); +} + static EFI_STATUS LoadEFIImageList(IN EFI_DEVICE_PATH **DevicePaths, IN CONST XStringW& ImageTitle, @@ -3593,7 +3693,7 @@ RefitMain (IN EFI_HANDLE ImageHandle, MemoryTrackerInit(); EFI_STATUS Status = RefitMainMain(ImageHandle, SystemTable); - +debugStartImageWithOC(); DBG("MT_alloc_count=%lld\n", MT_getAllocCount()); MT_outputDanglingPtr();