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introduce future Intel processors

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Signed-off-by: Sergey Isakov <isakov-sl@bk.ru>
This commit is contained in:
Sergey Isakov 2019-09-16 20:38:53 +03:00
parent e823a1ca44
commit 210c363c0f
1 changed files with 10 additions and 4 deletions
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14
rEFIt_UEFI/Platform/Platform.h
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@ -185,22 +185,28 @@ Headers collection for procedures
//#define CPU_MODEL_HASWELL_H 0x?? // Haswell H //#define CPU_MODEL_HASWELL_H 0x?? // Haswell H
#define CPU_MODEL_HASWELL_ULT 0x45 /* Haswell ULT */ #define CPU_MODEL_HASWELL_ULT 0x45 /* Haswell ULT */
#define CPU_MODEL_CRYSTALWELL 0x46 /* Haswell ULX CPUID_MODEL_CRYSTALWELL */ #define CPU_MODEL_CRYSTALWELL 0x46 /* Haswell ULX CPUID_MODEL_CRYSTALWELL */
#define CPU_MODEL_BROADWELL_HQ 0x47 #define CPU_MODEL_BROADWELL_HQ 0x47 /* E3-1200 v4 */
#define CPU_MODEL_MERRIFIELD 0x4A /* Tangier */ #define CPU_MODEL_MERRIFIELD 0x4A /* Tangier */
#define CPU_MODEL_AIRMONT 0x4C /* CherryTrail / Braswell */ #define CPU_MODEL_AIRMONT 0x4C /* CherryTrail / Braswell */
#define CPU_MODEL_AVOTON 0x4D /* Avaton/Rangely */ #define CPU_MODEL_AVOTON 0x4D /* Avaton/Rangely */
#define CPU_MODEL_SKYLAKE_U 0x4E /* Skylake Mobile */ #define CPU_MODEL_SKYLAKE_U 0x4E /* Skylake Mobile */
#define CPU_MODEL_BROADWELL_E5 0x4F /* Xeon E5-2695 */ #define CPU_MODEL_BROADWELL_E5 0x4F /* Xeon E5-2695 */
#define CPU_MODEL_SKYLAKE_S 0x55 /* Skylake Server */ #define CPU_MODEL_SKYLAKE_S 0x55 /* Skylake Server, Cooper Lake */
#define CPU_MODEL_BROADWELL_DE 0x56 #define CPU_MODEL_BROADWELL_DE 0x56 /* Xeon BroadWell */
#define CPU_MODEL_KNIGHT 0x57 /* Knights Landing */ #define CPU_MODEL_KNIGHT 0x57 /* Knights Landing */
#define CPU_MODEL_MOOREFIELD 0x5A /* Annidale */ #define CPU_MODEL_MOOREFIELD 0x5A /* Annidale */
#define CPU_MODEL_GOLDMONT 0x5C /* Apollo Lake */ #define CPU_MODEL_GOLDMONT 0x5C /* Apollo Lake */
#define CPU_MODEL_ATOM_X3 0x5D #define CPU_MODEL_ATOM_X3 0x5D /* Silvermont */
#define CPU_MODEL_SKYLAKE_D 0x5E /* Skylake Desktop */ #define CPU_MODEL_SKYLAKE_D 0x5E /* Skylake Desktop */
#define CPU_MODEL_DENVERTON 0x5F /* Goldmont Microserver */ #define CPU_MODEL_DENVERTON 0x5F /* Goldmont Microserver */
#define CPU_MODEL_CANNONLAKE 0x66 #define CPU_MODEL_CANNONLAKE 0x66
#define CPU_MODEL_ICELAKE_A 0x6A /* Xeon Ice Lake */
#define CPU_MODEL_ICELAKE_C 0x6C /* Xeon Ice Lake */
#define CPU_MODEL_ATOM_GM 0x7A /* Goldmont Plus */
#define CPU_MODEL_ICELAKE_D 0x7D
#define CPU_MODEL_ICELAKE 0x7E
#define CPU_MODEL_XEON_MILL 0x85 /* Knights Mill */ #define CPU_MODEL_XEON_MILL 0x85 /* Knights Mill */
#define CPU_MODEL_ATOM_TM 0x86 /* Tremont */
#define CPU_MODEL_KABYLAKE1 0x8E /* Kabylake Mobile */ #define CPU_MODEL_KABYLAKE1 0x8E /* Kabylake Mobile */
#define CPU_MODEL_KABYLAKE2 0x9E /* Kabylake Dektop, CoffeeLake */ #define CPU_MODEL_KABYLAKE2 0x9E /* Kabylake Dektop, CoffeeLake */