diff --git a/Clover.dsc b/Clover.dsc index f022e2d80..cb5c363e4 100644 --- a/Clover.dsc +++ b/Clover.dsc @@ -125,6 +125,7 @@ PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf # PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf +# OrderedCollectionLib|MdePkg/Library/BaseOrderedCollectionRedBlackTreeLib/BaseOrderedCollectionRedBlackTreeLib.inf MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf LockBoxLib|MdeModulePkg/Library/SmmLockBoxLib/SmmLockBoxDxeLib.inf @@ -180,19 +181,25 @@ OcAppleBootPolicyLib|OpenCorePkg/Library/OcAppleBootPolicyLib/OcAppleBootPolicyLib.inf OcAppleChunklistLib|OpenCorePkg/Library/OcAppleChunklistLib/OcAppleChunklistLib.inf OcAppleDiskImageLib|OpenCorePkg/Library/OcAppleDiskImageLib/OcAppleDiskImageLib.inf +# OcAppleImageConversionLib|OpenCorePkg/Library/OcAppleImageConversionLib/OcAppleImageConversionLib.inf OcAppleKeyMapLib|OpenCorePkg/Library/OcAppleKeyMapLib/OcAppleKeyMapLib.inf OcAppleKeysLib|OpenCorePkg/Library/OcAppleKeysLib/OcAppleKeysLib.inf OcAppleRamDiskLib|OpenCorePkg/Library/OcAppleRamDiskLib/OcAppleRamDiskLib.inf OcBootManagementLib|OpenCorePkg/Library/OcBootManagementLib/OcBootManagementLib.inf OcCompressionLib|OpenCorePkg/Library/OcCompressionLib/OcCompressionLib.inf + OcConsoleControlEntryModeGenericLib|OpenCorePkg/Library/OcConsoleControlEntryModeLib/OcConsoleControlEntryModeGenericLib.inf OcConsoleLib|OpenCorePkg/Library/OcConsoleLib/OcConsoleLib.inf OcCpuLib|OpenCorePkg/Library/OcCpuLib/OcCpuLib.inf OcCryptoLib|OpenCorePkg/Library/OcCryptoLib/OcCryptoLib.inf + OcDeviceMiscLib|OpenCorePkg/Library/OcDeviceMiscLib/OcDeviceMiscLib.inf OcDevicePathLib|OpenCorePkg/Library/OcDevicePathLib/OcDevicePathLib.inf OcFileLib|OpenCorePkg/Library/OcFileLib/OcFileLib.inf + OcFlexArrayLib|OpenCorePkg/Library/OcFlexArrayLib/OcFlexArrayLib.inf + OcMainLib|OpenCorePkg/Library/OcMainLib/OcMainLibClover.inf OcMemoryLib|OpenCorePkg/Library/OcMemoryLib/OcMemoryLib.inf OcMiscLib|OpenCorePkg/Library/OcMiscLib/OcMiscLib.inf OcOSInfoLib|OpenCorePkg/Library/OcOSInfoLib/OcOSInfoLib.inf +# OcPngLib|OpenCorePkg/Library/OcPngLib/OcPngLib.inf OcRngLib|OpenCorePkg/Library/OcRngLib/OcRngLib.inf OcRtcLib|OpenCorePkg/Library/OcRtcLib/OcRtcLib.inf OcSerializeLib|OpenCorePkg/Library/OcSerializeLib/OcSerializeLib.inf @@ -200,6 +207,8 @@ OcStorageLib|OpenCorePkg/Library/OcStorageLib/OcStorageLib.inf OcTemplateLib|OpenCorePkg/Library/OcTemplateLib/OcTemplateLib.inf OcXmlLib|OpenCorePkg/Library/OcXmlLib/OcXmlLib.inf + OcTypingLib|OpenCorePkg/Library/OcTypingLib/OcTypingLib.inf + #OcTimerLib|OpenCorePkg/Library/OcTimerLib/OcTimerLib.inf OcDeviceTreeLib|OpenCorePkg/Library/OcDeviceTreeLib/OcDeviceTreeLib.inf OcDataHubLib|OpenCorePkg/Library/OcDataHubLib/OcDataHubLib.inf OcAppleImg4Lib|OpenCorePkg/Library/OcAppleImg4Lib/OcAppleImg4Lib.inf @@ -209,13 +218,13 @@ OcMacInfoLib|OpenCorePkg/Library/OcMacInfoLib/OcMacInfoLib.inf OcApfsLib|OpenCorePkg/Library/OcApfsLib/OcApfsLib.inf OcAppleSecureBootLib|OpenCorePkg/Library/OcAppleSecureBootLib/OcAppleSecureBootLib.inf - OcAppleImageVerificationLib|OpenCorePkg/Library/OcAppleImageVerificationLib/OcAppleImageVerificationLib.inf +# OcAppleImageVerificationLib|OpenCorePkg/Library/OcAppleImageVerificationLib/OcAppleImageVerificationLib.inf OcDriverConnectionLib|OpenCorePkg/Library/OcDriverConnectionLib/OcDriverConnectionLib.inf #OcDebugLogLib|OpenCorePkg/Library/OcDebugLogLib/OcDebugLogLib.inf OcAcpiLib|OpenCorePkg/Library/OcAcpiLib/OcAcpiLib.inf OcAppleEventLib|OpenCorePkg/Library/OcAppleEventLib/OcAppleEventLib.inf - #OcAppleImageConversionLib|OpenCorePkg/Library/OcAppleImageConversionLib/OcAppleImageConversionLib.inf OcAudioLib|OpenCorePkg/Library/OcAudioLib/OcAudioLib.inf + OcBlitLib|OpenCorePkg/Library/OcBlitLib/OcBlitLib.inf OcInputLib|OpenCorePkg/Library/OcInputLib/OcInputLib.inf OcAppleUserInterfaceThemeLib|OpenCorePkg/Library/OcAppleUserInterfaceThemeLib/OcAppleUserInterfaceThemeLib.inf OcConfigurationLib|OpenCorePkg/Library/OcConfigurationLib/OcConfigurationLib.inf @@ -225,10 +234,13 @@ OcSmbiosLib|OpenCorePkg/Library/OcSmbiosLib/OcSmbiosLib.inf OcSmcLib|OpenCorePkg/Library/OcSmcLib/OcSmcLib.inf OcUnicodeCollationEngGenericLib|OpenCorePkg/Library/OcUnicodeCollationEngLib/OcUnicodeCollationEngGenericLib.inf + OcPeCoffExtLib|OpenCorePkg/Library/OcPeCoffExtLib/OcPeCoffExtLib.inf OcPeCoffLib|OpenCorePkg/Library/OcPeCoffLib/OcPeCoffLib.inf - #OcPngLib|OpenCorePkg/Library/OcPngLib/OcPngLib.inf - - OpenCoreLib|OpenCorePkg/Platform/OpenCore/OpenCoreLib.inf + OcVariableLib|OpenCorePkg/Library/OcVariableLib/OcVariableLib.inf + ResetSystemLib|OpenCorePkg/Library/OcResetSystemLib/OcResetSystemLib.inf + + + OpenCoreLib|OpenCorePkg/Application/OpenCore/OpenCoreLib.inf OcDebugLogLibOc2Clover|OpenCorePkg/Library/OcDebugLogLibOc2Clover/OcDebugLogLibOc2Clover.inf #MachoLib|Library/MachoLib/MachoLib.inf @@ -291,7 +303,7 @@ DEFINE OC_INCLUDE_FLAG = -include OpenCoreFromClover.h !endif - OpenCorePkg/Platform/OpenCore/OpenCoreLib.inf { + OpenCorePkg/Application/OpenCore/OpenCoreLib.inf { *_*_*_CC_FLAGS = $(OC_INCLUDE_FLAG) } @@ -347,6 +359,10 @@ *_*_*_CC_FLAGS = $(OC_INCLUDE_FLAG) } + OpenCorePkg/Library/OcDeviceMiscLib/OcDeviceMiscLib.inf { + + *_*_*_CC_FLAGS = $(OC_INCLUDE_FLAG) + } OpenCorePkg/Library/OcDevicePathLib/OcDevicePathLib.inf { *_*_*_CC_FLAGS = $(OC_INCLUDE_FLAG) @@ -431,10 +447,10 @@ *_*_*_CC_FLAGS = $(OC_INCLUDE_FLAG) } - OpenCorePkg/Library/OcAppleImageVerificationLib/OcAppleImageVerificationLib.inf { - - *_*_*_CC_FLAGS = $(OC_INCLUDE_FLAG) - } +# OpenCorePkg/Library/OcAppleImageVerificationLib/OcAppleImageVerificationLib.inf { +# +# *_*_*_CC_FLAGS = $(OC_INCLUDE_FLAG) +# } OpenCorePkg/Library/OcDriverConnectionLib/OcDriverConnectionLib.inf { *_*_*_CC_FLAGS = $(OC_INCLUDE_FLAG) @@ -493,6 +509,14 @@ *_*_*_CC_FLAGS = $(OC_INCLUDE_FLAG) } + OpenCorePkg/Library/OcVariableLib/OcVariableLib.inf { + + *_*_*_CC_FLAGS = $(OC_INCLUDE_FLAG) + } + OpenCorePkg/Library/OcMainLib/OcMainLibClover.inf { + + *_*_*_CC_FLAGS = $(OC_INCLUDE_FLAG) + } #DuetPkg/BootSector/BootSector.inf @@ -794,7 +818,7 @@ #Sample/Application/Sample.inf #gptsync/gptsync.inf bdmesg_efi/bdmesg.inf - OpenCorePkg/Application/ControlMsrE2/ControlMsrE2.inf + OpenCorePkg/Application/ControlMsrE2/ControlMsrE2Clover.inf !ifndef NO_CLOVER_SHELL ShellPkg/Library/UefiShellNetwork1CommandsLib/UefiShellNetwork1CommandsLib.inf diff --git a/CloverPkg.dec b/CloverPkg.dec index 9aa0113e9..b28c3edd8 100644 --- a/CloverPkg.dec +++ b/CloverPkg.dec @@ -211,7 +211,7 @@ gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVendor|L"CLOVER"|VOID*|0x10010003 gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareRevision|0x00010010|UINT32|0x10010004 gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x0|UINT32|0x10010005 - gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x0|UINT32|0x10010006 + gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x0|UINT8|0x10010006 gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x0|UINT32|0x10010007 gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE|BOOLEAN|0x10010008 gPcAtChipsetPkgTokenSpaceGuid.PcdIsaAcpiFloppyAEnable|FALSE|BOOLEAN|0x10010009 diff --git a/MdePkg/Include/IndustryStandard/Acpi62.h b/MdePkg/Include/IndustryStandard/Acpi62.h index 064f537ea..dd923b414 100644 --- a/MdePkg/Include/IndustryStandard/Acpi62.h +++ b/MdePkg/Include/IndustryStandard/Acpi62.h @@ -2879,6 +2879,11 @@ typedef struct { /// #define EFI_ACPI_6_2_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M') +/// +/// "PCCT" Platform Communications Channel Table +/// +#define EFI_ACPI_6_2_PLATFORM_COMMUNICATIONS_CHANNEL_TABLE_SIGNATURE SIGNATURE_32('P', 'C', 'C', 'T') + /// /// "SDEI" Software Delegated Exceptions Interface Table /// diff --git a/MdePkg/Include/IndustryStandard/AcpiAml.h b/MdePkg/Include/IndustryStandard/AcpiAml.h index 4e95c95c9..b15391d2a 100644 --- a/MdePkg/Include/IndustryStandard/AcpiAml.h +++ b/MdePkg/Include/IndustryStandard/AcpiAml.h @@ -2,6 +2,7 @@ This file contains AML code definition in the latest ACPI spec. Copyright (c) 2011, Intel Corporation. All rights reserved.
+ Copyright (c) 2019 - 2021, Arm Limited. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent **/ @@ -30,6 +31,7 @@ #define AML_PACKAGE_OP 0x12 #define AML_VAR_PACKAGE_OP 0x13 #define AML_METHOD_OP 0x14 +#define AML_EXTERNAL_OP 0x15 #define AML_DUAL_NAME_PREFIX 0x2e #define AML_MULTI_NAME_PREFIX 0x2f #define AML_NAME_CHAR_A 0x41 diff --git a/MdePkg/Include/IndustryStandard/ArmErrorSourceTable.h b/MdePkg/Include/IndustryStandard/ArmErrorSourceTable.h new file mode 100644 index 000000000..369b03a50 --- /dev/null +++ b/MdePkg/Include/IndustryStandard/ArmErrorSourceTable.h @@ -0,0 +1,357 @@ +/** @file + Arm Error Source Table as described in the + 'ACPI for the Armv8 RAS Extensions 1.1' Specification. + + Copyright (c) 2020 Arm Limited. + SPDX-License-Identifier: BSD-2-Clause-Patent + + @par Reference(s): + - ACPI for the Armv8 RAS Extensions 1.1 Platform Design Document, + dated 28 September 2020. + (https://developer.arm.com/documentation/den0085/0101/) + + @par Glossary + - Ref : Reference + - Id : Identifier +**/ + +#ifndef ARM_ERROR_SOURCE_TABLE_H_ +#define ARM_ERROR_SOURCE_TABLE_H_ + +/// +/// "AEST" Arm Error Source Table +/// +#define EFI_ACPI_6_3_ARM_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('A', 'E', 'S', 'T') + +#define EFI_ACPI_ARM_ERROR_SOURCE_TABLE_REVISION 1 + +#pragma pack(1) + +/// +/// Arm Error Source Table definition. +/// +typedef struct { + EFI_ACPI_DESCRIPTION_HEADER Header; +} EFI_ACPI_ARM_ERROR_SOURCE_TABLE; + +/// +/// AEST Node structure. +/// +typedef struct { + /// Node type: + /// 0x00 - Processor error node + /// 0x01 - Memory error node + /// 0x02 - SMMU error node + /// 0x03 - Vendor-defined error node + /// 0x04 - GIC error node + UINT8 Type; + + /// Length of structure in bytes. + UINT16 Length; + + /// Reserved - Must be zero. + UINT8 Reserved; + + /// Offset from the start of the node to node-specific data. + UINT32 DataOffset; + + /// Offset from the start of the node to the node interface structure. + UINT32 InterfaceOffset; + + /// Offset from the start of the node to node interrupt array. + UINT32 InterruptArrayOffset; + + /// Number of entries in the interrupt array. + UINT32 InterruptArrayCount; + + // Generic node data + + /// The timestamp frequency of the counter in Hz. + UINT64 TimestampRate; + + /// Reserved - Must be zero. + UINT64 Reserved1; + + /// The rate in Hz at which the Error Generation Counter decrements. + UINT64 ErrorInjectionCountdownRate; +} EFI_ACPI_AEST_NODE_STRUCT; + +// AEST Node type definitions +#define EFI_ACPI_AEST_NODE_TYPE_PROCESSOR 0x0 +#define EFI_ACPI_AEST_NODE_TYPE_MEMORY 0x1 +#define EFI_ACPI_AEST_NODE_TYPE_SMMU 0x2 +#define EFI_ACPI_AEST_NODE_TYPE_VENDOR_DEFINED 0x3 +#define EFI_ACPI_AEST_NODE_TYPE_GIC 0x4 + +/// +/// AEST Node Interface structure. +/// +typedef struct { + /// Interface type: + /// 0x0 - System register (SR) + /// 0x1 - Memory mapped (MMIO) + UINT8 Type; + + /// Reserved - Must be zero. + UINT8 Reserved[3]; + + /// AEST node interface flags. + UINT32 Flags; + + /// Base address of error group that contains the error node. + UINT64 BaseAddress; + + /// Zero-based index of the first standard error record that + /// belongs to this node. + UINT32 StartErrorRecordIndex; + + /// Number of error records in this node including both + /// implemented and unimplemented records. + UINT32 NumberErrorRecords; + + /// A bitmap indicating the error records within this + /// node that are implemented in the current system. + UINT64 ErrorRecordImplemented; + + /// A bitmap indicating the error records within this node that + /// support error status reporting through the ERRGSR register. + UINT64 ErrorRecordStatusReportingSupported; + + /// A bitmap indicating the addressing mode used by each error + /// record within this node to populate the ERR_ADDR register. + UINT64 AddressingMode; +} EFI_ACPI_AEST_INTERFACE_STRUCT; + +// AEST Interface node type definitions. +#define EFI_ACPI_AEST_INTERFACE_TYPE_SR 0x0 +#define EFI_ACPI_AEST_INTERFACE_TYPE_MMIO 0x1 + +// AEST node interface flag definitions. +#define EFI_ACPI_AEST_INTERFACE_FLAG_PRIVATE 0 +#define EFI_ACPI_AEST_INTERFACE_FLAG_SHARED BIT0 +#define EFI_ACPI_AEST_INTERFACE_FLAG_CLEAR_MISCX BIT1 + +/// +/// AEST Node Interrupt structure. +/// +typedef struct { + /// Interrupt type: + /// 0x0 - Fault Handling Interrupt + /// 0x1 - Error Recovery Interrupt + UINT8 InterruptType; + + /// Reserved - Must be zero. + UINT8 Reserved[2]; + + /// Interrupt flags + /// Bits [31:1]: Must be zero. + /// Bit 0: + /// 0b - Interrupt is edge-triggered + /// 1b - Interrupt is level-triggered + UINT8 InterruptFlags; + + /// GSIV of interrupt, if interrupt is an SPI or a PPI. + UINT32 InterruptGsiv; + + /// If MSI is supported, then this field must be set to the + /// Identifier field of the IORT ITS Group node. + UINT8 ItsGroupRefId; + + /// Reserved - must be zero. + UINT8 Reserved1[3]; +} EFI_ACPI_AEST_INTERRUPT_STRUCT; + +// AEST Interrupt node - interrupt type defintions. +#define EFI_ACPI_AEST_INTERRUPT_TYPE_FAULT_HANDLING 0x0 +#define EFI_ACPI_AEST_INTERRUPT_TYPE_ERROR_RECOVERY 0x1 + +// AEST Interrupt node - interrupt flag defintions. +#define EFI_ACPI_AEST_INTERRUPT_FLAG_TRIGGER_TYPE_EDGE 0 +#define EFI_ACPI_AEST_INTERRUPT_FLAG_TRIGGER_TYPE_LEVEL BIT0 + +/// +/// Cache Processor Resource structure. +/// +typedef struct { + /// Reference to the cache structure in the PPTT table. + UINT32 CacheRefId; + + /// Reserved + UINT32 Reserved; +} EFI_ACPI_AEST_PROCESSOR_CACHE_RESOURCE_STRUCT; + +/// +/// TLB Processor Resource structure. +/// +typedef struct { + /// TLB level from perspective of current processor. + UINT32 TlbRefId; + + /// Reserved + UINT32 Reserved; +} EFI_ACPI_AEST_PROCESSOR_TLB_RESOURCE_STRUCT; + +/// +/// Processor Generic Resource structure. +/// +typedef struct { + /// Vendor-defined supplementary data. + UINT32 Data; +} EFI_ACPI_AEST_PROCESSOR_GENERIC_RESOURCE_STRUCT; + +/// +/// AEST Processor Resource union. +/// +typedef union { + /// Processor Cache resource. + EFI_ACPI_AEST_PROCESSOR_CACHE_RESOURCE_STRUCT Cache; + + /// Processor TLB resource. + EFI_ACPI_AEST_PROCESSOR_TLB_RESOURCE_STRUCT Tlb; + + /// Processor Generic resource. + EFI_ACPI_AEST_PROCESSOR_GENERIC_RESOURCE_STRUCT Generic; +} EFI_ACPI_AEST_PROCESSOR_RESOURCE; + +/// +/// AEST Processor structure. +/// +typedef struct { + /// AEST Node header + EFI_ACPI_AEST_NODE_STRUCT NodeHeader; + + /// Processor ID of node. + UINT32 AcpiProcessorId; + + /// Resource type of the processor node. + /// 0x0 - Cache + /// 0x1 - TLB + /// 0x2 - Generic + UINT8 ResourceType; + + /// Reserved - must be zero. + UINT8 Reserved; + + /// Processor structure flags. + UINT8 Flags; + + /// Processor structure revision. + UINT8 Revision; + + /// Processor affinity descriptor for the resource that this + /// error node pertains to. + UINT64 ProcessorAffinityLevelIndicator; + + /// Processor resource + EFI_ACPI_AEST_PROCESSOR_RESOURCE Resource; + + // Node Interface + // EFI_ACPI_AEST_INTERFACE_STRUCT NodeInterface; + + // Node Interrupt Array + // EFI_ACPI_AEST_INTERRUPT_STRUCT NodeInterruptArray[n]; +} EFI_ACPI_AEST_PROCESSOR_STRUCT; + +// AEST Processor resource type definitions. +#define EFI_ACPI_AEST_PROCESSOR_RESOURCE_TYPE_CACHE 0x0 +#define EFI_ACPI_AEST_PROCESSOR_RESOURCE_TYPE_TLB 0x1 +#define EFI_ACPI_AEST_PROCESSOR_RESOURCE_TYPE_GENERIC 0x2 + +// AEST Processor flag definitions. +#define EFI_ACPI_AEST_PROCESSOR_FLAG_GLOBAL BIT0 +#define EFI_ACPI_AEST_PROCESSOR_FLAG_SHARED BIT1 + +/// +/// Memory Controller structure. +/// +typedef struct { + /// AEST Node header + EFI_ACPI_AEST_NODE_STRUCT NodeHeader; + + /// SRAT proximity domain. + UINT32 ProximityDomain; + + // Node Interface + // EFI_ACPI_AEST_INTERFACE_STRUCT NodeInterface; + + // Node Interrupt Array + // EFI_ACPI_AEST_INTERRUPT_STRUCT NodeInterruptArray[n]; +} EFI_ACPI_AEST_MEMORY_CONTROLLER_STRUCT; + +/// +/// SMMU structure. +/// +typedef struct { + /// AEST Node header + EFI_ACPI_AEST_NODE_STRUCT NodeHeader; + + /// Reference to the IORT table node that describes this SMMU. + UINT32 SmmuRefId; + + /// Reference to the IORT table node that is associated with the + /// sub-component within this SMMU. + UINT32 SubComponentRefId; + + // Node Interface + // EFI_ACPI_AEST_INTERFACE_STRUCT NodeInterface; + + // Node Interrupt Array + // EFI_ACPI_AEST_INTERRUPT_STRUCT NodeInterruptArray[n]; +} EFI_ACPI_AEST_SMMU_STRUCT; + +/// +/// Vendor-Defined structure. +/// +typedef struct { + /// AEST Node header + EFI_ACPI_AEST_NODE_STRUCT NodeHeader; + + /// ACPI HID of the component. + UINT32 HardwareId; + + /// The ACPI Unique identifier of the component. + UINT32 UniqueId; + + /// Vendor-specific data, for example to identify this error source. + UINT8 VendorData[16]; + + // Node Interface + // EFI_ACPI_AEST_INTERFACE_STRUCT NodeInterface; + + // Node Interrupt Array + // EFI_ACPI_AEST_INTERRUPT_STRUCT NodeInterruptArray[n]; +} EFI_ACPI_AEST_VENDOR_DEFINED_STRUCT; + +/// +/// GIC structure. +/// +typedef struct { + /// AEST Node header + EFI_ACPI_AEST_NODE_STRUCT NodeHeader; + + /// Type of GIC interface that is associated with this error node. + /// 0x0 - GIC CPU (GICC) + /// 0x1 - GIC Distributor (GICD) + /// 0x2 - GIC Resistributor (GICR) + /// 0x3 - GIC ITS (GITS) + UINT32 InterfaceType; + + /// Identifier for the interface instance. + UINT32 GicInterfaceRefId; + + // Node Interface + // EFI_ACPI_AEST_INTERFACE_STRUCT NodeInterface; + + // Node Interrupt Array + // EFI_ACPI_AEST_INTERRUPT_STRUCT NodeInterruptArray[n]; +} EFI_ACPI_AEST_GIC_STRUCT; + +// AEST GIC interface type definitions. +#define EFI_ACPI_AEST_GIC_INTERFACE_TYPE_GICC 0x0 +#define EFI_ACPI_AEST_GIC_INTERFACE_TYPE_GICD 0x1 +#define EFI_ACPI_AEST_GIC_INTERFACE_TYPE_GICR 0x2 +#define EFI_ACPI_AEST_GIC_INTERFACE_TYPE_GITS 0x3 + +#pragma pack() + +#endif // ARM_ERROR_SOURCE_TABLE_H_ diff --git a/MdePkg/Include/IndustryStandard/SmBios.h b/MdePkg/Include/IndustryStandard/SmBios.h index 532c0c812..47882ecf6 100755 --- a/MdePkg/Include/IndustryStandard/SmBios.h +++ b/MdePkg/Include/IndustryStandard/SmBios.h @@ -906,7 +906,7 @@ typedef struct { SMBIOS_TABLE_STRING Socket; UINT8 ProcessorType; ///< The enumeration value from PROCESSOR_TYPE_DATA. UINT8 ProcessorFamily; ///< The enumeration value from PROCESSOR_FAMILY_DATA. - SMBIOS_TABLE_STRING ProcessorManufacture; + SMBIOS_TABLE_STRING ProcessorManufacturer; PROCESSOR_ID_DATA ProcessorId; SMBIOS_TABLE_STRING ProcessorVersion; PROCESSOR_VOLTAGE Voltage; diff --git a/MdePkg/Library/RegisterFilterLibNull/RegisterFilterLibNull.c b/MdePkg/Library/RegisterFilterLibNull/RegisterFilterLibNull.c new file mode 100644 index 000000000..7150f1ed5 --- /dev/null +++ b/MdePkg/Library/RegisterFilterLibNull/RegisterFilterLibNull.c @@ -0,0 +1,271 @@ +/** @file + Null instance of RegisterFilterLib. + + Copyright (c) 2021 Intel Corporation. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include + +/** + Filter IO read operation before read IO port. + It is used to filter IO read operation. + + It will return the flag to decide whether require read real IO port. + It can be used for emulation environment. + + @param[in] Width Signifies the width of the I/O operation. + @param[in] Address The base address of the I/O operation. + @param[in,out] Buffer The destination buffer to store the results. + + @retval TRUE Need to excute the IO read. + @retval FALSE Skip the IO read. + +**/ +BOOLEAN +EFIAPI +FilterBeforeIoRead ( + IN FILTER_IO_WIDTH Width, + IN UINTN Address, + IN OUT VOID *Buffer + ) +{ + return TRUE; +} + +/** + Trace IO read operation after read IO port. + It is used to trace IO operation. + + @param[in] Width Signifies the width of the I/O operation. + @param[in] Address The base address of the I/O operation. + @param[in] Buffer The destination buffer to store the results. + +**/ +VOID +EFIAPI +FilterAfterIoRead ( + IN FILTER_IO_WIDTH Width, + IN UINTN Address, + IN VOID *Buffer + ) +{ + return; +} + +/** + Filter IO Write operation before wirte IO port. + It is used to filter IO operation. + + It will return the flag to decide whether require read write IO port. + It can be used for emulation environment. + + @param[in] Width Signifies the width of the I/O operation. + @param[in] Address The base address of the I/O operation. + @param[in] Buffer The source buffer from which to write data. + + @retval TRUE Need to excute the IO write. + @retval FALSE Skip the IO write. + +**/ +BOOLEAN +EFIAPI +FilterBeforeIoWrite ( + IN FILTER_IO_WIDTH Width, + IN UINTN Address, + IN VOID *Buffer + ) +{ + return TRUE; +} + + /** + Trace IO Write operation after wirte IO port. + It is used to trace IO operation. + + @param[in] Width Signifies the width of the I/O operation. + @param[in] Address The base address of the I/O operation. + @param[in] Buffer The source buffer from which to Write data. + +**/ +VOID +EFIAPI +FilterAfterIoWrite ( + IN FILTER_IO_WIDTH Width, + IN UINTN Address, + IN VOID *Buffer + ) +{ + return; +} + +/** + Filter memory IO before Read operation. + + It will return the flag to decide whether require read real MMIO. + It can be used for emulation environment. + + @param[in] Width Signifies the width of the memory I/O operation. + @param[in] Address The base address of the memory I/O operation. + @param[in,out] Buffer The destination buffer to store the results. + + @retval TRUE Need to excute the MMIO read. + @retval FALSE Skip the MMIO read. + +**/ +BOOLEAN +EFIAPI +FilterBeforeMmIoRead ( + IN FILTER_IO_WIDTH Width, + IN UINTN Address, + IN OUT VOID *Buffer + ) +{ + return TRUE; +} + +/** + Tracer memory IO after read operation. + + @param[in] Width Signifies the width of the memory I/O operation. + @param[in] Address The base address of the memory I/O operation. + @param[in] Buffer The destination buffer to store the results. + +**/ +VOID +EFIAPI +FilterAfterMmIoRead ( + IN FILTER_IO_WIDTH Width, + IN UINTN Address, + IN VOID *Buffer + ) +{ + return; +} + +/** + Filter memory IO before write operation. + + It will return the flag to decide whether require wirte real MMIO. + It can be used for emulation environment. + + @param[in] Width Signifies the width of the memory I/O operation. + @param[in] Address The base address of the memory I/O operation. + @param[in] Buffer The source buffer from which to write data. + + @retval TRUE Need to excute the MMIO write. + @retval FALSE Skip the MMIO write. + +**/ +BOOLEAN +EFIAPI +FilterBeforeMmIoWrite ( + IN FILTER_IO_WIDTH Width, + IN UINTN Address, + IN VOID *Buffer + ) +{ + return TRUE; +} + +/** + Tracer memory IO after write operation. + + @param[in] Width Signifies the width of the memory I/O operation. + @param[in] Address The base address of the memory I/O operation. + @param[in] Buffer The source buffer from which to write data. + +**/ +VOID +EFIAPI +FilterAfterMmIoWrite ( + IN FILTER_IO_WIDTH Width, + IN UINTN Address, + IN VOID *Buffer + ) +{ + return; +} + +/** + Filter MSR before read operation. + + It will return the flag to decide whether require read real MSR. + It can be used for emulation environment. + + @param Index The Register index of the MSR. + @param Value Point to the data will be read from the MSR. + + @retval TRUE Need to excute the MSR read. + @retval FALSE Skip the MSR read. + +**/ +BOOLEAN +EFIAPI +FilterBeforeMsrRead ( + IN UINT32 Index, + IN OUT UINT64 *Value + ) +{ + return TRUE; +} + +/** + Trace MSR after read operation. + + @param Index The Register index of the MSR. + @param Value Point to the data has been be read from the MSR. + +**/ +VOID +EFIAPI +FilterAfterMsrRead ( + IN UINT32 Index, + IN UINT64 *Value + ) +{ + return; +} + +/** + Filter MSR before write operation. + + It will return the flag to decide whether require write real MSR. + It can be used for emulation environment. + + @param Index The Register index of the MSR. + @param Value Point to the data want to be written to the MSR. + + @retval TRUE Need to excute the MSR write. + @retval FALSE Skip the MSR write. + +**/ +BOOLEAN +EFIAPI +FilterBeforeMsrWrite ( + IN UINT32 Index, + IN UINT64 *Value + ) +{ + return TRUE; +} + +/** + Trace MSR after write operation. + + @param Index The Register index of the MSR. + @param Value Point to the data has been be written to the MSR. + +**/ +VOID +EFIAPI +FilterAfterMsrWrite ( + IN UINT32 Index, + IN UINT64 *Value + ) +{ + return; +} + diff --git a/MdePkg/Library/RegisterFilterLibNull/RegisterFilterLibNull.inf b/MdePkg/Library/RegisterFilterLibNull/RegisterFilterLibNull.inf new file mode 100644 index 000000000..a7fc7497e --- /dev/null +++ b/MdePkg/Library/RegisterFilterLibNull/RegisterFilterLibNull.inf @@ -0,0 +1,23 @@ +## @file +# Null instance of RegisterFilterLib. +# +# Copyright (c) 2021, Intel Corporation. All rights reserved.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = FilterLibNull + MODULE_UNI_FILE = FilterLibNull.uni + FILE_GUID = 9F555194-A410-4AD6-B3FC-53F6E10FA793 + MODULE_TYPE = BASE + VERSION_STRING = 1.0 + LIBRARY_CLASS = RegisterFilterLib + +[Sources] + RegisterFilterLibNull.c + +[Packages] + MdePkg/MdePkg.dec diff --git a/MdePkg/Library/RegisterFilterLibNull/RegisterFilterLibNull.uni b/MdePkg/Library/RegisterFilterLibNull/RegisterFilterLibNull.uni new file mode 100644 index 000000000..ed64c7e63 --- /dev/null +++ b/MdePkg/Library/RegisterFilterLibNull/RegisterFilterLibNull.uni @@ -0,0 +1,13 @@ +// /** @file +// Null instance of RegisterFilterLib. +// +// Copyright (c) 2021, Intel Corporation. All rights reserved.
+// +// SPDX-License-Identifier: BSD-2-Clause-Patent +// +// **/ + + +#string STR_MODULE_ABSTRACT #language en-US "Null instance of RegisterFilterLib." +#string STR_MODULE_DESCRIPTION #language en-US "Null instance of RegisterFilterLib." + diff --git a/MdePkg/MdeLibs.dsc.inc b/MdePkg/MdeLibs.dsc.inc new file mode 100644 index 000000000..3c70daf87 --- /dev/null +++ b/MdePkg/MdeLibs.dsc.inc @@ -0,0 +1,15 @@ +## @file +# Mde DSC include file for [LibraryClasses*] section of all Architectures. +# +# This file can be included to the [LibraryClasses*] section(s) of a platform DSC file +# by using "!include MdePkg/MdeLibs.dsc.inc" to specify the library instances +# of some EDKII basic/common library classes. +# +# Copyright (c) 2021, Intel Corporation. All rights reserved.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[LibraryClasses] + RegisterFilterLib|MdePkg/Library/RegisterFilterLibNull/RegisterFilterLibNull.inf diff --git a/OpenCorePkg b/OpenCorePkg index b0aac62ac..f6df58d84 160000 --- a/OpenCorePkg +++ b/OpenCorePkg @@ -1 +1 @@ -Subproject commit b0aac62accc46de3297b2fa3b50e34f0d03460bd +Subproject commit f6df58d8439a3bef9e3452ab58382503285f88f0 diff --git a/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/PrintInfo.c b/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/PrintInfo.c index 7a75554d7..258ecf504 100644 --- a/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/PrintInfo.c +++ b/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/PrintInfo.c @@ -433,7 +433,7 @@ SmbiosPrintStructure ( } else { DisplayProcessorFamily (Struct->Type4->ProcessorFamily, Option); } - PRINT_PENDING_STRING (Struct, Type4, ProcessorManufacture); + PRINT_PENDING_STRING (Struct, Type4, ProcessorManufacturer); PRINT_BIT_FIELD (Struct, Type4, ProcessorId, 8); PRINT_PENDING_STRING (Struct, Type4, ProcessorVersion); DisplayProcessorVoltage (*(UINT8 *) &(Struct->Type4->Voltage), Option); diff --git a/rEFIt_UEFI/Platform/cpu.cpp b/rEFIt_UEFI/Platform/cpu.cpp index 5aa0da3f3..da7a80761 100755 --- a/rEFIt_UEFI/Platform/cpu.cpp +++ b/rEFIt_UEFI/Platform/cpu.cpp @@ -1658,14 +1658,14 @@ void FillOCCpuInfo(OC_CPU_INFO* CpuInfo) CpuInfo->CpuidExtSigEcx.Uint32 = (UINT32)gCPUStructure.CPUID[CPUID_81][ECX]; CpuInfo->CpuidExtSigEdx.Uint32 = (UINT32)gCPUStructure.CPUID[CPUID_81][EDX]; CpuInfo->Brand = (UINT8)CpuInfo->CpuidVerEbx.Bits.BrandIndex; - CpuInfo->MaxDiv = (UINT8)gCPUStructure.SubDivider; +// CpuInfo->MaxDiv = (UINT8)gCPUStructure.SubDivider; //there is a fault in OC as it can't handle non-integer values. Clover does by *10. - CpuInfo->MinBusRatio = (UINT8)(gCPUStructure.MinRatio / 10); - CpuInfo->MaxBusRatio = (UINT8)(gCPUStructure.MaxRatio / 10); - CpuInfo->TurboBusRatio1 = (UINT8)(gCPUStructure.Turbo1 /10); - CpuInfo->TurboBusRatio2 = (UINT8)(gCPUStructure.Turbo2 /10); - CpuInfo->TurboBusRatio3 = (UINT8)(gCPUStructure.Turbo3 /10); - CpuInfo->TurboBusRatio4 = (UINT8)(gCPUStructure.Turbo4 /10); +// CpuInfo->MinBusRatio = (UINT8)(gCPUStructure.MinRatio / 10); +// CpuInfo->MaxBusRatio = (UINT8)(gCPUStructure.MaxRatio / 10); +// CpuInfo->TurboBusRatio1 = (UINT8)(gCPUStructure.Turbo1 /10); +// CpuInfo->TurboBusRatio2 = (UINT8)(gCPUStructure.Turbo2 /10); +// CpuInfo->TurboBusRatio3 = (UINT8)(gCPUStructure.Turbo3 /10); +// CpuInfo->TurboBusRatio4 = (UINT8)(gCPUStructure.Turbo4 /10); CpuInfo->PackageCount = 1; //number of started cores. Intel always start with one core. CpuInfo->CoreCount = gCPUStructure.Cores; CpuInfo->ThreadCount = gCPUStructure.Threads; diff --git a/rEFIt_UEFI/Platform/smbios.cpp b/rEFIt_UEFI/Platform/smbios.cpp index 57b6b1e5c..ed3135e3c 100755 --- a/rEFIt_UEFI/Platform/smbios.cpp +++ b/rEFIt_UEFI/Platform/smbios.cpp @@ -144,7 +144,7 @@ SMBIOS_TABLE_STRING SMBIOS_TABLE_TYPE3_STR_IDX[] = { SMBIOS_TABLE_STRING SMBIOS_TABLE_TYPE4_STR_IDX[] = { smbios_offsetof(SMBIOS_TABLE_TYPE4, Socket), - smbios_offsetof(SMBIOS_TABLE_TYPE4, ProcessorManufacture), + smbios_offsetof(SMBIOS_TABLE_TYPE4, ProcessorManufacturer), smbios_offsetof(SMBIOS_TABLE_TYPE4, ProcessorVersion), smbios_offsetof(SMBIOS_TABLE_TYPE4, SerialNumber), smbios_offsetof(SMBIOS_TABLE_TYPE4, AssetTag), @@ -983,7 +983,7 @@ DBG("newSmbiosTable.Type4->ProcessorFamily=%d\n", newSmbiosTable.Type4->Processo DBG("newSmbiosTable.Type4->ProcessorFamily2=%d\n", newSmbiosTable.Type4->ProcessorFamily2); DBG("newSmbiosTable.Type4->ProcessorId.FeatureFlags=%d\n", *(UINT32*)&newSmbiosTable.Type4->ProcessorId.FeatureFlags); DBG("newSmbiosTable.Type4->ProcessorId.Signatur=%d\n", *(UINT32*)&newSmbiosTable.Type4->ProcessorId.Signature); -DBG("newSmbiosTable.Type4->ProcessorManufacture=%d\n", newSmbiosTable.Type4->ProcessorManufacture); +DBG("newSmbiosTable.Type4->ProcessorManufacturer=%d\n", newSmbiosTable.Type4->ProcessorManufacturer); DBG("newSmbiosTable.Type4->ProcessorType=%d\n", newSmbiosTable.Type4->ProcessorType); DBG("newSmbiosTable.Type4->ProcessorUpgrade=%d\n", newSmbiosTable.Type4->ProcessorUpgrade); DBG("newSmbiosTable.Type4->ProcessorVersion=%d\n", newSmbiosTable.Type4->ProcessorVersion); diff --git a/rEFIt_UEFI/include/OC.h b/rEFIt_UEFI/include/OC.h index 39ab6f3d0..b174af4c9 100644 --- a/rEFIt_UEFI/include/OC.h +++ b/rEFIt_UEFI/include/OC.h @@ -22,6 +22,7 @@ extern "C" { #include #include #include // OC_CPU_INFO +#include // OcMiscEarlyInit //#include // OC_BOOTSTRAP_PROTOCOL #include @@ -34,14 +35,6 @@ extern OC_CPU_INFO mOpenCoreCpuInfo; //extern OC_RSA_PUBLIC_KEY* mOpenCoreVaultKey; //extern EFI_HANDLE mLoadHandle; -EFI_STATUS -EFIAPI -OcStartImage_2 ( - IN OC_BOOT_ENTRY *Chosen, - IN EFI_HANDLE ImageHandle, - OUT UINTN *ExitDataSize, - OUT CHAR16 **ExitData OPTIONAL - ); EFI_STATUS EFIAPI diff --git a/rEFIt_UEFI/refit/main.cpp b/rEFIt_UEFI/refit/main.cpp index 4c9af1c38..194c98d5a 100644 --- a/rEFIt_UEFI/refit/main.cpp +++ b/rEFIt_UEFI/refit/main.cpp @@ -620,7 +620,7 @@ static XStringW getDriversPath() #endif } -#ifdef DEBUG +#ifdef JIEF_DEBUG void debugStartImageWithOC() { MsgLog("debugStartImageWithOC\n"); @@ -629,13 +629,17 @@ void debugStartImageWithOC() EFI_LOADED_IMAGE* OcLoadedImage; EFI_STATUS Status = gBS->HandleProtocol(gImageHandle, &gEfiLoadedImageProtocolGuid, (void **) &OcLoadedImage); - EFI_SIMPLE_FILE_SYSTEM_PROTOCOL* FileSystem = LocateFileSystem(OcLoadedImage->DeviceHandle, OcLoadedImage->FilePath); - Status = OcStorageInitFromFs(&mOpenCoreStorage, FileSystem, self.getCloverDirFullPath().wc_str(), NULL); + EFI_SIMPLE_FILE_SYSTEM_PROTOCOL* FileSystem = OcLocateFileSystem(OcLoadedImage->DeviceHandle, OcLoadedImage->FilePath); + Status = OcStorageInitFromFs(&mOpenCoreStorage, FileSystem, NULL, NULL, self.getCloverDirFullPath().wc_str(), NULL); Status = ClOcReadConfigurationFile(&mOpenCoreStorage, L"config-oc.plist", &mOpenCoreConfiguration); if ( EFI_ERROR(Status) ) panic("ClOcReadConfigurationFile"); mOpenCoreConfiguration.Misc.Debug.Target = 0; + OC_STRING_ASSIGN(mOpenCoreConfiguration.Misc.Boot.PickerMode, "Builtin"); + OC_STRING_ASSIGN(mOpenCoreConfiguration.Misc.Security.DmgLoading, "Any"); + mOpenCoreConfiguration.Uefi.Quirks.IgnoreInvalidFlexRatio = 0; + mOpenCoreConfiguration.Uefi.Quirks.TscSyncTimeout = 0; OcMain(&mOpenCoreStorage, NULL); @@ -861,8 +865,8 @@ void LOADER_ENTRY::StartLoader() EFI_LOADED_IMAGE* OcLoadedImage; Status = gBS->HandleProtocol(gImageHandle, &gEfiLoadedImageProtocolGuid, (VOID **) &OcLoadedImage); - EFI_SIMPLE_FILE_SYSTEM_PROTOCOL* FileSystem = LocateFileSystem(OcLoadedImage->DeviceHandle, OcLoadedImage->FilePath); - Status = OcStorageInitFromFs(&mOpenCoreStorage, FileSystem, self.getCloverDirFullPath().wc_str(), NULL); + EFI_SIMPLE_FILE_SYSTEM_PROTOCOL* FileSystem = OcLocateFileSystem(OcLoadedImage->DeviceHandle, OcLoadedImage->FilePath); + Status = OcStorageInitFromFs(&mOpenCoreStorage, FileSystem, NULL, NULL, self.getCloverDirFullPath().wc_str(), NULL); /* * Define READ_FROM_OC to have mOpenCoreConfiguration initialized from config-oc.plist @@ -883,7 +887,7 @@ void LOADER_ENTRY::StartLoader() !defined(USE_OC_SECTION_Nvram) && !defined(USE_OC_SECTION_PlatformInfo) && !defined(USE_OC_SECTION_Uefi) memset(&mOpenCoreConfiguration, 0, sizeof(mOpenCoreConfiguration)); - DBG("config-oc.plist isn't use at all\n"); + DBG("config-oc.plist isn't used at all\n"); #else Status = ClOcReadConfigurationFile(&mOpenCoreStorage, L"config-oc.plist", &mOpenCoreConfiguration); @@ -1055,7 +1059,7 @@ void LOADER_ENTRY::StartLoader() mOpenCoreConfiguration.Kernel.Quirks.DisableIoMapper = gSettings.Quirks.OcKernelQuirks.DisableIoMapper; mOpenCoreConfiguration.Kernel.Quirks.DisableLinkeditJettison = gSettings.Quirks.OcKernelQuirks.DisableLinkeditJettison; mOpenCoreConfiguration.Kernel.Quirks.DisableRtcChecksum = gSettings.KernelAndKextPatches.KPAppleRTC; - mOpenCoreConfiguration.Kernel.Quirks.DummyPowerManagement = gSettings.Quirks.OcKernelQuirks.DummyPowerManagement; + mOpenCoreConfiguration.Kernel.Emulate.DummyPowerManagement = gSettings.Quirks.OcKernelQuirks.DummyPowerManagement; mOpenCoreConfiguration.Kernel.Quirks.ExternalDiskIcons = gSettings.Quirks.OcKernelQuirks.ExternalDiskIcons; mOpenCoreConfiguration.Kernel.Quirks.IncreasePciBarSize = gSettings.Quirks.OcKernelQuirks.IncreasePciBarSize; mOpenCoreConfiguration.Kernel.Quirks.LapicKernelPanic = gSettings.KernelAndKextPatches.KPKernelLapic; @@ -1178,25 +1182,6 @@ void LOADER_ENTRY::StartLoader() OC_STRING_ASSIGN(mOpenCoreConfiguration.Uefi.Output.Resolution, XString8(gSettings.GUI.ScreenResolution).c_str()); - // if OC is NOT initialized with OcMain, we need the following - // if (OcOSInfoInstallProtocol (false) == NULL) { - // DEBUG ((DEBUG_ERROR, "OC: Failed to install os info protocol\n")); - // } - // if (OcAppleRtcRamInstallProtocol (false) == NULL) { - // DEBUG ((DEBUG_ERROR, "OC: Failed to install rtc ram protocol\n")); - // } - - //// Uncomment OcMiscBoot to run the OC bootpicker - // OcMiscBoot ( - // &mOpenCoreStorage, - // &mOpenCoreConfiguration, - // NULL, - // OcStartImage_2, - // mOpenCoreConfiguration.Uefi.Quirks.RequestBootVarRouting, - // mLoadHandle - // ); - - if ( OpenRuntimeEfiName.notEmpty() ) { XStringW FileName = SWPrintf("%ls\\%ls\\%ls", self.getCloverDirFullPath().wc_str(), getDriversPath().wc_str(), OpenRuntimeEfiName.wc_str()); EFI_HANDLE DriverHandle; @@ -1212,18 +1197,6 @@ void LOADER_ENTRY::StartLoader() } OcMain(&mOpenCoreStorage, NULL); - // { - // gCurrentConfig = &gMainConfig; - // RedirectRuntimeServices(); - // EFI_HANDLE Handle = NULL; - // Status = gBS->InstallMultipleProtocolInterfaces ( - // &Handle, - // &gOcFirmwareRuntimeProtocolGuid, - // &mOcFirmwareRuntimeProtocol, - // NULL - // ); - // DBG("Install gOcFirmwareRuntimeProtocolGuid : Status %s\n", efiStrError(Status)); - // } XStringW DevicePathAsString = DevicePathToXStringW(DevicePath); if ( DevicePathAsString.rindexOf(".dmg") == MAX_XSIZE ) @@ -1638,7 +1611,7 @@ void LOADER_ENTRY::StartLoader() mOpenCoreConfiguration.Kernel.Quirks.DisableIoMapper, mOpenCoreConfiguration.Kernel.Quirks.DisableLinkeditJettison, mOpenCoreConfiguration.Kernel.Quirks.DisableRtcChecksum, - mOpenCoreConfiguration.Kernel.Quirks.DummyPowerManagement, + mOpenCoreConfiguration.Kernel.Emulate.DummyPowerManagement, mOpenCoreConfiguration.Kernel.Quirks.ExternalDiskIcons, mOpenCoreConfiguration.Kernel.Quirks.IncreasePciBarSize, mOpenCoreConfiguration.Kernel.Quirks.LapicKernelPanic,