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Signed-off-by: SergeySlice <sergey.slice@gmail.com>
This commit is contained in:
SergeySlice 2021-04-15 21:22:14 +03:00
parent 9bff704ea7
commit 917760ba82
4 changed files with 49 additions and 11 deletions
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2
rEFIt_UEFI/Platform/DataHubCpu.cpp
View File

@ -545,7 +545,7 @@ SetupDataForOSX(BOOLEAN Hibernate)
if (!isRevLess) {
LogDataHub(&gEfiMiscSubClassGuid, L"RBr", &RBr, 8);
LogDataHub(&gEfiMiscSubClassGuid, L"EPCI", &ApplePlatformData[GlobalConfig.CurrentModel].smcConfig, 4);
LogDataHub(&gEfiMiscSubClassGuid, L"REV", ApplePlatformData[GlobalConfig.CurrentModel].smcRevision, 6);
LogDataHub(&gEfiMiscSubClassGuid, L"REV", &ApplePlatformData[GlobalConfig.CurrentModel].smcRevision, 6);
}
LogDataHub(&gEfiMiscSubClassGuid, L"RPlt", RPlt, 8);
LogDataHub(&gEfiMiscSubClassGuid, L"BEMB", &gSettings.Smbios.Mobile, 1);

13
rEFIt_UEFI/Platform/FixBiosDsdt.cpp
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@ -5278,9 +5278,9 @@ DBG("RenameDevices %zu\n", gSettings.ACPI.DeviceRename.size());
break; //not found
}
adr += shift;
// DBG("found Name @ 0x%X\n", adr);
DBG("found Name @ 0x%llX\n", adr);
if (Bridge.isEmpty() || (FindBin(table + adr - 4, 5, (const UINT8*)(Bridge.c_str()), 4) == 0)) { // long name like "RP02.PXSX"
DBG("replace without bridge %.*s by %s at table+%llu\n", 4, table + adr, Replace.c_str(), adr);
// DBG("replace without bridge %.*s by %s at table+%llu\n", 4, table + adr, Replace.c_str(), adr);
CopyMem(table + adr, Replace.c_str(), 4);
adr += 5; //at least, it is impossible to see PXSXPXSX
Num++;
@ -5290,7 +5290,7 @@ DBG("RenameDevices %zu\n", gSettings.ACPI.DeviceRename.size());
i = adr;
while ((i > 0) && isACPI_Char(table[i])) i--; //skip attached name
i -= 6; //skip size and device field
// DBG("search for bridge since %d\n", adr);
// DBG("search for bridge since %lld\n", adr);
while (i > 0x20) { //find devices that previous to adr
found = FALSE;
//check device
@ -5305,10 +5305,11 @@ DBG("RenameDevices %zu\n", gSettings.ACPI.DeviceRename.size());
found = TRUE;
}
if (found) { // i points to Device or Scope
size = get_size(table, (UINT32)(UINTN)k); //k points to size // DBG("found bridge candidate 0x%X size %d\n", table[i], size);
size = get_size(table, (UINT32)(UINTN)k); //k points to size //
// DBG("found bridge candidate 0x%X size %lld\n", table[i], size);
if (size) {
if ((k + size) > (adr + 4)) { //Yes - it is outer
// DBG("found Bridge device begin=%X end=%X\n", k, k+size);
// DBG("found Bridge device begin=%llX end=%llX\n", k, k+size);
if (table[k] < 0x40) {
k += 1;
}
@ -5323,7 +5324,7 @@ DBG("RenameDevices %zu\n", gSettings.ACPI.DeviceRename.size());
DBG("replace with bridge %.*s by %s at table+%llu\n", 4, table + adr, Replace.c_str(), adr);
CopyMem(table + adr, Replace.c_str(), 4);
adr += 5;
// DBG(" name copied\n");
DBG(" name copied\n");
Num++;
break; //cancel search outer bridge, we found it.
}

37
rEFIt_UEFI/Platform/gma.cpp
View File

@ -3351,3 +3351,40 @@ BOOLEAN setup_gma_devprop(LOADER_ENTRY *Entry, pci_dt_t *gma_dev)
return TRUE;
}
//thanks to jalavoui
#if 0
/*
* Some BIOS implementations leave the Intel GPU interrupts enabled,
* even though no one is handling them (f.e. i915 driver is never loaded).
* Additionally the interrupt destination is not set up properly
* and the interrupt ends up -somewhere-.
*
* These spurious interrupts are "sticky" and the kernel disables
* the (shared) interrupt line after 100.000+ generated interrupts.
*
* Fix it by disabling the still enabled interrupts.
* This resolves crashes often seen on monitor unplug.
*/
#define I915_DEIER_REG 0x4400c
static void disable_igfx_irq(struct pci_dev *dev)
{
void __iomem *regs = pci_iomap(dev, 0, 0);
if (regs == NULL) {
dev_warn(&dev->dev, "igfx quirk: Can't iomap PCI device\n");
return;
}
/* Check if any interrupt line is still enabled */
if (readl(regs + I915_DEIER_REG) != 0) {
dev_warn(&dev->dev, "BIOS left Intel GPU interrupts enabled; "
"disabling\n");
writel(0, regs + I915_DEIER_REG);
}
pci_iounmap(dev, regs);
}
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0102, disable_igfx_irq);
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x010a, disable_igfx_irq);
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0152, disable_igfx_irq);
#endif

4
rEFIt_UEFI/refit/main.cpp
View File

@ -848,8 +848,8 @@ void LOADER_ENTRY::StartLoader()
DBG("Beginning OC\n");
UINT64 CPUFrequencyFromART;
InternalCalculateARTFrequencyIntel(&CPUFrequencyFromART, NULL, 1);
// UINT64 CPUFrequencyFromART;
// InternalCalculateARTFrequencyIntel(&CPUFrequencyFromART, NULL, 1);
EFI_LOADED_IMAGE* OcLoadedImage;
Status = gBS->HandleProtocol(gImageHandle, &gEfiLoadedImageProtocolGuid, (VOID **) &OcLoadedImage);