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Merge branch 'master' of https://github.com/CloverHackyColor/CloverBootloader
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a9207a9305
@ -185,22 +185,28 @@ Headers collection for procedures
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//#define CPU_MODEL_HASWELL_H 0x?? // Haswell H
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#define CPU_MODEL_HASWELL_ULT 0x45 /* Haswell ULT */
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#define CPU_MODEL_CRYSTALWELL 0x46 /* Haswell ULX CPUID_MODEL_CRYSTALWELL */
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#define CPU_MODEL_BROADWELL_HQ 0x47
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#define CPU_MODEL_BROADWELL_HQ 0x47 /* E3-1200 v4 */
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#define CPU_MODEL_MERRIFIELD 0x4A /* Tangier */
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#define CPU_MODEL_AIRMONT 0x4C /* CherryTrail / Braswell */
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#define CPU_MODEL_AVOTON 0x4D /* Avaton/Rangely */
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#define CPU_MODEL_SKYLAKE_U 0x4E /* Skylake Mobile */
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#define CPU_MODEL_BROADWELL_E5 0x4F /* Xeon E5-2695 */
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#define CPU_MODEL_SKYLAKE_S 0x55 /* Skylake Server */
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#define CPU_MODEL_BROADWELL_DE 0x56
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#define CPU_MODEL_SKYLAKE_S 0x55 /* Skylake Server, Cooper Lake */
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#define CPU_MODEL_BROADWELL_DE 0x56 /* Xeon BroadWell */
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#define CPU_MODEL_KNIGHT 0x57 /* Knights Landing */
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#define CPU_MODEL_MOOREFIELD 0x5A /* Annidale */
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#define CPU_MODEL_GOLDMONT 0x5C /* Apollo Lake */
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#define CPU_MODEL_ATOM_X3 0x5D
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#define CPU_MODEL_ATOM_X3 0x5D /* Silvermont */
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#define CPU_MODEL_SKYLAKE_D 0x5E /* Skylake Desktop */
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#define CPU_MODEL_DENVERTON 0x5F /* Goldmont Microserver */
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#define CPU_MODEL_CANNONLAKE 0x66
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#define CPU_MODEL_ICELAKE_A 0x6A /* Xeon Ice Lake */
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#define CPU_MODEL_ICELAKE_C 0x6C /* Xeon Ice Lake */
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#define CPU_MODEL_ATOM_GM 0x7A /* Goldmont Plus */
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#define CPU_MODEL_ICELAKE_D 0x7D
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#define CPU_MODEL_ICELAKE 0x7E
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#define CPU_MODEL_XEON_MILL 0x85 /* Knights Mill */
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#define CPU_MODEL_ATOM_TM 0x86 /* Tremont */
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#define CPU_MODEL_KABYLAKE1 0x8E /* Kabylake Mobile */
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#define CPU_MODEL_KABYLAKE2 0x9E /* Kabylake Dektop, CoffeeLake */
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