191 lines
5.8 KiB
C
191 lines
5.8 KiB
C
/** @file
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Copyright (C) 2019, vit9696. All rights reserved.
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#ifndef APPLE_INTEL_CPU_INFO_H
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#define APPLE_INTEL_CPU_INFO_H
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///
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/// i386_cpu_info_t related definitions.
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/// Keep in sync with XNU osfmk/i386/cpuid.h.
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/// Last sync time: 4903.221.2.
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///
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/*
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* CPU families (sysctl hw.cpufamily)
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*
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* These are meant to identify the CPU's marketing name - an
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* application can map these to (possibly) localized strings.
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* NB: the encodings of the CPU families are intentionally arbitrary.
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* There is no ordering, and you should never try to deduce whether
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* or not some feature is available based on the family.
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* Use feature flags (eg, hw.optional.altivec) to test for optional
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* functionality.
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*/
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#define CPUFAMILY_UNKNOWN 0
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#define CPUFAMILY_INTEL_6_13 0xaa33392b
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#define CPUFAMILY_INTEL_PENRYN 0x78ea4fbc
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#define CPUFAMILY_INTEL_NEHALEM 0x6b5a4cd2
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#define CPUFAMILY_INTEL_WESTMERE 0x573b5eec
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#define CPUFAMILY_INTEL_SANDYBRIDGE 0x5490b78c
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#define CPUFAMILY_INTEL_IVYBRIDGE 0x1f65e835
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#define CPUFAMILY_INTEL_HASWELL 0x10b282dc
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#define CPUFAMILY_INTEL_BROADWELL 0x582ed09c
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#define CPUFAMILY_INTEL_SKYLAKE 0x37fc219f
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#define CPUFAMILY_INTEL_KABYLAKE 0x0f817246
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/* CPU type, integer_t */
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typedef INT32 cpu_type_t;
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typedef INT32 cpu_subtype_t;
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/*
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* Cache ID descriptor structure, used to parse CPUID leaf 2.
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* Note: not used in kernel.
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*/
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typedef enum { Lnone, L1I, L1D, L2U, L3U, LCACHE_MAX } cache_type_t;
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typedef struct {
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UINT8 value; /* Descriptor value */
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cache_type_t type; /* Cache type */
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UINT32 size; /* Cache size */
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UINT32 linesize; /* Cache line size */
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CONST CHAR8 *description; /* Cache description */
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} cpuid_cache_desc_t;
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typedef cache_type_t APPLE_INTEL_CPU_CACHE_TYPE;
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/* Monitor/mwait Leaf: */
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typedef struct {
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UINT32 linesize_min;
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UINT32 linesize_max;
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UINT32 extensions;
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UINT32 sub_Cstates;
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} cpuid_mwait_leaf_t;
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/* Thermal and Power Management Leaf: */
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typedef struct {
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BOOLEAN sensor;
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BOOLEAN dynamic_acceleration;
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BOOLEAN invariant_APIC_timer;
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BOOLEAN core_power_limits;
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BOOLEAN fine_grain_clock_mod;
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BOOLEAN package_thermal_intr;
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UINT32 thresholds;
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BOOLEAN ACNT_MCNT;
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BOOLEAN hardware_feedback;
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BOOLEAN energy_policy;
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} cpuid_thermal_leaf_t;
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/* XSAVE Feature Leaf: */
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typedef struct {
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UINT32 extended_state[4]; /* eax .. edx */
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} cpuid_xsave_leaf_t;
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/* Architectural Performance Monitoring Leaf: */
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typedef struct {
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UINT8 version;
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UINT8 number;
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UINT8 width;
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UINT8 events_number;
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UINT32 events;
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UINT8 fixed_number;
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UINT8 fixed_width;
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} cpuid_arch_perf_leaf_t;
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/* The TSC to Core Crystal (RefCLK) Clock Information leaf */
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typedef struct {
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UINT32 numerator;
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UINT32 denominator;
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} cpuid_tsc_leaf_t;
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/* Physical CPU info - this is exported out of the kernel (kexts), so be wary of changes */
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typedef struct {
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CHAR8 cpuid_vendor[16];
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CHAR8 cpuid_brand_string[48];
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CONST CHAR8 *cpuid_model_string;
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cpu_type_t cpuid_type; /* this is *not* a cpu_type_t in our <mach/machine.h> */
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UINT8 cpuid_family;
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UINT8 cpuid_model;
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UINT8 cpuid_extmodel;
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UINT8 cpuid_extfamily;
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UINT8 cpuid_stepping;
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UINT64 cpuid_features;
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UINT64 cpuid_extfeatures;
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UINT32 cpuid_signature;
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UINT8 cpuid_brand;
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UINT8 cpuid_processor_flag;
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UINT32 cache_size[LCACHE_MAX];
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UINT32 cache_linesize;
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UINT8 cache_info[64]; /* list of cache descriptors */
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UINT32 cpuid_cores_per_package;
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UINT32 cpuid_logical_per_package;
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UINT32 cache_sharing[LCACHE_MAX];
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UINT32 cache_partitions[LCACHE_MAX];
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cpu_type_t cpuid_cpu_type; /* <mach/machine.h> */
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cpu_subtype_t cpuid_cpu_subtype; /* <mach/machine.h> */
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/* Per-vendor info */
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cpuid_mwait_leaf_t cpuid_mwait_leaf;
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#define cpuid_mwait_linesize_max cpuid_mwait_leaf.linesize_max
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#define cpuid_mwait_linesize_min cpuid_mwait_leaf.linesize_min
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#define cpuid_mwait_extensions cpuid_mwait_leaf.extensions
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#define cpuid_mwait_sub_Cstates cpuid_mwait_leaf.sub_Cstates
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cpuid_thermal_leaf_t cpuid_thermal_leaf;
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cpuid_arch_perf_leaf_t cpuid_arch_perf_leaf;
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UINT32 unused[4]; /* cpuid_xsave_leaf */
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/* Cache details: */
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UINT32 cpuid_cache_linesize;
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UINT32 cpuid_cache_L2_associativity;
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UINT32 cpuid_cache_size;
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/* Virtual and physical address aize: */
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UINT32 cpuid_address_bits_physical;
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UINT32 cpuid_address_bits_virtual;
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UINT32 cpuid_microcode_version;
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/* Numbers of tlbs per processor [i|d, small|large, level0|level1] */
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UINT32 cpuid_tlb[2][2][2];
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#define TLB_INST 0
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#define TLB_DATA 1
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#define TLB_SMALL 0
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#define TLB_LARGE 1
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UINT32 cpuid_stlb;
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UINT32 core_count;
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UINT32 thread_count;
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/* Max leaf ids available from CPUID */
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UINT32 cpuid_max_basic;
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UINT32 cpuid_max_ext;
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/* Family-specific info links */
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UINT32 cpuid_cpufamily;
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cpuid_mwait_leaf_t *cpuid_mwait_leafp;
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cpuid_thermal_leaf_t *cpuid_thermal_leafp;
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cpuid_arch_perf_leaf_t *cpuid_arch_perf_leafp;
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cpuid_xsave_leaf_t *cpuid_xsave_leafp;
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UINT64 cpuid_leaf7_features;
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cpuid_tsc_leaf_t cpuid_tsc_leaf;
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cpuid_xsave_leaf_t cpuid_xsave_leaf[2];
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} i386_cpu_info_t;
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typedef i386_cpu_info_t APPLE_INTEL_CPU_INFO;
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#endif // APPLE_INTEL_CPU_INFO_H
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