mirror of
https://github.com/CloverHackyColor/CloverBootloader.git
synced 2024-11-30 12:43:41 +01:00
627 lines
17 KiB
INI
627 lines
17 KiB
INI
## @file
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# Base Library implementation.
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#
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# Copyright (c) 2007 - 2019, Intel Corporation. All rights reserved.<BR>
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# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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# Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
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#
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php.
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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#
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##
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[Defines]
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INF_VERSION = 0x00010005
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BASE_NAME = BaseLib
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MODULE_UNI_FILE = BaseLib.uni
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FILE_GUID = 27d67720-ea68-48ae-93da-a3a074c90e30
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MODULE_TYPE = BASE
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VERSION_STRING = 1.1
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LIBRARY_CLASS = BaseLib
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#
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# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64
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#
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[Sources]
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CheckSum.c
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SwitchStack.c
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SwapBytes64.c
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SwapBytes32.c
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SwapBytes16.c
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LongJump.c
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SetJump.c
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RShiftU64.c
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RRotU64.c
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RRotU32.c
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MultU64x64.c
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MultU64x32.c
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MultS64x64.c
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ModU64x32.c
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LShiftU64.c
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LRotU64.c
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LRotU32.c
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LowBitSet64.c
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LowBitSet32.c
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HighBitSet64.c
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HighBitSet32.c
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GetPowerOfTwo64.c
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GetPowerOfTwo32.c
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DivU64x64Remainder.c
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DivU64x32Remainder.c
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DivU64x32.c
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DivS64x64Remainder.c
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ARShiftU64.c
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BitField.c
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CpuDeadLoop.c
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Cpu.c
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LinkedList.c
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SafeString.c
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String.c
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FilePaths.c
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BaseLibInternals.h
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[Sources.Ia32]
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Ia32/WriteTr.nasm
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Ia32/Lfence.nasm
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Ia32/Wbinvd.c | MSFT
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Ia32/WriteMm7.c | MSFT
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Ia32/WriteMm6.c | MSFT
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Ia32/WriteMm5.c | MSFT
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Ia32/WriteMm4.c | MSFT
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Ia32/WriteMm3.c | MSFT
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Ia32/WriteMm2.c | MSFT
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Ia32/WriteMm1.c | MSFT
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Ia32/WriteMm0.c | MSFT
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Ia32/WriteLdtr.c | MSFT
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Ia32/WriteIdtr.c | MSFT
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Ia32/WriteGdtr.c | MSFT
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Ia32/WriteDr7.c | MSFT
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Ia32/WriteDr6.c | MSFT
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Ia32/WriteDr5.c | MSFT
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Ia32/WriteDr4.c | MSFT
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Ia32/WriteDr3.c | MSFT
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Ia32/WriteDr2.c | MSFT
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Ia32/WriteDr1.c | MSFT
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Ia32/WriteDr0.c | MSFT
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Ia32/WriteCr4.c | MSFT
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Ia32/WriteCr3.c | MSFT
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Ia32/WriteCr2.c | MSFT
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Ia32/WriteCr0.c | MSFT
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Ia32/WriteMsr64.c | MSFT
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Ia32/SwapBytes64.c | MSFT
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Ia32/SetJump.c | MSFT
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Ia32/RRotU64.c | MSFT
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Ia32/RShiftU64.c | MSFT
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Ia32/ReadPmc.c | MSFT
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Ia32/ReadTsc.c | MSFT
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Ia32/ReadLdtr.c | MSFT
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Ia32/ReadIdtr.c | MSFT
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Ia32/ReadGdtr.c | MSFT
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Ia32/ReadTr.c | MSFT
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Ia32/ReadSs.c | MSFT
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Ia32/ReadGs.c | MSFT
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Ia32/ReadFs.c | MSFT
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Ia32/ReadEs.c | MSFT
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Ia32/ReadDs.c | MSFT
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Ia32/ReadCs.c | MSFT
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Ia32/ReadMsr64.c | MSFT
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Ia32/ReadMm7.c | MSFT
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Ia32/ReadMm6.c | MSFT
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Ia32/ReadMm5.c | MSFT
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Ia32/ReadMm4.c | MSFT
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Ia32/ReadMm3.c | MSFT
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Ia32/ReadMm2.c | MSFT
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Ia32/ReadMm1.c | MSFT
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Ia32/ReadMm0.c | MSFT
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Ia32/ReadEflags.c | MSFT
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Ia32/ReadDr7.c | MSFT
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Ia32/ReadDr6.c | MSFT
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Ia32/ReadDr5.c | MSFT
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Ia32/ReadDr4.c | MSFT
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Ia32/ReadDr3.c | MSFT
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Ia32/ReadDr2.c | MSFT
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Ia32/ReadDr1.c | MSFT
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Ia32/ReadDr0.c | MSFT
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Ia32/ReadCr4.c | MSFT
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Ia32/ReadCr3.c | MSFT
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Ia32/ReadCr2.c | MSFT
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Ia32/ReadCr0.c | MSFT
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Ia32/Mwait.c | MSFT
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Ia32/Monitor.c | MSFT
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Ia32/ModU64x32.c | MSFT
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Ia32/MultU64x64.c | MSFT
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Ia32/MultU64x32.c | MSFT
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Ia32/LShiftU64.c | MSFT
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Ia32/LRotU64.c | MSFT
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Ia32/LongJump.c | MSFT
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Ia32/Invd.c | MSFT
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Ia32/FxRestore.c | MSFT
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Ia32/FxSave.c | MSFT
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Ia32/FlushCacheLine.c | MSFT
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Ia32/EnablePaging32.c | MSFT
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Ia32/EnableInterrupts.c | MSFT
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Ia32/EnableDisableInterrupts.c | MSFT
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Ia32/DivU64x64Remainder.nasm| MSFT
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Ia32/DivU64x32Remainder.c | MSFT
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Ia32/DivU64x32.c | MSFT
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Ia32/DisablePaging32.c | MSFT
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Ia32/DisableInterrupts.c | MSFT
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Ia32/CpuPause.c | MSFT
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Ia32/CpuIdEx.c | MSFT
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Ia32/CpuId.c | MSFT
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Ia32/CpuBreakpoint.c | MSFT
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Ia32/ARShiftU64.c | MSFT
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Ia32/Thunk16.nasm | MSFT
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Ia32/EnablePaging64.nasm| MSFT
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Ia32/EnableCache.c | MSFT
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Ia32/DisableCache.c | MSFT
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Ia32/RdRand.nasm| MSFT
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Ia32/Wbinvd.nasm| INTEL
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Ia32/WriteMm7.nasm| INTEL
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Ia32/WriteMm6.nasm| INTEL
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Ia32/WriteMm5.nasm| INTEL
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Ia32/WriteMm4.nasm| INTEL
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Ia32/WriteMm3.nasm| INTEL
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Ia32/WriteMm2.nasm| INTEL
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Ia32/WriteMm1.nasm| INTEL
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Ia32/WriteMm0.nasm| INTEL
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Ia32/WriteLdtr.nasm| INTEL
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Ia32/WriteIdtr.nasm| INTEL
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Ia32/WriteGdtr.nasm| INTEL
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Ia32/WriteDr7.nasm| INTEL
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Ia32/WriteDr6.nasm| INTEL
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Ia32/WriteDr5.nasm| INTEL
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Ia32/WriteDr4.nasm| INTEL
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Ia32/WriteDr3.nasm| INTEL
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Ia32/WriteDr2.nasm| INTEL
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Ia32/WriteDr1.nasm| INTEL
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Ia32/WriteDr0.nasm| INTEL
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Ia32/WriteCr4.nasm| INTEL
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Ia32/WriteCr3.nasm| INTEL
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Ia32/WriteCr2.nasm| INTEL
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Ia32/WriteCr0.nasm| INTEL
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Ia32/WriteMsr64.nasm| INTEL
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Ia32/SwapBytes64.nasm| INTEL
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Ia32/SetJump.nasm| INTEL
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Ia32/RRotU64.nasm| INTEL
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Ia32/RShiftU64.nasm| INTEL
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Ia32/ReadPmc.nasm| INTEL
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Ia32/ReadTsc.nasm| INTEL
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Ia32/ReadLdtr.nasm| INTEL
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Ia32/ReadIdtr.nasm| INTEL
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Ia32/ReadGdtr.nasm| INTEL
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Ia32/ReadTr.nasm| INTEL
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Ia32/ReadSs.nasm| INTEL
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Ia32/ReadGs.nasm| INTEL
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Ia32/ReadFs.nasm| INTEL
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Ia32/ReadEs.nasm| INTEL
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Ia32/ReadDs.nasm| INTEL
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Ia32/ReadCs.nasm| INTEL
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Ia32/ReadMsr64.nasm| INTEL
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Ia32/ReadMm7.nasm| INTEL
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Ia32/ReadMm6.nasm| INTEL
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Ia32/ReadMm5.nasm| INTEL
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Ia32/ReadMm4.nasm| INTEL
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Ia32/ReadMm3.nasm| INTEL
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Ia32/ReadMm2.nasm| INTEL
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Ia32/ReadMm1.nasm| INTEL
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Ia32/ReadMm0.nasm| INTEL
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Ia32/ReadEflags.nasm| INTEL
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Ia32/ReadDr7.nasm| INTEL
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Ia32/ReadDr6.nasm| INTEL
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Ia32/ReadDr5.nasm| INTEL
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Ia32/ReadDr4.nasm| INTEL
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Ia32/ReadDr3.nasm| INTEL
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Ia32/ReadDr2.nasm| INTEL
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Ia32/ReadDr1.nasm| INTEL
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Ia32/ReadDr0.nasm| INTEL
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Ia32/ReadCr4.nasm| INTEL
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Ia32/ReadCr3.nasm| INTEL
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Ia32/ReadCr2.nasm| INTEL
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Ia32/ReadCr0.nasm| INTEL
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Ia32/Mwait.nasm| INTEL
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Ia32/Monitor.nasm| INTEL
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Ia32/ModU64x32.nasm| INTEL
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Ia32/MultU64x64.nasm| INTEL
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Ia32/MultU64x32.nasm| INTEL
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Ia32/LShiftU64.nasm| INTEL
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Ia32/LRotU64.nasm| INTEL
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Ia32/LongJump.nasm| INTEL
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Ia32/Invd.nasm| INTEL
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Ia32/FxRestore.nasm| INTEL
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Ia32/FxSave.nasm| INTEL
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Ia32/FlushCacheLine.nasm| INTEL
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Ia32/EnablePaging32.nasm| INTEL
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Ia32/EnableInterrupts.nasm| INTEL
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Ia32/EnableDisableInterrupts.nasm| INTEL
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Ia32/DivU64x64Remainder.nasm| INTEL
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Ia32/DivU64x32Remainder.nasm| INTEL
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Ia32/DivU64x32.nasm| INTEL
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Ia32/DisablePaging32.nasm| INTEL
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Ia32/DisableInterrupts.nasm| INTEL
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Ia32/CpuPause.nasm| INTEL
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Ia32/CpuIdEx.nasm| INTEL
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Ia32/CpuId.nasm| INTEL
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Ia32/CpuBreakpoint.nasm| INTEL
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Ia32/ARShiftU64.nasm| INTEL
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Ia32/Thunk16.nasm | INTEL
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Ia32/EnablePaging64.nasm| INTEL
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Ia32/EnableCache.nasm| INTEL
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Ia32/DisableCache.nasm| INTEL
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Ia32/RdRand.nasm| INTEL
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Ia32/GccInline.c | GCC
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Ia32/Thunk16.nasm | GCC
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Ia32/Thunk16.S | XCODE
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Ia32/EnableDisableInterrupts.nasm| GCC
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Ia32/EnableDisableInterrupts.S | GCC
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Ia32/EnablePaging64.nasm| GCC
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Ia32/EnablePaging64.S | GCC
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Ia32/DisablePaging32.nasm| GCC
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Ia32/DisablePaging32.S | GCC
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Ia32/EnablePaging32.nasm| GCC
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Ia32/EnablePaging32.S | GCC
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Ia32/Mwait.nasm| GCC
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Ia32/Mwait.S | GCC
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Ia32/Monitor.nasm| GCC
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Ia32/Monitor.S | GCC
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Ia32/CpuIdEx.nasm| GCC
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Ia32/CpuIdEx.S | GCC
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Ia32/CpuId.nasm| GCC
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Ia32/CpuId.S | GCC
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Ia32/LongJump.nasm| GCC
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Ia32/LongJump.S | GCC
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Ia32/SetJump.nasm| GCC
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Ia32/SetJump.S | GCC
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Ia32/SwapBytes64.nasm| GCC
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Ia32/SwapBytes64.S | GCC
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Ia32/DivU64x64Remainder.nasm| GCC
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Ia32/DivU64x64Remainder.S | GCC
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Ia32/DivU64x32Remainder.nasm| GCC
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Ia32/DivU64x32Remainder.S | GCC
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Ia32/ModU64x32.nasm| GCC
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Ia32/ModU64x32.S | GCC
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Ia32/DivU64x32.nasm| GCC
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Ia32/DivU64x32.S | GCC
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Ia32/MultU64x64.nasm| GCC
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Ia32/MultU64x64.S | GCC
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Ia32/MultU64x32.nasm| GCC
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Ia32/MultU64x32.S | GCC
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Ia32/RRotU64.nasm| GCC
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Ia32/RRotU64.S | GCC
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Ia32/LRotU64.nasm| GCC
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Ia32/LRotU64.S | GCC
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Ia32/ARShiftU64.nasm| GCC
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Ia32/ARShiftU64.S | GCC
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Ia32/RShiftU64.nasm| GCC
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Ia32/RShiftU64.S | GCC
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Ia32/LShiftU64.nasm| GCC
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Ia32/LShiftU64.S | GCC
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Ia32/EnableCache.nasm| GCC
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Ia32/EnableCache.S | GCC
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Ia32/DisableCache.nasm| GCC
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Ia32/DisableCache.S | GCC
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Ia32/RdRand.nasm| GCC
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Ia32/RdRand.S | GCC
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Ia32/DivS64x64Remainder.c
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Ia32/InternalSwitchStack.c | MSFT
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Ia32/InternalSwitchStack.c | INTEL
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Ia32/InternalSwitchStack.S | GCC
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Ia32/InternalSwitchStack.nasm | GCC
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Ia32/Non-existing.c
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Unaligned.c
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X86WriteIdtr.c
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X86WriteGdtr.c
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X86Thunk.c
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X86ReadIdtr.c
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X86ReadGdtr.c
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X86Msr.c
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X86MemoryFence.c | MSFT
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X86MemoryFence.c | INTEL
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X86GetInterruptState.c
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X86FxSave.c
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X86FxRestore.c
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X86EnablePaging64.c
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X86EnablePaging32.c
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X86DisablePaging64.c
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X86DisablePaging32.c
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X86RdRand.c
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X86PatchInstruction.c
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X86SpeculationBarrier.c
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[Sources.X64]
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X64/Thunk16.nasm
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X64/CpuIdEx.nasm
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X64/CpuId.nasm
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X64/LongJump.nasm
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X64/SetJump.nasm
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X64/SwitchStack.nasm
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X64/EnableCache.nasm
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X64/DisableCache.nasm
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X64/WriteTr.nasm
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X64/Lfence.nasm
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X64/CpuBreakpoint.c | MSFT
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X64/WriteMsr64.c | MSFT
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X64/ReadMsr64.c | MSFT
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X64/RdRand.nasm| MSFT
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X64/CpuPause.nasm| MSFT
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X64/EnableDisableInterrupts.nasm| MSFT
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X64/DisableInterrupts.nasm| MSFT
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X64/EnableInterrupts.nasm| MSFT
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X64/FlushCacheLine.nasm| MSFT
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X64/Invd.nasm| MSFT
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X64/Wbinvd.nasm| MSFT
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X64/DisablePaging64.nasm| MSFT
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X64/Mwait.nasm| MSFT
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X64/Monitor.nasm| MSFT
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X64/ReadPmc.nasm| MSFT
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X64/ReadTsc.nasm| MSFT
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X64/WriteMm7.nasm| MSFT
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X64/WriteMm6.nasm| MSFT
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X64/WriteMm5.nasm| MSFT
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|
X64/WriteMm4.nasm| MSFT
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|
X64/WriteMm3.nasm| MSFT
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|
X64/WriteMm2.nasm| MSFT
|
|
X64/WriteMm1.nasm| MSFT
|
|
X64/WriteMm0.nasm| MSFT
|
|
X64/ReadMm7.nasm| MSFT
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|
X64/ReadMm6.nasm| MSFT
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|
X64/ReadMm5.nasm| MSFT
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|
X64/ReadMm4.nasm| MSFT
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|
X64/ReadMm3.nasm| MSFT
|
|
X64/ReadMm2.nasm| MSFT
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|
X64/ReadMm1.nasm| MSFT
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|
X64/ReadMm0.nasm| MSFT
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|
X64/FxRestore.nasm| MSFT
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X64/FxSave.nasm| MSFT
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X64/WriteLdtr.nasm| MSFT
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|
X64/ReadLdtr.nasm| MSFT
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X64/WriteIdtr.nasm| MSFT
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X64/ReadIdtr.nasm| MSFT
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X64/WriteGdtr.nasm| MSFT
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X64/ReadGdtr.nasm| MSFT
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|
X64/ReadTr.nasm| MSFT
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|
X64/ReadSs.nasm| MSFT
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|
X64/ReadGs.nasm| MSFT
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|
X64/ReadFs.nasm| MSFT
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X64/ReadEs.nasm| MSFT
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X64/ReadDs.nasm| MSFT
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X64/ReadCs.nasm| MSFT
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X64/WriteDr7.nasm| MSFT
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X64/WriteDr6.nasm| MSFT
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|
X64/WriteDr5.nasm| MSFT
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X64/WriteDr4.nasm| MSFT
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X64/WriteDr3.nasm| MSFT
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X64/WriteDr2.nasm| MSFT
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X64/WriteDr1.nasm| MSFT
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X64/WriteDr0.nasm| MSFT
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X64/ReadDr7.nasm| MSFT
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X64/ReadDr6.nasm| MSFT
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X64/ReadDr5.nasm| MSFT
|
|
X64/ReadDr4.nasm| MSFT
|
|
X64/ReadDr3.nasm| MSFT
|
|
X64/ReadDr2.nasm| MSFT
|
|
X64/ReadDr1.nasm| MSFT
|
|
X64/ReadDr0.nasm| MSFT
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|
X64/WriteCr4.nasm| MSFT
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X64/WriteCr3.nasm| MSFT
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|
X64/WriteCr2.nasm| MSFT
|
|
X64/WriteCr0.nasm| MSFT
|
|
X64/ReadCr4.nasm| MSFT
|
|
X64/ReadCr3.nasm| MSFT
|
|
X64/ReadCr2.nasm| MSFT
|
|
X64/ReadCr0.nasm| MSFT
|
|
X64/ReadEflags.nasm| MSFT
|
|
|
|
X64/CpuBreakpoint.nasm| INTEL
|
|
X64/WriteMsr64.nasm| INTEL
|
|
X64/ReadMsr64.nasm| INTEL
|
|
X64/RdRand.nasm| INTEL
|
|
X64/CpuPause.nasm| INTEL
|
|
X64/EnableDisableInterrupts.nasm| INTEL
|
|
X64/DisableInterrupts.nasm| INTEL
|
|
X64/EnableInterrupts.nasm| INTEL
|
|
X64/FlushCacheLine.nasm| INTEL
|
|
X64/Invd.nasm| INTEL
|
|
X64/Wbinvd.nasm| INTEL
|
|
X64/DisablePaging64.nasm| INTEL
|
|
X64/Mwait.nasm| INTEL
|
|
X64/Monitor.nasm| INTEL
|
|
X64/ReadPmc.nasm| INTEL
|
|
X64/ReadTsc.nasm| INTEL
|
|
X64/WriteMm7.nasm| INTEL
|
|
X64/WriteMm6.nasm| INTEL
|
|
X64/WriteMm5.nasm| INTEL
|
|
X64/WriteMm4.nasm| INTEL
|
|
X64/WriteMm3.nasm| INTEL
|
|
X64/WriteMm2.nasm| INTEL
|
|
X64/WriteMm1.nasm| INTEL
|
|
X64/WriteMm0.nasm| INTEL
|
|
X64/ReadMm7.nasm| INTEL
|
|
X64/ReadMm6.nasm| INTEL
|
|
X64/ReadMm5.nasm| INTEL
|
|
X64/ReadMm4.nasm| INTEL
|
|
X64/ReadMm3.nasm| INTEL
|
|
X64/ReadMm2.nasm| INTEL
|
|
X64/ReadMm1.nasm| INTEL
|
|
X64/ReadMm0.nasm| INTEL
|
|
X64/FxRestore.nasm| INTEL
|
|
X64/FxSave.nasm| INTEL
|
|
X64/WriteLdtr.nasm| INTEL
|
|
X64/ReadLdtr.nasm| INTEL
|
|
X64/WriteIdtr.nasm| INTEL
|
|
X64/ReadIdtr.nasm| INTEL
|
|
X64/WriteGdtr.nasm| INTEL
|
|
X64/ReadGdtr.nasm| INTEL
|
|
X64/ReadTr.nasm| INTEL
|
|
X64/ReadSs.nasm| INTEL
|
|
X64/ReadGs.nasm| INTEL
|
|
X64/ReadFs.nasm| INTEL
|
|
X64/ReadEs.nasm| INTEL
|
|
X64/ReadDs.nasm| INTEL
|
|
X64/ReadCs.nasm| INTEL
|
|
X64/WriteDr7.nasm| INTEL
|
|
X64/WriteDr6.nasm| INTEL
|
|
X64/WriteDr5.nasm| INTEL
|
|
X64/WriteDr4.nasm| INTEL
|
|
X64/WriteDr3.nasm| INTEL
|
|
X64/WriteDr2.nasm| INTEL
|
|
X64/WriteDr1.nasm| INTEL
|
|
X64/WriteDr0.nasm| INTEL
|
|
X64/ReadDr7.nasm| INTEL
|
|
X64/ReadDr6.nasm| INTEL
|
|
X64/ReadDr5.nasm| INTEL
|
|
X64/ReadDr4.nasm| INTEL
|
|
X64/ReadDr3.nasm| INTEL
|
|
X64/ReadDr2.nasm| INTEL
|
|
X64/ReadDr1.nasm| INTEL
|
|
X64/ReadDr0.nasm| INTEL
|
|
X64/WriteCr4.nasm| INTEL
|
|
X64/WriteCr3.nasm| INTEL
|
|
X64/WriteCr2.nasm| INTEL
|
|
X64/WriteCr0.nasm| INTEL
|
|
X64/ReadCr4.nasm| INTEL
|
|
X64/ReadCr3.nasm| INTEL
|
|
X64/ReadCr2.nasm| INTEL
|
|
X64/ReadCr0.nasm| INTEL
|
|
X64/ReadEflags.nasm| INTEL
|
|
|
|
X64/Non-existing.c
|
|
Math64.c
|
|
Unaligned.c
|
|
X86WriteIdtr.c
|
|
X86WriteGdtr.c
|
|
X86Thunk.c
|
|
X86ReadIdtr.c
|
|
X86ReadGdtr.c
|
|
X86Msr.c
|
|
X86MemoryFence.c | MSFT
|
|
X86MemoryFence.c | INTEL
|
|
X86GetInterruptState.c
|
|
X86FxSave.c
|
|
X86FxRestore.c
|
|
X86EnablePaging64.c
|
|
X86EnablePaging32.c
|
|
X86DisablePaging64.c
|
|
X86DisablePaging32.c
|
|
X86RdRand.c
|
|
X86PatchInstruction.c
|
|
X86SpeculationBarrier.c
|
|
X64/GccInline.c | GCC
|
|
# X64/Thunk16.S | XCODE
|
|
X64/SwitchStack.nasm| GCC
|
|
X64/SwitchStack.S | GCC
|
|
X64/SetJump.nasm| GCC
|
|
X64/SetJump.S | GCC
|
|
X64/LongJump.nasm| GCC
|
|
X64/LongJump.S | GCC
|
|
X64/EnableDisableInterrupts.nasm| GCC
|
|
X64/EnableDisableInterrupts.S | GCC
|
|
X64/DisablePaging64.nasm| GCC
|
|
X64/DisablePaging64.S | GCC
|
|
X64/CpuId.nasm| GCC
|
|
X64/CpuId.S | GCC
|
|
X64/CpuIdEx.nasm| GCC
|
|
X64/CpuIdEx.S | GCC
|
|
X64/EnableCache.nasm| GCC
|
|
X64/EnableCache.S | GCC
|
|
X64/DisableCache.nasm| GCC
|
|
X64/DisableCache.S | GCC
|
|
X64/RdRand.nasm| GCC
|
|
X64/RdRand.S | GCC
|
|
ChkStkGcc.c | GCC
|
|
|
|
[Sources.EBC]
|
|
Ebc/CpuBreakpoint.c
|
|
Ebc/SetJumpLongJump.c
|
|
Ebc/SwitchStack.c
|
|
Ebc/SpeculationBarrier.c
|
|
Unaligned.c
|
|
Math64.c
|
|
|
|
[Sources.ARM]
|
|
Arm/InternalSwitchStack.c
|
|
Arm/Unaligned.c
|
|
Math64.c | RVCT
|
|
Math64.c | MSFT
|
|
|
|
Arm/SwitchStack.asm | RVCT
|
|
Arm/SetJumpLongJump.asm | RVCT
|
|
Arm/DisableInterrupts.asm | RVCT
|
|
Arm/EnableInterrupts.asm | RVCT
|
|
Arm/GetInterruptsState.asm | RVCT
|
|
Arm/CpuPause.asm | RVCT
|
|
Arm/CpuBreakpoint.asm | RVCT
|
|
Arm/MemoryFence.asm | RVCT
|
|
Arm/SpeculationBarrier.S | RVCT
|
|
|
|
Arm/SwitchStack.asm | MSFT
|
|
Arm/SetJumpLongJump.asm | MSFT
|
|
Arm/DisableInterrupts.asm | MSFT
|
|
Arm/EnableInterrupts.asm | MSFT
|
|
Arm/GetInterruptsState.asm | MSFT
|
|
Arm/CpuPause.asm | MSFT
|
|
Arm/CpuBreakpoint.asm | MSFT
|
|
Arm/MemoryFence.asm | MSFT
|
|
Arm/SpeculationBarrier.asm | MSFT
|
|
|
|
Arm/Math64.S | GCC
|
|
Arm/SwitchStack.S | GCC
|
|
Arm/EnableInterrupts.S | GCC
|
|
Arm/DisableInterrupts.S | GCC
|
|
Arm/GetInterruptsState.S | GCC
|
|
Arm/SetJumpLongJump.S | GCC
|
|
Arm/CpuBreakpoint.S | GCC
|
|
Arm/MemoryFence.S | GCC
|
|
Arm/SpeculationBarrier.S | GCC
|
|
|
|
[Sources.AARCH64]
|
|
Arm/InternalSwitchStack.c
|
|
Arm/Unaligned.c
|
|
Math64.c
|
|
|
|
AArch64/MemoryFence.S | GCC
|
|
AArch64/SwitchStack.S | GCC
|
|
AArch64/EnableInterrupts.S | GCC
|
|
AArch64/DisableInterrupts.S | GCC
|
|
AArch64/GetInterruptsState.S | GCC
|
|
AArch64/SetJumpLongJump.S | GCC
|
|
AArch64/CpuBreakpoint.S | GCC
|
|
AArch64/SpeculationBarrier.S | GCC
|
|
|
|
AArch64/MemoryFence.asm | MSFT
|
|
AArch64/SwitchStack.asm | MSFT
|
|
AArch64/EnableInterrupts.asm | MSFT
|
|
AArch64/DisableInterrupts.asm | MSFT
|
|
AArch64/GetInterruptsState.asm | MSFT
|
|
AArch64/SetJumpLongJump.asm | MSFT
|
|
AArch64/CpuBreakpoint.asm | MSFT
|
|
AArch64/SpeculationBarrier.asm | MSFT
|
|
|
|
[Packages]
|
|
MdePkg/MdePkg.dec
|
|
|
|
[LibraryClasses]
|
|
PcdLib
|
|
DebugLib
|
|
BaseMemoryLib
|
|
|
|
[Pcd]
|
|
gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength ## SOMETIMES_CONSUMES
|
|
gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength ## SOMETIMES_CONSUMES
|
|
gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength ## SOMETIMES_CONSUMES
|
|
gEfiMdePkgTokenSpaceGuid.PcdControlFlowEnforcementPropertyMask ## SOMETIMES_CONSUMES
|
|
|
|
[FeaturePcd]
|
|
gEfiMdePkgTokenSpaceGuid.PcdVerifyNodeInList ## CONSUMES
|