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36 lines
863 B
NASM
36 lines
863 B
NASM
;------------------------------------------------------------------------------
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;
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; CpuBreakpoint() for ARM
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;
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; Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
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; Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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;
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;------------------------------------------------------------------------------
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EXPORT CpuBreakpoint
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; Force ARM mode for this section, as MSFT assembler defaults to THUMB
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AREA Cpu_Breakpoint, CODE, READONLY, ARM
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ARM
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;/**
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; Generates a breakpoint on the CPU.
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;
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; Generates a breakpoint on the CPU. The breakpoint must be implemented such
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; that code can resume normal execution after the breakpoint.
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;
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;**/
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;VOID
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;EFIAPI
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;CpuBreakpoint (
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; VOID
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; );
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;
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CpuBreakpoint
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swi 0xdbdbdb
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bx lr
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END
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