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https://github.com/CloverHackyColor/CloverBootloader.git
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140 lines
5.3 KiB
C
140 lines
5.3 KiB
C
/** @file
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EFI SMM Access PPI definition.
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This PPI is used to control the visibility of the SMRAM on the platform.
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It abstracts the location and characteristics of SMRAM. The expectation is
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that the north bridge or memory controller would publish this PPI.
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The principal functionality found in the memory controller includes the following:
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- Exposing the SMRAM to all non-SMM agents, or the "open" state
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- Shrouding the SMRAM to all but the SMM agents, or the "closed" state
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- Preserving the system integrity, or "locking" the SMRAM, such that the settings cannot be
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perturbed by either boot service or runtime agents
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Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef _SMM_ACCESS_PPI_H_
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#define _SMM_ACCESS_PPI_H_
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#define PEI_SMM_ACCESS_PPI_GUID \
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{ 0x268f33a9, 0xcccd, 0x48be, { 0x88, 0x17, 0x86, 0x5, 0x3a, 0xc3, 0x2e, 0xd6 }}
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typedef struct _PEI_SMM_ACCESS_PPI PEI_SMM_ACCESS_PPI;
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/**
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Opens the SMRAM area to be accessible by a PEIM driver.
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This function "opens" SMRAM so that it is visible while not inside of SMM. The function should
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return EFI_UNSUPPORTED if the hardware does not support hiding of SMRAM. The function
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should return EFI_DEVICE_ERROR if the SMRAM configuration is locked.
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@param PeiServices General purpose services available to every PEIM.
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@param This The pointer to the SMM Access Interface.
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@param DescriptorIndex The region of SMRAM to Open.
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@retval EFI_SUCCESS The region was successfully opened.
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@retval EFI_DEVICE_ERROR The region could not be opened because locked by chipset.
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@retval EFI_INVALID_PARAMETER The descriptor index was out of bounds.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *PEI_SMM_OPEN)(
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IN EFI_PEI_SERVICES **PeiServices,
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IN PEI_SMM_ACCESS_PPI *This,
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IN UINTN DescriptorIndex
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);
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/**
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Inhibits access to the SMRAM.
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This function "closes" SMRAM so that it is not visible while outside of SMM. The function should
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return EFI_UNSUPPORTED if the hardware does not support hiding of SMRAM.
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@param PeiServices General purpose services available to every PEIM.
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@param This The pointer to the SMM Access Interface.
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@param DescriptorIndex The region of SMRAM to Close.
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@retval EFI_SUCCESS The region was successfully closed.
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@retval EFI_DEVICE_ERROR The region could not be closed because locked by chipset.
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@retval EFI_INVALID_PARAMETER The descriptor index was out of bounds.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *PEI_SMM_CLOSE)(
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IN EFI_PEI_SERVICES **PeiServices,
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IN PEI_SMM_ACCESS_PPI *This,
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IN UINTN DescriptorIndex
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);
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/**
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Inhibits access to the SMRAM.
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This function prohibits access to the SMRAM region. This function is usually implemented such
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that it is a write-once operation.
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@param PeiServices General purpose services available to every PEIM.
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@param This The pointer to the SMM Access Interface.
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@param DescriptorIndex The region of SMRAM to Close.
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@retval EFI_SUCCESS The region was successfully locked.
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@retval EFI_DEVICE_ERROR The region could not be locked because at least
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one range is still open.
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@retval EFI_INVALID_PARAMETER The descriptor index was out of bounds.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *PEI_SMM_LOCK)(
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IN EFI_PEI_SERVICES **PeiServices,
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IN PEI_SMM_ACCESS_PPI *This,
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IN UINTN DescriptorIndex
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);
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/**
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Queries the memory controller for the possible regions that will support SMRAM.
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@param PeiServices General purpose services available to every PEIM.
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@param This The pointer to the SmmAccessPpi Interface.
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@param SmramMapSize The pointer to the variable containing size of the
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buffer to contain the description information.
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@param SmramMap The buffer containing the data describing the Smram
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region descriptors.
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@retval EFI_BUFFER_TOO_SMALL The user did not provide a sufficient buffer.
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@retval EFI_SUCCESS The user provided a sufficiently-sized buffer.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *PEI_SMM_CAPABILITIES)(
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IN EFI_PEI_SERVICES **PeiServices,
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IN PEI_SMM_ACCESS_PPI *This,
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IN OUT UINTN *SmramMapSize,
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IN OUT EFI_SMRAM_DESCRIPTOR *SmramMap
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);
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///
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/// EFI SMM Access PPI is used to control the visibility of the SMRAM on the platform.
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/// It abstracts the location and characteristics of SMRAM. The platform should report
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/// all MMRAM via PEI_SMM_ACCESS_PPI. The expectation is that the north bridge or
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/// memory controller would publish this PPI.
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///
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struct _PEI_SMM_ACCESS_PPI {
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PEI_SMM_OPEN Open;
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PEI_SMM_CLOSE Close;
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PEI_SMM_LOCK Lock;
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PEI_SMM_CAPABILITIES GetCapabilities;
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BOOLEAN LockState;
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BOOLEAN OpenState;
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};
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extern EFI_GUID gPeiSmmAccessPpiGuid;
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#endif
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