mirror of
https://github.com/CloverHackyColor/CloverBootloader.git
synced 2024-11-30 12:43:41 +01:00
757 lines
17 KiB
C
757 lines
17 KiB
C
/*
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*
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* Created by Evan Lojewski on 3/4/10.
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* Copyright 2009. All rights reserved.
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*
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*/
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/* Copied from 915 resolution created by steve tomljenovic
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*
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* This code is based on the techniques used in :
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*
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* - 855patch. Many thanks to Christian Zietz (czietz gmx net)
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* for demonstrating how to shadow the VBIOS into system RAM
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* and then modify it.
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*
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* - 1280patch by Andrew Tipton (andrewtipton null li).
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*
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* - 855resolution by Alain Poirier
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*
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* This source code is into the public domain.
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*/
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/*
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* based on work of DieBuche http://www.insanelymac.com/forum/index.php?showtopic=211294
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*
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* UEFI Clover adaptation - Slice 2012
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*
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*/
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#include "Platform.h"
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#include "Resolutions.h"
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//Slice - nonsense. Obsolete chipset list
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//will get from our GetDevice()
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chipset_type get_chipset(UInt32 id)
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{
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chipset_type type;
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switch (id) {
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case 0x35758086:
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type = CT_830;
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break;
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case 0x25608086:
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type = CT_845G;
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break;
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case 0x35808086:
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type = CT_855GM;
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break;
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case 0x25708086:
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type = CT_865G;
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break;
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case 0x25808086:
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type = CT_915G;
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break;
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case 0x25908086:
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type = CT_915GM;
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break;
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case 0x27708086:
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type = CT_945G;
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break;
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case 0x27a08086:
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type = CT_945GM;
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break;
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case 0x27ac8086:
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type = CT_945GME;
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break;
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case 0x29708086:
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type = CT_946GZ;
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break;
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case 0x27748086:
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type = CT_955X;
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break;
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case 0x277c8086:
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type = CT_975X;
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break;
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case 0x29a08086:
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type = CT_G965;
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break;
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case 0x29908086:
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type = CT_Q965;
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break;
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case 0x81008086:
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type = CT_500;
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break;
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case 0x2e108086:
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case 0X2e908086:
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type = CT_B43;
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break;
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case 0x2e208086:
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type = CT_P45;
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break;
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case 0x2e308086:
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type = CT_G41;
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break;
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case 0x29c08086:
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type = CT_G31;
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break;
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case 0x29208086:
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type = CT_G45;
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break;
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case 0xA0108086: // mobile
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case 0xA0008086: // desktop
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type = CT_3150;
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break;
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case 0x2a008086:
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type = CT_965GM;
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break;
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case 0x29e08086:
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type = CT_X48;
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break;
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case 0x2a408086:
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type = CT_GM45;
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break;
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default:
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if((id & 0x0000FFFF) == 0x00008086) // Intel chipset
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{
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//printf("Unknown chipset 0x%llX, please email id to meklort@gmail.com", id);
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//getc();
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type = CT_UNKNOWN_INTEL;
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//type = CT_UNKNOWN;
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}
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else
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{
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type = CT_UNKNOWN;
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}
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break;
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}
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return type;
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}
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//Slice
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//int getMode(edid_mode *mode)
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//details about largest LCD mode. Will prepare in BioasVideo
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//here we want to get LCD screen resolution that is disabled by VideoBios
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//getResolution(&x, &y, &bp); -> getMode
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vbios_resolution_type1 * map_type1_resolution(vbios_map * map, UInt16 res)
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{
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vbios_resolution_type1 * ptr = ((vbios_resolution_type1*)(map->bios_ptr + res));
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return ptr;
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}
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vbios_resolution_type2 * map_type2_resolution(vbios_map * map, UInt16 res)
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{
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vbios_resolution_type2 * ptr = ((vbios_resolution_type2*)(map->bios_ptr + res));
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return ptr;
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}
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vbios_resolution_type3 * map_type3_resolution(vbios_map * map, UInt16 res)
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{
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vbios_resolution_type3 * ptr = ((vbios_resolution_type3*)(map->bios_ptr + res));
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return ptr;
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}
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char detect_bios_type(vbios_map * map, char modeline, int entry_size)
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{
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UInt32 i;
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UInt16 r1, r2;
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r1 = r2 = 32000;
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for (i=0; i < map->mode_table_size; i++)
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{
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if (map->mode_table[i].resolution <= r1)
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{
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r1 = map->mode_table[i].resolution;
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}
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else
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{
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if (map->mode_table[i].resolution <= r2)
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{
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r2 = map->mode_table[i].resolution;
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}
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}
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/*printf("r1 = %d r2 = %d\n", r1, r2);*/
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}
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return (r2-r1-6) % entry_size == 0;
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}
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vbios_map * open_vbios(chipset_type forced_chipset)
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{
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UInt32 z;
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vbios_map * map = malloc(sizeof(vbios_map));
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for(z=0; z<sizeof(vbios_map); z++) ((char*)map)[z]=0;
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/*
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* Determine chipset
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*/
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if (forced_chipset == CT_UNKNOWN)
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{
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map->chipset_id = get_chipset_id();
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map->chipset = get_chipset(map->chipset_id);
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}
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else if (forced_chipset != CT_UNKNOWN)
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{
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map->chipset = forced_chipset;
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}
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if (map->chipset == CT_UNKNOWN)
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{
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//verbose("Unknown chipset type.\n");
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//verbose("915resolution only works with Intel 800/900 series graphic chipsets.\n");
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//verbose("Chipset Id: %x\n", map->chipset_id);
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close_vbios(map);
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return 0;
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}
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/*
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* Map the video bios to memory
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*/
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map->bios_ptr=(char*)VBIOS_START;
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/*
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* check if we have ATI Radeon
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*/
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map->ati_tables.base = map->bios_ptr;
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map->ati_tables.AtomRomHeader = (ATOM_ROM_HEADER *) (map->bios_ptr + *(unsigned short *) (map->bios_ptr + OFFSET_TO_POINTER_TO_ATOM_ROM_HEADER));
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if (strcmp ((char *) map->ati_tables.AtomRomHeader->uaFirmWareSignature, "ATOM") == 0)
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{
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// ATI Radeon Card
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map->bios = BT_ATI_1;
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map->ati_tables.MasterDataTables = (unsigned short *) &((ATOM_MASTER_DATA_TABLE *) (map->bios_ptr + map->ati_tables.AtomRomHeader->usMasterDataTableOffset))->ListOfDataTables;
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unsigned short std_vesa_offset = (unsigned short) ((ATOM_MASTER_LIST_OF_DATA_TABLES *)map->ati_tables.MasterDataTables)->StandardVESA_Timing;
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ATOM_STANDARD_VESA_TIMING * std_vesa = (ATOM_STANDARD_VESA_TIMING *) (map->bios_ptr + std_vesa_offset);
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map->ati_mode_table = (char *) &std_vesa->aModeTimings;
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if (map->ati_mode_table == 0)
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{
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printf("Unable to locate the mode table.\n");
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printf("Please run the program 'dump_bios' as root and\n");
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printf("email the file 'vbios.dmp' to stomljen@yahoo.com.\n");
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printf("Chipset: %d\n", map->chipset);
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close_vbios(map);
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return 0;
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}
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map->mode_table_size = std_vesa->sHeader.usStructureSize - sizeof(ATOM_COMMON_TABLE_HEADER);
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if (!detect_ati_bios_type(map)) map->bios = BT_ATI_2;
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}
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else {
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/*
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* check if we have NVIDIA
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*/
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int i = 0;
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while (i < 512) { // we don't need to look through the whole bios, just the first 512 bytes
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if (( map->bios_ptr[i] == 'N')
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&& (map->bios_ptr[i+1] == 'V')
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&& (map->bios_ptr[i+2] == 'I')
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&& (map->bios_ptr[i+3] == 'D'))
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{
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map->bios = BT_NVDA;
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unsigned short nv_data_table_offset = 0;
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unsigned short * nv_data_table;
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NV_VESA_TABLE * std_vesa;
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int i = 0;
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while (i < 0x300)
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{ //We don't need to look for the table in the whole bios, the 768 first bytes only
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if (( map->bios_ptr[i] == 0x44)
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&& (map->bios_ptr[i+1] == 0x01)
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&& (map->bios_ptr[i+2] == 0x04)
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&& (map->bios_ptr[i+3] == 0x00))
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{
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nv_data_table_offset = (unsigned short) (map->bios_ptr[i+4] | (map->bios_ptr[i+5] << 8));
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break;
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}
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i++;
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}
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nv_data_table = (unsigned short *) (map->bios_ptr + (nv_data_table_offset + OFFSET_TO_VESA_TABLE_INDEX));
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std_vesa = (NV_VESA_TABLE *) (map->bios_ptr + *nv_data_table);
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map->nv_mode_table = (char *) std_vesa->sModelines;
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if (map->nv_mode_table == 0)
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{
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printf("Unable to locate the mode table.\n");
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printf("Please run the program 'dump_bios' as root and\n");
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printf("email the file 'vbios.dmp' to stomljen@yahoo.com.\n");
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printf("Chipset: %s\n", map->chipset);
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close_vbios(map);
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return 0;
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}
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map->mode_table_size = std_vesa->sHeader.usTable_Size;
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break;
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}
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i++;
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}
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}
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/*
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* check if we have Intel
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*/
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/*if (map->chipset == CT_UNKNOWN && memmem(map->bios_ptr, VBIOS_SIZE, INTEL_SIGNATURE, strlen(INTEL_SIGNATURE))) {
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printf( "Intel chipset detected. However, 915resolution was unable to determine the chipset type.\n");
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printf("Chipset Id: %x\n", map->chipset_id);
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printf("Please report this problem to stomljen@yahoo.com\n");
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close_vbios(map);
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return 0;
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}*/
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/*
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* check for others
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*/
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/*
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* Figure out where the mode table is
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*/
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if ((map->bios != BT_ATI_1) && (map->bios != BT_NVDA))
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{
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char* p = map->bios_ptr + 16;
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char* limit = map->bios_ptr + VBIOS_SIZE - (3 * sizeof(vbios_mode));
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while (p < limit && map->mode_table == 0)
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{
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vbios_mode * mode_ptr = (vbios_mode *) p;
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if (((mode_ptr[0].mode & 0xf0) == 0x30) && ((mode_ptr[1].mode & 0xf0) == 0x30) &&
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((mode_ptr[2].mode & 0xf0) == 0x30) && ((mode_ptr[3].mode & 0xf0) == 0x30))
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{
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map->mode_table = mode_ptr;
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}
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p++;
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}
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if (map->mode_table == 0)
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{
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close_vbios(map);
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return 0;
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}
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}
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/*
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* Determine size of mode table
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*/
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if ((map->bios != BT_ATI_1) && (map->bios != BT_ATI_2) && (map->bios != BT_NVDA))
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{
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vbios_mode * mode_ptr = map->mode_table;
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while (mode_ptr->mode != 0xff)
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{
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map->mode_table_size++;
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mode_ptr++;
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}
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}
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/*
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* Figure out what type of bios we have
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* order of detection is important
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*/
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if ((map->bios != BT_ATI_1) && (map->bios != BT_ATI_2) && (map->bios != BT_NVDA))
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{
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if (detect_bios_type(map, TRUE, sizeof(vbios_modeline_type3)))
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{
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map->bios = BT_3;
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}
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else if (detect_bios_type(map, TRUE, sizeof(vbios_modeline_type2)))
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{
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map->bios = BT_2;
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}
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else if (detect_bios_type(map, FALSE, sizeof(vbios_resolution_type1)))
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{
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map->bios = BT_1;
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}
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else {
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return 0;
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}
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}
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return map;
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}
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void close_vbios(vbios_map * map)
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{
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free(map);
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}
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void unlock_vbios(vbios_map * map)
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{
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map->unlocked = TRUE;
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switch (map->chipset) {
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case CT_UNKNOWN:
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break;
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case CT_830:
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case CT_855GM:
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outl(CONFIG_MECH_ONE_ADDR, 0x8000005a);
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map->b1 = inb(CONFIG_MECH_ONE_DATA + 2);
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outl(CONFIG_MECH_ONE_ADDR, 0x8000005a);
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outb(CONFIG_MECH_ONE_DATA + 2, 0x33);
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break;
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case CT_845G:
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case CT_865G:
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case CT_915G:
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case CT_915GM:
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case CT_945G:
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case CT_945GM:
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case CT_945GME:
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case CT_946GZ:
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case CT_G965:
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case CT_Q965:
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case CT_965GM:
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case CT_975X:
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case CT_P35:
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case CT_955X:
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case CT_X48:
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case CT_B43:
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case CT_Q45:
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case CT_P45:
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case CT_GM45:
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case CT_G45:
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case CT_G41:
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case CT_G31:
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case CT_500:
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case CT_3150:
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case CT_UNKNOWN_INTEL: // Assume newer intel chipset is the same as before
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outl(CONFIG_MECH_ONE_ADDR, 0x80000090);
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map->b1 = inb(CONFIG_MECH_ONE_DATA + 1);
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map->b2 = inb(CONFIG_MECH_ONE_DATA + 2);
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outl(CONFIG_MECH_ONE_ADDR, 0x80000090);
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outb(CONFIG_MECH_ONE_DATA + 1, 0x33);
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outb(CONFIG_MECH_ONE_DATA + 2, 0x33);
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break;
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}
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#if DEBUG
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{
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UInt32 t = inl(CONFIG_MECH_ONE_DATA);
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verbose("unlock PAM: (0x%08x)\n", t);
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}
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#endif
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}
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void relock_vbios(vbios_map * map)
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{
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map->unlocked = FALSE;
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switch (map->chipset)
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{
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case CT_UNKNOWN:
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break;
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case CT_830:
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case CT_855GM:
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outl(CONFIG_MECH_ONE_ADDR, 0x8000005a);
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outb(CONFIG_MECH_ONE_DATA + 2, map->b1);
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break;
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case CT_845G:
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case CT_865G:
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case CT_915G:
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case CT_915GM:
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case CT_945G:
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case CT_945GM:
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case CT_945GME:
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case CT_946GZ:
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case CT_G965:
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case CT_955X:
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case CT_G45:
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case CT_Q965:
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case CT_965GM:
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case CT_975X:
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case CT_P35:
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case CT_X48:
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case CT_B43:
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case CT_Q45:
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case CT_P45:
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case CT_GM45:
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case CT_G41:
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case CT_G31:
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case CT_500:
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case CT_3150:
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case CT_UNKNOWN_INTEL:
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outl(CONFIG_MECH_ONE_ADDR, 0x80000090);
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outb(CONFIG_MECH_ONE_DATA + 1, map->b1);
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outb(CONFIG_MECH_ONE_DATA + 2, map->b2);
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break;
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}
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#if DEBUG
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{
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UInt32 t = inl(CONFIG_MECH_ONE_DATA);
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verbose("relock PAM: (0x%08x)\n", t);
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}
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#endif
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}
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static void gtf_timings(UInt32 x, UInt32 y, UInt32 freq,
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unsigned long *clock,
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UInt16 *hsyncstart, UInt16 *hsyncend, UInt16 *hblank,
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UInt16 *vsyncstart, UInt16 *vsyncend, UInt16 *vblank)
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{
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UInt32 hbl, vbl, vfreq;
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vbl = y + (y+1)/(20000.0/(11*freq) - 1) + 1.5;
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vfreq = vbl * freq;
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hbl = 16 * (int)(x * (30.0 - 300000.0 / vfreq) /
|
|
+ (70.0 + 300000.0 / vfreq) / 16.0 + 0.5);
|
|
|
|
*vsyncstart = y;
|
|
*vsyncend = y + 3;
|
|
*vblank = vbl - 1;
|
|
*hsyncstart = x + hbl / 2 - (x + hbl + 50) / 100 * 8 - 1;
|
|
*hsyncend = x + hbl / 2 - 1;
|
|
*hblank = x + hbl - 1;
|
|
*clock = (x + hbl) * vfreq / 1000;
|
|
}
|
|
|
|
void set_mode(vbios_map * map, /*UInt32 mode,*/ UInt32 x, UInt32 y, UInt32 bp, UInt32 htotal, UInt32 vtotal) {
|
|
UInt32 xprev, yprev;
|
|
UInt32 i = 0, j;
|
|
// patch first available mode
|
|
|
|
// for (i=0; i < map->mode_table_size; i++) {
|
|
// if (map->mode_table[0].mode == mode) {
|
|
switch(map->bios) {
|
|
case BT_INTEL:
|
|
return;
|
|
|
|
case BT_1:
|
|
{
|
|
vbios_resolution_type1 * res = map_type1_resolution(map, map->mode_table[i].resolution);
|
|
|
|
if (bp) {
|
|
map->mode_table[i].bits_per_pixel = bp;
|
|
}
|
|
|
|
res->x2 = (htotal?(((htotal-x) >> 8) & 0x0f) : (res->x2 & 0x0f)) | ((x >> 4) & 0xf0);
|
|
res->x1 = (x & 0xff);
|
|
|
|
res->y2 = (vtotal?(((vtotal-y) >> 8) & 0x0f) : (res->y2 & 0x0f)) | ((y >> 4) & 0xf0);
|
|
res->y1 = (y & 0xff);
|
|
if (htotal)
|
|
res->x_total = ((htotal-x) & 0xff);
|
|
|
|
if (vtotal)
|
|
res->y_total = ((vtotal-y) & 0xff);
|
|
|
|
break;
|
|
}
|
|
case BT_2:
|
|
{
|
|
vbios_resolution_type2 * res = map_type2_resolution(map, map->mode_table[i].resolution);
|
|
|
|
res->xchars = x / 8;
|
|
res->ychars = y / 16 - 1;
|
|
xprev = res->modelines[0].x1;
|
|
yprev = res->modelines[0].y1;
|
|
|
|
for(j=0; j < 3; j++) {
|
|
vbios_modeline_type2 * modeline = &res->modelines[j];
|
|
|
|
if (modeline->x1 == xprev && modeline->y1 == yprev) {
|
|
modeline->x1 = modeline->x2 = x-1;
|
|
modeline->y1 = modeline->y2 = y-1;
|
|
|
|
gtf_timings(x, y, freqs[j], &modeline->clock,
|
|
&modeline->hsyncstart, &modeline->hsyncend,
|
|
&modeline->hblank, &modeline->vsyncstart,
|
|
&modeline->vsyncend, &modeline->vblank);
|
|
|
|
if (htotal)
|
|
modeline->htotal = htotal;
|
|
else
|
|
modeline->htotal = modeline->hblank;
|
|
|
|
if (vtotal)
|
|
modeline->vtotal = vtotal;
|
|
else
|
|
modeline->vtotal = modeline->vblank;
|
|
}
|
|
}
|
|
break;
|
|
}
|
|
case BT_3:
|
|
{
|
|
vbios_resolution_type3 * res = map_type3_resolution(map, map->mode_table[i].resolution);
|
|
|
|
xprev = res->modelines[0].x1;
|
|
yprev = res->modelines[0].y1;
|
|
|
|
for (j=0; j < 3; j++) {
|
|
vbios_modeline_type3 * modeline = &res->modelines[j];
|
|
|
|
if (modeline->x1 == xprev && modeline->y1 == yprev) {
|
|
modeline->x1 = modeline->x2 = x-1;
|
|
modeline->y1 = modeline->y2 = y-1;
|
|
|
|
gtf_timings(x, y, freqs[j], &modeline->clock,
|
|
&modeline->hsyncstart, &modeline->hsyncend,
|
|
&modeline->hblank, &modeline->vsyncstart,
|
|
&modeline->vsyncend, &modeline->vblank);
|
|
if (htotal)
|
|
modeline->htotal = htotal;
|
|
else
|
|
modeline->htotal = modeline->hblank;
|
|
if (vtotal)
|
|
modeline->vtotal = vtotal;
|
|
else
|
|
modeline->vtotal = modeline->vblank;
|
|
|
|
modeline->timing_h = y-1;
|
|
modeline->timing_v = x-1;
|
|
}
|
|
}
|
|
break;
|
|
}
|
|
case BT_ATI_1:
|
|
{
|
|
edid_mode mode;
|
|
|
|
ATOM_MODE_TIMING *mode_timing = (ATOM_MODE_TIMING *) map->ati_mode_table;
|
|
|
|
//if (mode.pixel_clock && (mode.h_active == x) && (mode.v_active == y) && !force) {
|
|
if (!getMode(&mode)) {
|
|
mode_timing->usCRTC_H_Total = mode.h_active + mode.h_blanking;
|
|
mode_timing->usCRTC_H_Disp = mode.h_active;
|
|
mode_timing->usCRTC_H_SyncStart = mode.h_active + mode.h_sync_offset;
|
|
mode_timing->usCRTC_H_SyncWidth = mode.h_sync_width;
|
|
|
|
mode_timing->usCRTC_V_Total = mode.v_active + mode.v_blanking;
|
|
mode_timing->usCRTC_V_Disp = mode.v_active;
|
|
mode_timing->usCRTC_V_SyncStart = mode.v_active + mode.v_sync_offset;
|
|
mode_timing->usCRTC_V_SyncWidth = mode.v_sync_width;
|
|
|
|
mode_timing->usPixelClock = mode.pixel_clock;
|
|
}
|
|
break;
|
|
}
|
|
case BT_ATI_2:
|
|
{
|
|
edid_mode mode;
|
|
|
|
ATOM_DTD_FORMAT *mode_timing = (ATOM_DTD_FORMAT *) map->ati_mode_table;
|
|
|
|
/*if (mode.pixel_clock && (mode.h_active == x) && (mode.v_active == y) && !force) {*/
|
|
if (!getMode(&mode)) {
|
|
mode_timing->usHBlanking_Time = mode.h_blanking;
|
|
mode_timing->usHActive = mode.h_active;
|
|
mode_timing->usHSyncOffset = mode.h_sync_offset;
|
|
mode_timing->usHSyncWidth = mode.h_sync_width;
|
|
|
|
mode_timing->usVBlanking_Time = mode.v_blanking;
|
|
mode_timing->usVActive = mode.v_active;
|
|
mode_timing->usVSyncOffset = mode.v_sync_offset;
|
|
mode_timing->usVSyncWidth = mode.v_sync_width;
|
|
|
|
mode_timing->usPixClk = mode.pixel_clock;
|
|
}
|
|
break;
|
|
}
|
|
case BT_NVDA:
|
|
{
|
|
edid_mode mode;
|
|
|
|
NV_MODELINE *mode_timing = (NV_MODELINE *) map->nv_mode_table;
|
|
|
|
/*if (mode.pixel_clock && (mode.h_active == x) && (mode.v_active == y) && !force) {*/
|
|
if (!getMode(&mode)) {
|
|
mode_timing[i].usH_Total = mode.h_active + mode.h_blanking;
|
|
mode_timing[i].usH_Active = mode.h_active;
|
|
mode_timing[i].usH_SyncStart = mode.h_active + mode.h_sync_offset;
|
|
mode_timing[i].usH_SyncEnd = mode.h_active + mode.h_sync_offset + mode.h_sync_width;
|
|
|
|
mode_timing[i].usV_Total = mode.v_active + mode.v_blanking;
|
|
mode_timing[i].usV_Active = mode.v_active;
|
|
mode_timing[i].usV_SyncStart = mode.v_active + mode.v_sync_offset;
|
|
mode_timing[i].usV_SyncEnd = mode.v_active + mode.v_sync_offset + mode.v_sync_width;
|
|
|
|
mode_timing[i].usPixel_Clock = mode.pixel_clock;
|
|
}
|
|
break;
|
|
}
|
|
case BT_UNKNOWN:
|
|
{
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
VOID patchVideoBios()
|
|
{
|
|
UINT32 x = 0, y = 0, bp = 32;
|
|
vbios_map * map;
|
|
|
|
//here we want to get LCD screen resolution that is disabled by VideoBios
|
|
getResolution(&x, &y, &bp);
|
|
|
|
if (x != 0 &&
|
|
y != 0 &&
|
|
bp != 0)
|
|
{
|
|
|
|
|
|
map = open_vbios(CT_UNKNOWN);
|
|
if(map)
|
|
{
|
|
unlock_vbios(map);
|
|
|
|
set_mode(map, x, y, bp, 0, 0);
|
|
|
|
relock_vbios(map);
|
|
|
|
close_vbios(map);
|
|
}
|
|
}
|
|
}
|
|
|