mirror of
https://github.com/CloverHackyColor/CloverBootloader.git
synced 2024-12-21 15:57:42 +01:00
d7c710f9e3
Signed-off-by: SergeySlice <sergey.slice@gmail.com>
652 lines
17 KiB
C
652 lines
17 KiB
C
/** @file
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This file contains URB request, each request is warpped in a
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URB (Usb Request Block).
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Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include "Ehci.h"
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/**
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Create a single QTD to hold the data.
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@param Ehc The EHCI device.
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@param Data The cpu memory address of current data not associated with a QTD.
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@param DataPhy The pci bus address of current data not associated with a QTD.
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@param DataLen The length of the data.
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@param PktId Packet ID to use in the QTD.
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@param Toggle Data toggle to use in the QTD.
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@param MaxPacket Maximu packet length of the endpoint.
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@return Created QTD or NULL if failed to create one.
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**/
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EHC_QTD *
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EhcCreateQtd (
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IN USB2_HC_DEV *Ehc,
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IN UINT8 *Data,
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IN UINT8 *DataPhy,
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IN UINTN DataLen,
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IN UINT8 PktId,
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IN UINT8 Toggle,
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IN UINTN MaxPacket
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)
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{
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EHC_QTD *Qtd;
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QTD_HW *QtdHw;
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UINTN Index;
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UINTN Len;
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UINTN ThisBufLen;
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ASSERT (Ehc != NULL);
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Qtd = UsbHcAllocateMem (Ehc->MemPool, sizeof (EHC_QTD));
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if (Qtd == NULL) {
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return NULL;
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}
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Qtd->Signature = EHC_QTD_SIG;
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Qtd->Data = Data;
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Qtd->DataLen = 0;
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InitializeListHead (&Qtd->QtdList);
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QtdHw = &Qtd->QtdHw;
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QtdHw->NextQtd = QTD_LINK (NULL, TRUE);
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QtdHw->AltNext = QTD_LINK (NULL, TRUE);
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QtdHw->Status = QTD_STAT_ACTIVE;
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QtdHw->Pid = PktId;
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QtdHw->ErrCnt = QTD_MAX_ERR;
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QtdHw->Ioc = 0;
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QtdHw->TotalBytes = 0;
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QtdHw->DataToggle = Toggle;
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//
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// Fill in the buffer points
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//
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if (Data != NULL) {
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Len = 0;
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for (Index = 0; Index <= QTD_MAX_BUFFER; Index++) {
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//
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// Set the buffer point (Check page 41 EHCI Spec 1.0). No need to
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// compute the offset and clear Reserved fields. This is already
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// done in the data point.
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//
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QtdHw->Page[Index] = EHC_LOW_32BIT (DataPhy);
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QtdHw->PageHigh[Index] = EHC_HIGH_32BIT (DataPhy);
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ThisBufLen = QTD_BUF_LEN - (EHC_LOW_32BIT (DataPhy) & QTD_BUF_MASK);
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if (Len + ThisBufLen >= DataLen) {
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Len = DataLen;
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break;
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}
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Len += ThisBufLen;
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Data += ThisBufLen;
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DataPhy += ThisBufLen;
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}
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//
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// Need to fix the last pointer if the Qtd can't hold all the
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// user's data to make sure that the length is in the unit of
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// max packets. If it can hold all the data, there is no such
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// need.
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//
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if (Len < DataLen) {
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Len = Len - Len % MaxPacket;
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}
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QtdHw->TotalBytes = (UINT32) Len;
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Qtd->DataLen = Len;
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}
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return Qtd;
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}
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/**
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Initialize the queue head for interrupt transfer,
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that is, initialize the following three fields:
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1. SplitXState in the Status field
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2. Microframe S-mask
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3. Microframe C-mask
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@param Ep The queue head's related endpoint.
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@param QhHw The queue head to initialize.
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**/
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VOID
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EhcInitIntQh (
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IN USB_ENDPOINT *Ep,
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IN QH_HW *QhHw
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)
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{
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//
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// Because UEFI interface can't utilitize an endpoint with
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// poll rate faster than 1ms, only need to set one bit in
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// the queue head. simple. But it may be changed later. If
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// sub-1ms interrupt is supported, need to update the S-Mask
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// here
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//
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if (Ep->DevSpeed == EFI_USB_SPEED_HIGH) {
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QhHw->SMask = QH_MICROFRAME_0;
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return ;
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}
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//
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// For low/full speed device, the transfer must go through
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// the split transaction. Need to update three fields
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// 1. SplitXState in the status
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// 2. Microframe S-Mask
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// 3. Microframe C-Mask
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// UEFI USB doesn't exercise admission control. It simplely
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// schedule the high speed transactions in microframe 0, and
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// full/low speed transactions at microframe 1. This also
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// avoid the use of FSTN.
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//
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QhHw->SMask = QH_MICROFRAME_1;
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QhHw->CMask = QH_MICROFRAME_3 | QH_MICROFRAME_4 | QH_MICROFRAME_5;
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}
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/**
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Allocate and initialize a EHCI queue head.
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@param Ehci The EHCI device.
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@param Ep The endpoint to create queue head for.
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@return Created queue head or NULL if failed to create one.
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**/
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EHC_QH *
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EhcCreateQh (
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IN USB2_HC_DEV *Ehci,
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IN USB_ENDPOINT *Ep
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)
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{
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EHC_QH *Qh;
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QH_HW *QhHw;
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Qh = UsbHcAllocateMem (Ehci->MemPool, sizeof (EHC_QH));
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if (Qh == NULL) {
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return NULL;
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}
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Qh->Signature = EHC_QH_SIG;
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Qh->NextQh = NULL;
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Qh->Interval = Ep->PollRate;
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InitializeListHead (&Qh->Qtds);
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QhHw = &Qh->QhHw;
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QhHw->HorizonLink = QH_LINK (NULL, 0, TRUE);
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QhHw->DeviceAddr = Ep->DevAddr;
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QhHw->Inactive = 0;
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QhHw->EpNum = Ep->EpAddr;
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QhHw->EpSpeed = Ep->DevSpeed;
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QhHw->DtCtrl = 0;
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QhHw->ReclaimHead = 0;
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QhHw->MaxPacketLen = (UINT32) Ep->MaxPacket;
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QhHw->CtrlEp = 0;
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QhHw->NakReload = QH_NAK_RELOAD;
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QhHw->HubAddr = Ep->HubAddr;
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QhHw->PortNum = Ep->HubPort;
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QhHw->Multiplier = 1;
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QhHw->DataToggle = Ep->Toggle;
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if (Ep->DevSpeed != EFI_USB_SPEED_HIGH) {
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QhHw->Status |= QTD_STAT_DO_SS;
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}
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switch (Ep->Type) {
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case EHC_CTRL_TRANSFER:
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//
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// Special initialization for the control transfer:
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// 1. Control transfer initialize data toggle from each QTD
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// 2. Set the Control Endpoint Flag (C) for low/full speed endpoint.
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//
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QhHw->DtCtrl = 1;
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if (Ep->DevSpeed != EFI_USB_SPEED_HIGH) {
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QhHw->CtrlEp = 1;
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}
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break;
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case EHC_INT_TRANSFER_ASYNC:
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case EHC_INT_TRANSFER_SYNC:
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//
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// Special initialization for the interrupt transfer
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// to set the S-Mask and C-Mask
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//
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QhHw->NakReload = 0;
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EhcInitIntQh (Ep, QhHw);
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break;
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case EHC_BULK_TRANSFER:
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if ((Ep->DevSpeed == EFI_USB_SPEED_HIGH) && (Ep->Direction == EfiUsbDataOut)) {
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QhHw->Status |= QTD_STAT_DO_PING;
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}
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break;
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}
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return Qh;
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}
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/**
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Convert the poll interval from application to that
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be used by EHCI interface data structure. Only need
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to get the max 2^n that is less than interval. UEFI
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can't support high speed endpoint with a interval less
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than 8 microframe because interval is specified in
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the unit of ms (millisecond).
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@param Interval The interval to convert.
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@return The converted interval.
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**/
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UINTN
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EhcConvertPollRate (
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IN UINTN Interval
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)
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{
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UINTN BitCount;
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if (Interval == 0) {
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return 1;
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}
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//
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// Find the index (1 based) of the highest non-zero bit
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//
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BitCount = 0;
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while (Interval != 0) {
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Interval >>= 1;
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BitCount++;
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}
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return (UINTN)1 << (BitCount - 1);
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}
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/**
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Free a list of QTDs.
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@param Ehc The EHCI device.
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@param Qtds The list head of the QTD.
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**/
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VOID
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EhcFreeQtds (
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IN USB2_HC_DEV *Ehc,
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IN LIST_ENTRY *Qtds
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)
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{
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LIST_ENTRY *Entry;
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LIST_ENTRY *Next;
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EHC_QTD *Qtd;
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EFI_LIST_FOR_EACH_SAFE (Entry, Next, Qtds) {
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Qtd = EFI_LIST_CONTAINER (Entry, EHC_QTD, QtdList);
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RemoveEntryList (&Qtd->QtdList);
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UsbHcFreeMem (Ehc->MemPool, Qtd, sizeof (EHC_QTD));
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}
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}
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/**
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Free an allocated URB. It is possible for it to be partially inited.
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@param Ehc The EHCI device.
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@param Urb The URB to free.
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**/
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VOID
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EhcFreeUrb (
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IN USB2_HC_DEV *Ehc,
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IN URB *Urb
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)
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{
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EFI_PCI_IO_PROTOCOL *PciIo;
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PciIo = Ehc->PciIo;
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if (Urb->RequestPhy != NULL) {
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PciIo->Unmap (PciIo, Urb->RequestMap);
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}
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if (Urb->DataMap != NULL) {
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PciIo->Unmap (PciIo, Urb->DataMap);
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}
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if (Urb->Qh != NULL) {
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//
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// Ensure that this queue head has been unlinked from the
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// schedule data structures. Free all the associated QTDs
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//
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EhcFreeQtds (Ehc, &Urb->Qh->Qtds);
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UsbHcFreeMem (Ehc->MemPool, Urb->Qh, sizeof (EHC_QH));
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}
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gBS->FreePool(Urb);
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}
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/**
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Create a list of QTDs for the URB.
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@param Ehc The EHCI device.
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@param Urb The URB to create QTDs for.
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@retval EFI_OUT_OF_RESOURCES Failed to allocate resource for QTD.
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@retval EFI_SUCCESS The QTDs are allocated for the URB.
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**/
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EFI_STATUS
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EhcCreateQtds (
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IN USB2_HC_DEV *Ehc,
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IN URB *Urb
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)
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{
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USB_ENDPOINT *Ep;
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EHC_QH *Qh;
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EHC_QTD *Qtd;
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EHC_QTD *StatusQtd;
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EHC_QTD *NextQtd;
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LIST_ENTRY *Entry;
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UINT32 AlterNext;
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UINT8 Toggle;
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UINTN Len;
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UINT8 Pid;
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EFI_PHYSICAL_ADDRESS PhyAddr;
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ASSERT ((Urb != NULL) && (Urb->Qh != NULL));
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//
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// EHCI follows the alternet next QTD pointer if it meets
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// a short read and the AlterNext pointer is valid. UEFI
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// EHCI driver should terminate the transfer except the
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// control transfer.
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//
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Toggle = 0;
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Qh = Urb->Qh;
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Ep = &Urb->Ep;
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StatusQtd = NULL;
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AlterNext = QTD_LINK (NULL, TRUE);
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PhyAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, Ehc->ShortReadStop, sizeof (EHC_QTD));
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if (Ep->Direction == EfiUsbDataIn) {
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AlterNext = QTD_LINK (PhyAddr, FALSE);
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}
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//
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// Build the Setup and status packets for control transfer
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//
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if (Urb->Ep.Type == EHC_CTRL_TRANSFER) {
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Len = sizeof (EFI_USB_DEVICE_REQUEST);
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Qtd = EhcCreateQtd (Ehc, (UINT8 *)Urb->Request, (UINT8 *)Urb->RequestPhy, Len, QTD_PID_SETUP, 0, Ep->MaxPacket);
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if (Qtd == NULL) {
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return EFI_OUT_OF_RESOURCES;
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}
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InsertTailList (&Qh->Qtds, &Qtd->QtdList);
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//
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// Create the status packet now. Set the AlterNext to it. So, when
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// EHCI meets a short control read, it can resume at the status stage.
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// Use the opposite direction of the data stage, or IN if there is
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// no data stage.
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//
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if (Ep->Direction == EfiUsbDataIn) {
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Pid = QTD_PID_OUTPUT;
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} else {
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Pid = QTD_PID_INPUT;
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}
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StatusQtd = EhcCreateQtd (Ehc, NULL, NULL, 0, Pid, 1, Ep->MaxPacket);
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if (StatusQtd == NULL) {
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goto ON_ERROR;
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}
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if (Ep->Direction == EfiUsbDataIn) {
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PhyAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, StatusQtd, sizeof (EHC_QTD));
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AlterNext = QTD_LINK (PhyAddr, FALSE);
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}
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Toggle = 1;
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}
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//
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// Build the data packets for all the transfers
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//
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if (Ep->Direction == EfiUsbDataIn) {
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Pid = QTD_PID_INPUT;
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} else {
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Pid = QTD_PID_OUTPUT;
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}
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Qtd = NULL;
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Len = 0;
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while (Len < Urb->DataLen) {
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Qtd = EhcCreateQtd (
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Ehc,
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(UINT8 *) Urb->Data + Len,
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(UINT8 *) Urb->DataPhy + Len,
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Urb->DataLen - Len,
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Pid,
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Toggle,
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Ep->MaxPacket
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);
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if (Qtd == NULL) {
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goto ON_ERROR;
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}
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Qtd->QtdHw.AltNext = AlterNext;
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InsertTailList (&Qh->Qtds, &Qtd->QtdList);
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//
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// Switch the Toggle bit if odd number of packets are included in the QTD.
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//
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if (((Qtd->DataLen + Ep->MaxPacket - 1) / Ep->MaxPacket) % 2) {
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Toggle = (UINT8) (1 - Toggle);
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}
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Len += Qtd->DataLen;
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}
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//
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// Insert the status packet for control transfer
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//
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if (Ep->Type == EHC_CTRL_TRANSFER) {
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InsertTailList (&Qh->Qtds, &StatusQtd->QtdList);
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}
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//
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// OK, all the QTDs needed are created. Now, fix the NextQtd point
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//
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EFI_LIST_FOR_EACH (Entry, &Qh->Qtds) {
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Qtd = EFI_LIST_CONTAINER (Entry, EHC_QTD, QtdList);
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//
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// break if it is the last entry on the list
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//
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if (Entry->ForwardLink == &Qh->Qtds) {
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break;
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}
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NextQtd = EFI_LIST_CONTAINER (Entry->ForwardLink, EHC_QTD, QtdList);
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PhyAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, NextQtd, sizeof (EHC_QTD));
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Qtd->QtdHw.NextQtd = QTD_LINK (PhyAddr, FALSE);
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}
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//
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// Link the QTDs to the queue head
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//
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NextQtd = EFI_LIST_CONTAINER (Qh->Qtds.ForwardLink, EHC_QTD, QtdList);
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PhyAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, NextQtd, sizeof (EHC_QTD));
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Qh->QhHw.NextQtd = QTD_LINK (PhyAddr, FALSE);
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return EFI_SUCCESS;
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ON_ERROR:
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EhcFreeQtds (Ehc, &Qh->Qtds);
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return EFI_OUT_OF_RESOURCES;
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}
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/**
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Create a new URB and its associated QTD.
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@param Ehc The EHCI device.
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@param DevAddr The device address.
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@param EpAddr Endpoint addrress & its direction.
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@param DevSpeed The device speed.
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@param Toggle Initial data toggle to use.
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@param MaxPacket The max packet length of the endpoint.
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@param Hub The transaction translator to use.
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@param Type The transaction type.
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@param Request The standard USB request for control transfer.
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@param Data The user data to transfer.
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@param DataLen The length of data buffer.
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@param Callback The function to call when data is transferred.
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@param Context The context to the callback.
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@param Interval The interval for interrupt transfer.
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@return Created URB or NULL.
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**/
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URB *
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EhcCreateUrb (
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IN USB2_HC_DEV *Ehc,
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IN UINT8 DevAddr,
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IN UINT8 EpAddr,
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IN UINT8 DevSpeed,
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IN UINT8 Toggle,
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IN UINTN MaxPacket,
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IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Hub,
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IN UINTN Type,
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IN EFI_USB_DEVICE_REQUEST *Request,
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IN VOID *Data,
|
|
IN UINTN DataLen,
|
|
IN EFI_ASYNC_USB_TRANSFER_CALLBACK Callback,
|
|
IN VOID *Context,
|
|
IN UINTN Interval
|
|
)
|
|
{
|
|
USB_ENDPOINT *Ep;
|
|
EFI_PHYSICAL_ADDRESS PhyAddr;
|
|
EFI_PCI_IO_PROTOCOL_OPERATION MapOp;
|
|
EFI_PCI_IO_PROTOCOL *PciIo;
|
|
EFI_STATUS Status;
|
|
UINTN Len;
|
|
URB *Urb;
|
|
VOID *Map;
|
|
|
|
Urb = AllocateZeroPool(sizeof (URB));
|
|
|
|
if (Urb == NULL) {
|
|
return NULL;
|
|
}
|
|
|
|
Urb->Signature = EHC_URB_SIG;
|
|
InitializeListHead (&Urb->UrbList);
|
|
|
|
Ep = &Urb->Ep;
|
|
Ep->DevAddr = DevAddr;
|
|
Ep->EpAddr = (UINT8) (EpAddr & 0x0F);
|
|
Ep->Direction = (((EpAddr & 0x80) != 0) ? EfiUsbDataIn : EfiUsbDataOut);
|
|
Ep->DevSpeed = DevSpeed;
|
|
Ep->MaxPacket = MaxPacket;
|
|
|
|
Ep->HubAddr = 0;
|
|
Ep->HubPort = 0;
|
|
|
|
if (DevSpeed != EFI_USB_SPEED_HIGH) {
|
|
ASSERT (Hub != NULL);
|
|
|
|
Ep->HubAddr = Hub->TranslatorHubAddress;
|
|
Ep->HubPort = Hub->TranslatorPortNumber;
|
|
}
|
|
|
|
Ep->Toggle = Toggle;
|
|
Ep->Type = Type;
|
|
Ep->PollRate = EhcConvertPollRate (Interval);
|
|
|
|
Urb->Request = Request;
|
|
Urb->Data = Data;
|
|
Urb->DataLen = DataLen;
|
|
Urb->Callback = Callback;
|
|
Urb->Context = Context;
|
|
|
|
PciIo = Ehc->PciIo;
|
|
Urb->Qh = EhcCreateQh (Ehc, &Urb->Ep);
|
|
|
|
if (Urb->Qh == NULL) {
|
|
goto ON_ERROR;
|
|
}
|
|
|
|
//
|
|
// Map the request and user data
|
|
//
|
|
if (Request != NULL) {
|
|
Len = sizeof (EFI_USB_DEVICE_REQUEST);
|
|
MapOp = EfiPciIoOperationBusMasterRead;
|
|
Status = PciIo->Map (PciIo, MapOp, Request, &Len, &PhyAddr, &Map);
|
|
|
|
if (EFI_ERROR(Status) || (Len != sizeof (EFI_USB_DEVICE_REQUEST))) {
|
|
goto ON_ERROR;
|
|
}
|
|
|
|
Urb->RequestPhy = (VOID *) ((UINTN) PhyAddr);
|
|
Urb->RequestMap = Map;
|
|
}
|
|
|
|
if (Data != NULL) {
|
|
Len = DataLen;
|
|
|
|
if (Ep->Direction == EfiUsbDataIn) {
|
|
MapOp = EfiPciIoOperationBusMasterWrite;
|
|
} else {
|
|
MapOp = EfiPciIoOperationBusMasterRead;
|
|
}
|
|
|
|
Status = PciIo->Map (PciIo, MapOp, Data, &Len, &PhyAddr, &Map);
|
|
|
|
if (EFI_ERROR(Status) || (Len != DataLen)) {
|
|
goto ON_ERROR;
|
|
}
|
|
|
|
Urb->DataPhy = (VOID *) ((UINTN) PhyAddr);
|
|
Urb->DataMap = Map;
|
|
}
|
|
|
|
Status = EhcCreateQtds (Ehc, Urb);
|
|
|
|
if (EFI_ERROR(Status)) {
|
|
goto ON_ERROR;
|
|
}
|
|
|
|
return Urb;
|
|
|
|
ON_ERROR:
|
|
EhcFreeUrb (Ehc, Urb);
|
|
return NULL;
|
|
}
|