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52 lines
1.5 KiB
C
52 lines
1.5 KiB
C
/** @file
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Include file of PciSegmentPciRootBridgeIo Library.
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Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef __DXE_PCI_SEGMENT_LIB__
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#define __DXE_PCI_SEGMENT_LIB__
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#include <Protocol/PciRootBridgeIo.h>
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#include <Library/PciSegmentLib.h>
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#include <Library/BaseLib.h>
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#include <Library/MemoryAllocationLib.h>
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#include <Library/UefiBootServicesTableLib.h>
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#include <Library/DebugLib.h>
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#include <IndustryStandard/Acpi.h>
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typedef struct {
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EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
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UINT32 SegmentNumber;
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UINT64 MinBusNumber;
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UINT64 MaxBusNumber;
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} PCI_ROOT_BRIDGE_DATA;
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/**
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Assert the validity of a PCI Segment address.
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A valid PCI Segment address should not contain 1's in bits 28..31 and 48..63
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@param A The address to validate.
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@param M Additional bits to assert to be zero.
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**/
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#define ASSERT_INVALID_PCI_SEGMENT_ADDRESS(A,M) \
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ASSERT (((A) & (0xffff0000f0000000ULL | (M))) == 0)
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/**
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Translate PCI Lib address into format of PCI Root Bridge I/O Protocol
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@param A The address that encodes the PCI Bus, Device, Function and
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Register.
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**/
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#define PCI_TO_PCI_ROOT_BRIDGE_IO_ADDRESS(A) \
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((((UINT32)(A) << 4) & 0xff000000) | (((UINT32)(A) >> 4) & 0x00000700) | (((UINT32)(A) << 1) & 0x001f0000) | (LShiftU64((A) & 0xfff, 32)))
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#endif
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