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73 lines
2.0 KiB
NASM
73 lines
2.0 KiB
NASM
;------------------------------------------------------------------------------
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; @file
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; Emits Page Tables for 1:1 mapping of the addresses 0 - 0x100000000 (4GB)
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;
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; Copyright (c) 2008 - 2014, Intel Corporation. All rights reserved.<BR>
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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;
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;------------------------------------------------------------------------------
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BITS 64
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%define ALIGN_TOP_TO_4K_FOR_PAGING
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%define PAGE_PRESENT 0x01
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%define PAGE_READ_WRITE 0x02
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%define PAGE_USER_SUPERVISOR 0x04
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%define PAGE_WRITE_THROUGH 0x08
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%define PAGE_CACHE_DISABLE 0x010
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%define PAGE_ACCESSED 0x020
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%define PAGE_DIRTY 0x040
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%define PAGE_PAT 0x080
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%define PAGE_GLOBAL 0x0100
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%define PAGE_2M_MBO 0x080
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%define PAGE_2M_PAT 0x01000
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%define PAGE_2M_PDE_ATTR (PAGE_2M_MBO + \
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PAGE_ACCESSED + \
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PAGE_DIRTY + \
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PAGE_READ_WRITE + \
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PAGE_PRESENT)
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%define PAGE_PDP_ATTR (PAGE_ACCESSED + \
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PAGE_READ_WRITE + \
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PAGE_PRESENT)
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%define PGTBLS_OFFSET(x) ((x) - TopLevelPageDirectory)
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%define PGTBLS_ADDR(x) (ADDR_OF(TopLevelPageDirectory) + (x))
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%define PDP(offset) (ADDR_OF(TopLevelPageDirectory) + (offset) + \
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PAGE_PDP_ATTR)
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%define PTE_2MB(x) ((x << 21) + PAGE_2M_PDE_ATTR)
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TopLevelPageDirectory:
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;
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; Top level Page Directory Pointers (1 * 512GB entry)
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;
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DQ PDP(0x1000)
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;
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; Next level Page Directory Pointers (4 * 1GB entries => 4GB)
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;
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TIMES 0x1000-PGTBLS_OFFSET($) DB 0
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DQ PDP(0x2000)
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DQ PDP(0x3000)
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DQ PDP(0x4000)
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DQ PDP(0x5000)
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;
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; Page Table Entries (2048 * 2MB entries => 4GB)
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;
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TIMES 0x2000-PGTBLS_OFFSET($) DB 0
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%assign i 0
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%rep 0x800
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DQ PTE_2MB(i)
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%assign i i+1
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%endrep
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EndOfPageTables:
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