mirror of
https://github.com/CloverHackyColor/CloverBootloader.git
synced 2024-11-27 12:15:19 +01:00
7c0aa811ec
Signed-off-by: Sergey Isakov <isakov-sl@bk.ru>
540 lines
16 KiB
C
540 lines
16 KiB
C
/** @file
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ACPI 2.0 definitions from the ACPI Specification, revision 2.0
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Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef _ACPI_2_0_H_
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#define _ACPI_2_0_H_
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#include <IndustryStandard/Acpi10.h>
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//
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// Define for Desriptor
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//
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#define ACPI_LARGE_GENERIC_REGISTER_DESCRIPTOR_NAME 0x02
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#define ACPI_GENERIC_REGISTER_DESCRIPTOR 0x82
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//
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// Ensure proper structure formats
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//
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#pragma pack(1)
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///
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/// Generic Register Descriptor
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///
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typedef PACKED struct {
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ACPI_LARGE_RESOURCE_HEADER Header;
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UINT8 AddressSpaceId;
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UINT8 RegisterBitWidth;
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UINT8 RegisterBitOffset;
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UINT8 AddressSize;
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UINT64 RegisterAddress;
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} EFI_ACPI_GENERIC_REGISTER_DESCRIPTOR;
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#pragma pack()
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//
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// Ensure proper structure formats
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//
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#pragma pack(1)
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///
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/// ACPI 2.0 Generic Address Space definition
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///
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typedef struct {
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UINT8 AddressSpaceId;
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UINT8 RegisterBitWidth;
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UINT8 RegisterBitOffset;
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UINT8 Reserved;
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UINT64 Address;
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} EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE;
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//
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// Generic Address Space Address IDs
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//
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#define EFI_ACPI_2_0_SYSTEM_MEMORY 0
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#define EFI_ACPI_2_0_SYSTEM_IO 1
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#define EFI_ACPI_2_0_PCI_CONFIGURATION_SPACE 2
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#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER 3
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#define EFI_ACPI_2_0_SMBUS 4
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#define EFI_ACPI_2_0_FUNCTIONAL_FIXED_HARDWARE 0x7F
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//
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// ACPI 2.0 table structures
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//
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///
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/// Root System Description Pointer Structure
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///
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typedef struct {
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UINT64 Signature;
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UINT8 Checksum;
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UINT8 OemId[6];
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UINT8 Revision;
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UINT32 RsdtAddress;
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UINT32 Length;
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UINT64 XsdtAddress;
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UINT8 ExtendedChecksum;
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UINT8 Reserved[3];
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} EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER;
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///
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/// RSD_PTR Revision (as defined in ACPI 2.0 spec.)
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///
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#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02
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///
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/// Common table header, this prefaces all ACPI tables, including FACS, but
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/// excluding the RSD PTR structure
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///
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typedef struct {
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UINT32 Signature;
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UINT32 Length;
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} EFI_ACPI_2_0_COMMON_HEADER;
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//
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// Root System Description Table
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// No definition needed as it is a common description table header, the same with
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// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.
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//
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///
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/// RSDT Revision (as defined in ACPI 2.0 spec.)
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///
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#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
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//
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// Extended System Description Table
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// No definition needed as it is a common description table header, the same with
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// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.
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//
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///
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/// XSDT Revision (as defined in ACPI 2.0 spec.)
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///
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#define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
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///
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/// Fixed ACPI Description Table Structure (FADT)
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///
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typedef struct {
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EFI_ACPI_DESCRIPTION_HEADER Header;
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UINT32 FirmwareCtrl;
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UINT32 Dsdt;
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UINT8 Reserved0;
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UINT8 PreferredPmProfile;
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UINT16 SciInt;
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UINT32 SmiCmd;
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UINT8 AcpiEnable;
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UINT8 AcpiDisable;
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UINT8 S4BiosReq;
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UINT8 PstateCnt;
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UINT32 Pm1aEvtBlk;
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UINT32 Pm1bEvtBlk;
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UINT32 Pm1aCntBlk;
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UINT32 Pm1bCntBlk;
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UINT32 Pm2CntBlk;
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UINT32 PmTmrBlk;
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UINT32 Gpe0Blk;
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UINT32 Gpe1Blk;
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UINT8 Pm1EvtLen;
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UINT8 Pm1CntLen;
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UINT8 Pm2CntLen;
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UINT8 PmTmrLen;
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UINT8 Gpe0BlkLen;
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UINT8 Gpe1BlkLen;
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UINT8 Gpe1Base;
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UINT8 CstCnt;
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UINT16 PLvl2Lat;
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UINT16 PLvl3Lat;
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UINT16 FlushSize;
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UINT16 FlushStride;
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UINT8 DutyOffset;
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UINT8 DutyWidth;
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UINT8 DayAlrm;
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UINT8 MonAlrm;
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UINT8 Century;
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UINT16 IaPcBootArch;
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UINT8 Reserved1;
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UINT32 Flags;
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EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE ResetReg;
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UINT8 ResetValue;
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UINT8 Reserved2[3];
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UINT64 XFirmwareCtrl;
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UINT64 XDsdt;
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EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
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EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
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EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
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EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
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EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
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EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
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EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
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EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
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} EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE;
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///
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/// FADT Version (as defined in ACPI 2.0 spec.)
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///
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#define EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x03
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//
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// Fixed ACPI Description Table Preferred Power Management Profile
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//
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#define EFI_ACPI_2_0_PM_PROFILE_UNSPECIFIED 0
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#define EFI_ACPI_2_0_PM_PROFILE_DESKTOP 1
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#define EFI_ACPI_2_0_PM_PROFILE_MOBILE 2
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#define EFI_ACPI_2_0_PM_PROFILE_WORKSTATION 3
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#define EFI_ACPI_2_0_PM_PROFILE_ENTERPRISE_SERVER 4
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#define EFI_ACPI_2_0_PM_PROFILE_SOHO_SERVER 5
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#define EFI_ACPI_2_0_PM_PROFILE_APPLIANCE_PC 6
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//
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// Fixed ACPI Description Table Boot Architecture Flags
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// All other bits are reserved and must be set to 0.
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//
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#define EFI_ACPI_2_0_LEGACY_DEVICES BIT0
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#define EFI_ACPI_2_0_8042 BIT1
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//
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// Fixed ACPI Description Table Fixed Feature Flags
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// All other bits are reserved and must be set to 0.
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//
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#define EFI_ACPI_2_0_WBINVD BIT0
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#define EFI_ACPI_2_0_WBINVD_FLUSH BIT1
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#define EFI_ACPI_2_0_PROC_C1 BIT2
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#define EFI_ACPI_2_0_P_LVL2_UP BIT3
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#define EFI_ACPI_2_0_PWR_BUTTON BIT4
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#define EFI_ACPI_2_0_SLP_BUTTON BIT5
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#define EFI_ACPI_2_0_FIX_RTC BIT6
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#define EFI_ACPI_2_0_RTC_S4 BIT7
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#define EFI_ACPI_2_0_TMR_VAL_EXT BIT8
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#define EFI_ACPI_2_0_DCK_CAP BIT9
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#define EFI_ACPI_2_0_RESET_REG_SUP BIT10
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#define EFI_ACPI_2_0_SEALED_CASE BIT11
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#define EFI_ACPI_2_0_HEADLESS BIT12
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#define EFI_ACPI_2_0_CPU_SW_SLP BIT13
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///
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/// Firmware ACPI Control Structure
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///
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typedef struct {
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UINT32 Signature;
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UINT32 Length;
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UINT32 HardwareSignature;
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UINT32 FirmwareWakingVector;
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UINT32 GlobalLock;
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UINT32 Flags;
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UINT64 XFirmwareWakingVector;
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UINT8 Version;
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UINT8 Reserved[31];
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} EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;
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///
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/// FACS Version (as defined in ACPI 2.0 spec.)
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///
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#define EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x01
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///
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/// Firmware Control Structure Feature Flags
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/// All other bits are reserved and must be set to 0.
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///
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#define EFI_ACPI_2_0_S4BIOS_F BIT0
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///
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/// Multiple APIC Description Table header definition. The rest of the table
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/// must be defined in a platform specific manner.
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///
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typedef struct {
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EFI_ACPI_DESCRIPTION_HEADER Header;
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UINT32 LocalApicAddress;
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UINT32 Flags;
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} EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
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///
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/// MADT Revision (as defined in ACPI 2.0 spec.)
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///
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#define EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x01
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///
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/// Multiple APIC Flags
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/// All other bits are reserved and must be set to 0.
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///
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#define EFI_ACPI_2_0_PCAT_COMPAT BIT0
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//
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// Multiple APIC Description Table APIC structure types
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// All other values between 0x09 an 0xFF are reserved and
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// will be ignored by OSPM.
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//
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#define EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC 0x00
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#define EFI_ACPI_2_0_IO_APIC 0x01
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#define EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE 0x02
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#define EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE 0x03
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#define EFI_ACPI_2_0_LOCAL_APIC_NMI 0x04
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#define EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE 0x05
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#define EFI_ACPI_2_0_IO_SAPIC 0x06
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#define EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC 0x07
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#define EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES 0x08
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//
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// APIC Structure Definitions
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//
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///
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/// Processor Local APIC Structure Definition
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///
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typedef struct {
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UINT8 Type;
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UINT8 Length;
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UINT8 AcpiProcessorId;
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UINT8 ApicId;
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UINT32 Flags;
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} EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE;
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///
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/// Local APIC Flags. All other bits are reserved and must be 0.
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///
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#define EFI_ACPI_2_0_LOCAL_APIC_ENABLED BIT0
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///
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/// IO APIC Structure
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///
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typedef struct {
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UINT8 Type;
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UINT8 Length;
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UINT8 IoApicId;
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UINT8 Reserved;
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UINT32 IoApicAddress;
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UINT32 GlobalSystemInterruptBase;
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} EFI_ACPI_2_0_IO_APIC_STRUCTURE;
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///
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/// Interrupt Source Override Structure
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///
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typedef struct {
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UINT8 Type;
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UINT8 Length;
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UINT8 Bus;
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UINT8 Source;
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UINT32 GlobalSystemInterrupt;
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UINT16 Flags;
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} EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
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///
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/// Non-Maskable Interrupt Source Structure
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///
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typedef struct {
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UINT8 Type;
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UINT8 Length;
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UINT16 Flags;
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UINT32 GlobalSystemInterrupt;
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} EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
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///
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/// Local APIC NMI Structure
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///
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typedef struct {
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UINT8 Type;
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UINT8 Length;
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UINT8 AcpiProcessorId;
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UINT16 Flags;
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UINT8 LocalApicLint;
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} EFI_ACPI_2_0_LOCAL_APIC_NMI_STRUCTURE;
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///
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/// Local APIC Address Override Structure
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///
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typedef struct {
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UINT8 Type;
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UINT8 Length;
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UINT16 Reserved;
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UINT64 LocalApicAddress;
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} EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;
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///
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/// IO SAPIC Structure
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///
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typedef struct {
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UINT8 Type;
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UINT8 Length;
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UINT8 IoApicId;
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UINT8 Reserved;
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UINT32 GlobalSystemInterruptBase;
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UINT64 IoSapicAddress;
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} EFI_ACPI_2_0_IO_SAPIC_STRUCTURE;
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///
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/// Local SAPIC Structure
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///
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typedef struct {
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UINT8 Type;
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UINT8 Length;
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UINT8 AcpiProcessorId;
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UINT8 LocalSapicId;
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UINT8 LocalSapicEid;
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UINT8 Reserved[3];
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UINT32 Flags;
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} EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE;
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///
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/// Platform Interrupt Sources Structure
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///
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typedef struct {
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UINT8 Type;
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UINT8 Length;
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UINT16 Flags;
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UINT8 InterruptType;
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UINT8 ProcessorId;
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UINT8 ProcessorEid;
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UINT8 IoSapicVector;
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UINT32 GlobalSystemInterrupt;
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UINT32 Reserved;
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} EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;
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///
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/// Smart Battery Description Table (SBST)
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///
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typedef struct {
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EFI_ACPI_DESCRIPTION_HEADER Header;
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UINT32 WarningEnergyLevel;
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UINT32 LowEnergyLevel;
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UINT32 CriticalEnergyLevel;
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} EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE;
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///
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/// SBST Version (as defined in ACPI 2.0 spec.)
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///
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#define EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
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///
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/// Embedded Controller Boot Resources Table (ECDT)
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/// The table is followed by a null terminated ASCII string that contains
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/// a fully qualified reference to the name space object.
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///
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typedef struct {
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EFI_ACPI_DESCRIPTION_HEADER Header;
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EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE EcControl;
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EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE EcData;
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UINT32 Uid;
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UINT8 GpeBit;
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} EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;
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///
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/// ECDT Version (as defined in ACPI 2.0 spec.)
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///
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#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01
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//
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// Known table signatures
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//
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///
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/// "RSD PTR " Root System Description Pointer
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///
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#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')
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///
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/// "SPIC" Multiple SAPIC Description Table
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///
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/// BUGBUG: Don't know where this came from except SR870BN4 uses it.
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/// #define EFI_ACPI_2_0_MULTIPLE_SAPIC_DESCRIPTION_TABLE_SIGNATURE 0x43495053
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///
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#define EFI_ACPI_2_0_MULTIPLE_SAPIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')
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///
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/// "BOOT" MS Simple Boot Spec
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///
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#define EFI_ACPI_2_0_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T')
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///
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/// "DBGP" MS Bebug Port Spec
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///
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#define EFI_ACPI_2_0_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P')
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///
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/// "DSDT" Differentiated System Description Table
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///
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#define EFI_ACPI_2_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T')
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///
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/// "ECDT" Embedded Controller Boot Resources Table
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///
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#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T')
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///
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/// "ETDT" Event Timer Description Table
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///
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#define EFI_ACPI_2_0_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T')
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///
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/// "FACS" Firmware ACPI Control Structure
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///
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#define EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S')
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///
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/// "FACP" Fixed ACPI Description Table
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///
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#define EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P')
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///
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/// "APIC" Multiple APIC Description Table
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///
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#define EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')
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///
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/// "PSDT" Persistent System Description Table
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///
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#define EFI_ACPI_2_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T')
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///
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/// "RSDT" Root System Description Table
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///
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#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T')
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///
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/// "SBST" Smart Battery Specification Table
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///
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#define EFI_ACPI_2_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T')
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///
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/// "SLIT" System Locality Information Table
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///
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#define EFI_ACPI_2_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T')
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///
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/// "SPCR" Serial Port Concole Redirection Table
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///
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#define EFI_ACPI_2_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')
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///
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/// "SRAT" Static Resource Affinity Table
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///
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#define EFI_ACPI_2_0_STATIC_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T')
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///
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/// "SSDT" Secondary System Description Table
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///
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#define EFI_ACPI_2_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T')
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///
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/// "SPMI" Server Platform Management Interface Table
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///
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#define EFI_ACPI_2_0_SERVER_PLATFORM_MANAGEMENT_INTERFACE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I')
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///
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/// "XSDT" Extended System Description Table
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///
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#define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T')
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///
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/// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table
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///
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#define EFI_ACPI_2_0_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')
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#pragma pack()
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#endif
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