mirror of
https://github.com/CloverHackyColor/CloverBootloader.git
synced 2024-12-11 14:28:08 +01:00
7c0aa811ec
Signed-off-by: Sergey Isakov <isakov-sl@bk.ru>
693 lines
42 KiB
C
693 lines
42 KiB
C
/*
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* File: HdaModels.h
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*
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* Copyright (c) 2018 John Davis
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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// From the VoodooHDA project (https://sourceforge.net/p/voodoohda),
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// ALSA (Linux kernel), and vendor datasheets.
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#ifndef _EFI_HDA_MODELS_H_
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#define _EFI_HDA_MODELS_H_
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#include <Uefi.h>
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// Generic names.
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#define HDA_CONTROLLER_MODEL_GENERIC L"HD Audio Controller"
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#define HDA_CODEC_MODEL_GENERIC L"Unknown Codec"
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// Vendor IDs.
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#define VEN_ATI_ID 0x1002
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#define VEN_AMD_ID 0x1002
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#define VEN_ANALOGDEVICES_ID 0x11D4
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#define VEN_AGERE_ID 0x11c1
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#define VEN_CIRRUSLOGIC_ID 0x1013
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#define VEN_CHRONTEL_ID 0x17e8
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#define VEN_CONEXANT_ID 0x14F1
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#define VEN_CREATIVE_ID 0x1102
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#define VEN_IDT_ID 0x111D
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#define VEN_INTEL_ID 0x8086
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#define VEN_LG_ID 0x1854
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#define VEN_NVIDIA_ID 0x10DE
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#define VEN_QEMU_ID 0x1AF4
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#define VEN_REALTEK_ID 0x10EC
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#define VEN_SIGMATEL_ID 0x8384
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#define VEN_VIA_ID 0x1106
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#define VEN_CMEDIA_ID 0x13f6
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#define VEN_CMEDIA2_ID 0x434d
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#define VEN_RDC_ID 0x17f3
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#define VEN_SIS_ID 0x1039
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#define VEN_ULI_ID 0x10b9
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#define VEN_MOTO_ID 0x1057
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#define VEN_SII_ID 0x1095
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#define VEN_WOLFSON_ID 0x14ec
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#define VEN_INVALID_ID 0xFFFF
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/*
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#define INTEL_ID 0x8086
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#define NVIDIA_ID 0x10de
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#define ATI_ID 0x1002
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#define RDC_ID 0x17f3
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#define VIA_ID 0x1106
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#define SIS_ID 0x1039
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#define ULI_ID 0x10b9
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#define CIRRUSLOGIC_ID 0x1013
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#define REALTEK_ID 0x10ec
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#define CREATIVE_ID 0x1102
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#define SIGMATEL_ID 0x8384
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#define IDT_ID 0x111d
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*/
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//
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// Controller models.
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//
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#define HDA_CONTROLLER_CONSTRUCT(vendor, id) (((UINT32) (id) << 16) | ((VEN_##vendor##_ID) & 0xFFFF))
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// AMD.
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#define HDA_CONTROLLER_AMDXXXX HDA_CONTROLLER_CONSTRUCT(AMD, 0xFFFF)
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// Intel.
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#define HDA_CONTROLLER_ICH6 HDA_CONTROLLER_CONSTRUCT(INTEL, 0x2668)
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#define HDA_CONTROLLER_63XXESB HDA_CONTROLLER_CONSTRUCT(INTEL, 0x269A)
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#define HDA_CONTROLLER_ICH7 HDA_CONTROLLER_CONSTRUCT(INTEL, 0x27D8)
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#define HDA_CONTROLLER_ICH8 HDA_CONTROLLER_CONSTRUCT(INTEL, 0x284B)
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#define HDA_CONTROLLER_ICH9 HDA_CONTROLLER_CONSTRUCT(INTEL, 0x293E)
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#define HDA_CONTROLLER_ICH10_1 HDA_CONTROLLER_CONSTRUCT(INTEL, 0x3A3E)
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#define HDA_CONTROLLER_ICH10_2 HDA_CONTROLLER_CONSTRUCT(INTEL, 0x3A6E)
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#define HDA_CONTROLLER_5SERIES_1 HDA_CONTROLLER_CONSTRUCT(INTEL, 0x3B56)
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#define HDA_CONTROLLER_5SERIES_2 HDA_CONTROLLER_CONSTRUCT(INTEL, 0x3B57)
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#define HDA_CONTROLLER_6SERIES HDA_CONTROLLER_CONSTRUCT(INTEL, 0x1C20)
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#define HDA_CONTROLLER_X79 HDA_CONTROLLER_CONSTRUCT(INTEL, 0x1D20)
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#define HDA_CONTROLLER_7SERIES HDA_CONTROLLER_CONSTRUCT(INTEL, 0x1E20)
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#define HDA_CONTROLLER_8SERIES_1 HDA_CONTROLLER_CONSTRUCT(INTEL, 0x8C20)
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#define HDA_CONTROLLER_8SERIES_2 HDA_CONTROLLER_CONSTRUCT(INTEL, 0x8C21)
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#define HDA_CONTROLLER_8SERIES_3 HDA_CONTROLLER_CONSTRUCT(INTEL, 0x9C20)
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#define HDA_CONTROLLER_8SERIES_4 HDA_CONTROLLER_CONSTRUCT(INTEL, 0x9C21)
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#define HDA_CONTROLLER_9SERIES_1 HDA_CONTROLLER_CONSTRUCT(INTEL, 0x8CA0)
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#define HDA_CONTROLLER_9SERIES_2 HDA_CONTROLLER_CONSTRUCT(INTEL, 0x9CA0)
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#define HDA_CONTROLLER_X99_1 HDA_CONTROLLER_CONSTRUCT(INTEL, 0x8D20)
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#define HDA_CONTROLLER_X99_2 HDA_CONTROLLER_CONSTRUCT(INTEL, 0x8D21)
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#define HDA_CONTROLLER_100SERIES HDA_CONTROLLER_CONSTRUCT(INTEL, 0xA170)
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#define HDA_CONTROLLER_200SERIES HDA_CONTROLLER_CONSTRUCT(INTEL, 0xA2F0)
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#define HDA_CONTROLLER_300SERIES HDA_CONTROLLER_CONSTRUCT(INTEL, 0xA348)
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#define HDA_CONTROLLER_HASWELL_1 HDA_CONTROLLER_CONSTRUCT(INTEL, 0x0A0C)
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#define HDA_CONTROLLER_HASWELL_2 HDA_CONTROLLER_CONSTRUCT(INTEL, 0x0C0C)
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#define HDA_CONTROLLER_CRYSTALWELL HDA_CONTROLLER_CONSTRUCT(INTEL, 0x0D0C)
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#define HDA_CONTROLLER_BROADWELL HDA_CONTROLLER_CONSTRUCT(INTEL, 0x160C)
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#define HDA_CONTROLLER_INTELXXXX HDA_CONTROLLER_CONSTRUCT(INTEL, 0xFFFF)
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//double
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#define HDA_INTEL_OAK HDA_CONTROLLER_CONSTRUCT(INTEL, 0x080a) /* Oaktrail */
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#define HDA_INTEL_BAY HDA_CONTROLLER_CONSTRUCT(INTEL, 0x0f04) /* BayTrail */
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#define HDA_INTEL_HSW1 HDA_CONTROLLER_CONSTRUCT(INTEL, 0x0a0c) /* Haswell */
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#define HDA_INTEL_HSW2 HDA_CONTROLLER_CONSTRUCT(INTEL, 0x0c0c) /* Haswell */
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#define HDA_INTEL_HSW3 HDA_CONTROLLER_CONSTRUCT(INTEL, 0x0d0c) /* Haswell */
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#define HDA_INTEL_BDW HDA_CONTROLLER_CONSTRUCT(INTEL, 0x160c) /* Broadwell */
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#define HDA_INTEL_BROXTON_T HDA_CONTROLLER_CONSTRUCT(INTEL, 0x1a98) /* Broxton-T */
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#define HDA_INTEL_CPT HDA_CONTROLLER_CONSTRUCT(INTEL, 0x1c20) /* CPT */
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#define HDA_INTEL_PATSBURG HDA_CONTROLLER_CONSTRUCT(INTEL, 0x1d20) /* PBG */
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#define HDA_INTEL_PPT1 HDA_CONTROLLER_CONSTRUCT(INTEL, 0x1e20) /* Panther Point */
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#define HDA_INTEL_BRASWELL HDA_CONTROLLER_CONSTRUCT(INTEL, 0x2284) /* Braswell */
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#define HDA_INTEL_82801F HDA_CONTROLLER_CONSTRUCT(INTEL, 0x2668) /* ICH6 */
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#define HDA_INTEL_63XXESB HDA_CONTROLLER_CONSTRUCT(INTEL, 0x269a) /* ESB2 */
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#define HDA_INTEL_82801G HDA_CONTROLLER_CONSTRUCT(INTEL, 0x27d8) /* ICH7 */
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#define HDA_INTEL_82801H HDA_CONTROLLER_CONSTRUCT(INTEL, 0x284b) /* ICH8 */
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#define HDA_INTEL_82801I HDA_CONTROLLER_CONSTRUCT(INTEL, 0x293e) /* ICH9 */
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#define HDA_INTEL_ICH9 HDA_CONTROLLER_CONSTRUCT(INTEL, 0x293f) /* ICH9 */
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#define HDA_INTEL_82801JI HDA_CONTROLLER_CONSTRUCT(INTEL, 0x3a3e) /* ICH10 */
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#define HDA_INTEL_82801JD HDA_CONTROLLER_CONSTRUCT(INTEL, 0x3a6e) /* ICH10 */
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#define HDA_INTEL_PCH HDA_CONTROLLER_CONSTRUCT(INTEL, 0x3b56) /* 5 Series/3400 */
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#define HDA_INTEL_PCH2 HDA_CONTROLLER_CONSTRUCT(INTEL, 0x3b57) /* 5 Series/3400 */
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#define HDA_INTEL_BROXTON_P HDA_CONTROLLER_CONSTRUCT(INTEL, 0x5a98) /* Broxton-P(Apollolake) */
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#define HDA_INTEL_MACBOOKPRO92 HDA_CONTROLLER_CONSTRUCT(INTEL, 0x7270)
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#define HDA_INTEL_SCH HDA_CONTROLLER_CONSTRUCT(INTEL, 0x811b) /* Poulsbo */
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#define HDA_INTEL_LPT1 HDA_CONTROLLER_CONSTRUCT(INTEL, 0x8c20) /* Lynx Point */
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#define HDA_INTEL_LPT2 HDA_CONTROLLER_CONSTRUCT(INTEL, 0x8c21) /* Lynx Point */
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#define HDA_INTEL_WCPT HDA_CONTROLLER_CONSTRUCT(INTEL, 0x8ca0) /* 9 Series */
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#define HDA_INTEL_WELLS1 HDA_CONTROLLER_CONSTRUCT(INTEL, 0x8d20) /* Wellsburg */
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#define HDA_INTEL_WELLS2 HDA_CONTROLLER_CONSTRUCT(INTEL, 0x8d21) /* Wellsburg */
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#define HDA_INTEL_WCPTLP HDA_CONTROLLER_CONSTRUCT(INTEL, 0x9ca0) /* Wildcat Point-LP */
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#define HDA_INTEL_LPTLP1 HDA_CONTROLLER_CONSTRUCT(INTEL, 0x9c20) /* Lynx Point-LP */
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#define HDA_INTEL_LPTLP2 HDA_CONTROLLER_CONSTRUCT(INTEL, 0x9c21) /* Lynx Point-LP */
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#define HDA_INTEL_SRSPLP HDA_CONTROLLER_CONSTRUCT(INTEL, 0x9d70) /* Sunrise Point-LP */
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#define HDA_INTEL_KABYLAKE_LP HDA_CONTROLLER_CONSTRUCT(INTEL, 0x9d71) /* Kabylake-LP */
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#define HDA_INTEL_SRSP HDA_CONTROLLER_CONSTRUCT(INTEL, 0xa170) /* Sunrise Point */
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#define HDA_INTEL_KABYLAKE HDA_CONTROLLER_CONSTRUCT(INTEL, 0xa171) /* Kabylake */
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#define HDA_INTEL_LEWISBURG1 HDA_CONTROLLER_CONSTRUCT(INTEL, 0xa1f0) /* Lewisburg */
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#define HDA_INTEL_LEWISBURG2 HDA_CONTROLLER_CONSTRUCT(INTEL, 0xa270) /* Lewisburg */
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#define HDA_INTEL_UNPT HDA_CONTROLLER_CONSTRUCT(INTEL, 0xa2f0) /* Kabylake-H */
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#define HDA_INTEL_ALL HDA_CONTROLLER_CONSTRUCT(INTEL, 0xffff)
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// NVIDIA.
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#define HDA_CONTROLLER_MCP51 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x026C)
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#define HDA_CONTROLLER_MCP55 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0371)
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#define HDA_CONTROLLER_MCP61_1 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x03E4)
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#define HDA_CONTROLLER_MCP61_2 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x03F0)
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#define HDA_CONTROLLER_MCP65_1 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x044A)
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#define HDA_CONTROLLER_MCP65_2 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x044B)
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#define HDA_CONTROLLER_MCP67_1 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x055C)
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#define HDA_CONTROLLER_MCP67_2 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x055D)
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#define HDA_CONTROLLER_MCP72 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0774)
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#define HDA_CONTROLLER_MCP73 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x07FC)
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#define HDA_CONTROLLER_MCP79_1 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0AC0)
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#define HDA_CONTROLLER_MCP79_2 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0AC1)
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#define HDA_CONTROLLER_MCP79_3 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0AC2)
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#define HDA_CONTROLLER_MCP79_4 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0AC3)
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#define HDA_CONTROLLER_MCP89 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0D94)
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#define HDA_CONTROLLER_GT216 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0BE2)
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#define HDA_CONTROLLER_GF100 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0BE5)
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#define HDA_CONTROLLER_GF106 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0BE9)
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#define HDA_CONTROLLER_GF108 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0BEA)
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#define HDA_CONTROLLER_GF104 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0BEB)
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#define HDA_CONTROLLER_GF116 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0BEE)
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#define HDA_CONTROLLER_GF119 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0E08)
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#define HDA_CONTROLLER_GF110 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0E09)
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#define HDA_CONTROLLER_GK104 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0E0A)
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#define HDA_CONTROLLER_GK106 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0E0B)
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#define HDA_CONTROLLER_GF114 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0E0C)
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#define HDA_CONTROLLER_GK208 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0E0F)
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#define HDA_CONTROLLER_GK110 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0E1A)
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#define HDA_CONTROLLER_GK107 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0E1B)
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#define HDA_CONTROLLER_GM200 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0FB0)
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#define HDA_CONTROLLER_GP108 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0FB8)
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#define HDA_CONTROLLER_GP107GL HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0FB9)
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#define HDA_CONTROLLER_GM206 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0FBA)
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#define HDA_CONTROLLER_GM204 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0FBB)
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#define HDA_CONTROLLER_GP102 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x10EF)
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#define HDA_CONTROLLER_GP104 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x10F0)
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#define HDA_CONTROLLER_GP106 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x10F1)
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#define HDA_CONTROLLER_TU102 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x10F7)
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#define HDA_CONTROLLER_NVIDIAXXXX HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0xFFFF)
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#define HDA_NVIDIA_MCP51 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x026c)
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#define HDA_NVIDIA_MCP55 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0371)
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#define HDA_NVIDIA_MCP61_1 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x03e4)
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#define HDA_NVIDIA_MCP61_2 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x03f0)
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#define HDA_NVIDIA_MCP65_1 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x044a)
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#define HDA_NVIDIA_MCP65_2 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x044b)
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#define HDA_NVIDIA_MCP67_1 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x055c)
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#define HDA_NVIDIA_MCP67_2 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x055d)
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#define HDA_NVIDIA_MCP78_1 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0774)
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#define HDA_NVIDIA_MCP78_2 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0775)
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#define HDA_NVIDIA_MCP78_3 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0776)
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#define HDA_NVIDIA_MCP78_4 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0777)
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#define HDA_NVIDIA_MCP73_1 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x07fc)
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#define HDA_NVIDIA_MCP73_2 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x07fd)
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#define HDA_NVIDIA_MCP79_1 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0ac0)
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#define HDA_NVIDIA_MCP79_2 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0ac1)
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#define HDA_NVIDIA_MCP79_3 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0ac2)
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#define HDA_NVIDIA_MCP79_4 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0ac3)
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#define HDA_NVIDIA_0BE2 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0be2)
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#define HDA_NVIDIA_0BE3 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0be3) // [GeForce 210] HDAcodec
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#define HDA_NVIDIA_0BE4 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0be4) // [GeForge GT 240] HDACodec 10de000d (0d00de10)
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#define HDA_NVIDIA_GT100 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0be5) // [GeForge GTX 470] HDACodec 10de0010 (1000de10)
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#define HDA_NVIDIA_GT106 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0be9)
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#define HDA_NVIDIA_GT108 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0bea) // HDACodec
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#define HDA_NVIDIA_GT104 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0beb)
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#define HDA_NVIDIA_GT116 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0bee)
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#define HDA_NVIDIA_MCP89_1 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0d94)
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#define HDA_NVIDIA_MCP89_2 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0d95)
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#define HDA_NVIDIA_MCP89_3 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0d96)
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#define HDA_NVIDIA_MCP89_4 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0d97)
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#define HDA_NVIDIA_GF119 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0e08)
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#define HDA_NVIDIA_GF110_1 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0e09)
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#define HDA_NVIDIA_GF110_2 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0e0c) // HDACodec de101600 (10de0016), Controller Binary de100c0e x2
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#define HDA_NVIDIA_GK104 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0e0a)
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#define HDA_NVIDIA_GK106 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0e0b)
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#define HDA_NVIDIA_GK110 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0e1a)
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#define HDA_NVIDIA_GK107 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0e1b) // HDACodec de104200 (10de0042)
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#define HDA_NVIDIA_GP104_2 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x10f0) // GeForce GTX 1070
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#define HDA_NVIDIA_GM204_2 HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0x0fbb) // GeForce GTX 970
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#define HDA_NVIDIA_ALL HDA_CONTROLLER_CONSTRUCT(NVIDIA, 0xffff)
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/* ATI */
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//#define HDA_ATI_0002 HDA_CONTROLLER_CONSTRUCT(ATI, 0x0002) /* ATI HDMI */
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//#define HDA_ATI_1308 HDA_CONTROLLER_CONSTRUCT(ATI, 0x1308) /* ATI HDMI */
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//#define HDA_ATI_177A HDA_CONTROLLER_CONSTRUCT(ATI, 0x157a) /* ATI HDMI */
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//#define HDA_ATI_15B3 HDA_CONTROLLER_CONSTRUCT(ATI, 0x15b3) /* ATI HDMI */
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#define HDA_ATI_SB450 HDA_CONTROLLER_CONSTRUCT(ATI, 0x437b) /* ATI SB 450/600/700/800/900 */
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#define HDA_ATI_SB600 HDA_CONTROLLER_CONSTRUCT(ATI, 0x4383) /* ATI SB 450/600/700/800/900 */
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#define HDA_ATI_HUDSON HDA_CONTROLLER_CONSTRUCT(ATI, 0x780d) /* PCI_DEVICE(0x1022, 0x780d) */
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#define HDA_ATI_RS600 HDA_CONTROLLER_CONSTRUCT(ATI, 0x793b) /* ATI HDMI */
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#define HDA_ATI_RS690 HDA_CONTROLLER_CONSTRUCT(ATI, 0x7919) /* ATI HDMI */
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#define HDA_ATI_RS780 HDA_CONTROLLER_CONSTRUCT(ATI, 0x960f)
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#define HDA_ATI_RS880 HDA_CONTROLLER_CONSTRUCT(ATI, 0x970f) /* ATI HDMI */
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//#define HDA_ATI_9840 HDA_CONTROLLER_CONSTRUCT(ATI, 0x9840) /* ATI HDMI */
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#define HDA_ATI_TRINITY HDA_CONTROLLER_CONSTRUCT(ATI, 0x9902) /* ATI HDMI */
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#define HDA_ATI_R600 HDA_CONTROLLER_CONSTRUCT(ATI, 0xaa00) /* ATI HDMI */
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#define HDA_ATI_RV630 HDA_CONTROLLER_CONSTRUCT(ATI, 0xaa08) /* ATI HDMI */
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#define HDA_ATI_RV610 HDA_CONTROLLER_CONSTRUCT(ATI, 0xaa10) /* ATI HDMI */
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#define HDA_ATI_RV670 HDA_CONTROLLER_CONSTRUCT(ATI, 0xaa18) /* ATI HDMI */
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#define HDA_ATI_RV635 HDA_CONTROLLER_CONSTRUCT(ATI, 0xaa20) /* ATI HDMI */
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#define HDA_ATI_RV620 HDA_CONTROLLER_CONSTRUCT(ATI, 0xaa28) /* ATI HDMI */
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#define HDA_ATI_RV770 HDA_CONTROLLER_CONSTRUCT(ATI, 0xaa30) /* ATI HDMI */
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#define HDA_ATI_RV730 HDA_CONTROLLER_CONSTRUCT(ATI, 0xaa38) /* ATI HDMI */
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#define HDA_ATI_RV710 HDA_CONTROLLER_CONSTRUCT(ATI, 0xaa40) /* ATI HDMI */
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#define HDA_ATI_RV740 HDA_CONTROLLER_CONSTRUCT(ATI, 0xaa48) /* ATI HDMI */
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#define HDA_ATI_RV870 HDA_CONTROLLER_CONSTRUCT(ATI, 0xaa50) /* ATI HDMI */
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#define HDA_ATI_RV840 HDA_CONTROLLER_CONSTRUCT(ATI, 0xaa58) /* ATI HDMI */
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#define HDA_ATI_RV830 HDA_CONTROLLER_CONSTRUCT(ATI, 0xaa60) /* ATI HDMI */
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#define HDA_ATI_RV810 HDA_CONTROLLER_CONSTRUCT(ATI, 0xaa68) /* ATI HDMI */
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#define HDA_ATI_RV970 HDA_CONTROLLER_CONSTRUCT(ATI, 0xaa80) /* ATI HDMI */
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#define HDA_ATI_RV940 HDA_CONTROLLER_CONSTRUCT(ATI, 0xaa88) /* ATI HDMI */
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#define HDA_ATI_RV930 HDA_CONTROLLER_CONSTRUCT(ATI, 0xaa90) /* ATI HDMI */
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#define HDA_ATI_RV910 HDA_CONTROLLER_CONSTRUCT(ATI, 0xaa98) /* ATI HDMI */
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#define HDA_ATI_R1000 HDA_CONTROLLER_CONSTRUCT(ATI, 0xaaa0) /* ATI HDMI */
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#define HDA_ATI_SI HDA_CONTROLLER_CONSTRUCT(ATI, 0xaaa8) /* ATI HDMI */
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#define HDA_ATI_VERDE HDA_CONTROLLER_CONSTRUCT(ATI, 0xaab0) /* ATI HDMI */
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//#define HDA_ATI_AAC0 HDA_CONTROLLER_CONSTRUCT(ATI, 0xaac0) /* ATI HDMI */
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//#define HDA_ATI_AAC8 HDA_CONTROLLER_CONSTRUCT(ATI, 0xaac8) /* ATI HDMI */
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//#define HDA_ATI_AAD8 HDA_CONTROLLER_CONSTRUCT(ATI, 0xaad8) /* ATI HDMI */
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//#define HDA_ATI_AAE8 HDA_CONTROLLER_CONSTRUCT(ATI, 0xaae8) /* ATI HDMI */
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//#define HDA_ATI_AAE0 HDA_CONTROLLER_CONSTRUCT(ATI, 0xaae0) /* ATI HDMI */
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//#define HDA_ATI_AAF0 HDA_CONTROLLER_CONSTRUCT(ATI, 0xaaf0) /* ATI HDMI */
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#define HDA_ATI_ALL HDA_CONTROLLER_CONSTRUCT(ATI, 0xffff)
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|
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/* VIA */
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|
#define HDA_VIA_VT82XX HDA_CONTROLLER_CONSTRUCT(VIA, 0x3288) /* VIA VT8251/VT8237A */
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//#define HDA_VIA_VT71XX HDA_CONTROLLER_CONSTRUCT(VIA, 0x9170) /* VIA GFX VT7122/VX900 */
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//#define HDA_VIA_VT61XX HDA_CONTROLLER_CONSTRUCT(VIA, 0x9140) /* VIA GFX VT6122/VX11 */
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|
#define HDA_VIA_ALL HDA_CONTROLLER_CONSTRUCT(VIA, 0xffff)
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|
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/* SiS */
|
|
#define HDA_SIS_966 HDA_CONTROLLER_CONSTRUCT(SIS, 0x7502) /* SIS966 */
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|
#define HDA_SIS_ALL HDA_CONTROLLER_CONSTRUCT(SIS, 0xffff)
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|
|
|
/* ULI */
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|
#define HDA_ULI_M5461 HDA_CONTROLLER_CONSTRUCT(ULI, 0x5461) /* ULI M5461 */
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#define HDA_ULI_ALL HDA_CONTROLLER_CONSTRUCT(ULI, 0xffff)
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|
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/* RDC */
|
|
#define HDA_RDC_M3010 HDA_CONTROLLER_CONSTRUCT(RDC, 0x3010) /* Vortex86MX */
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//
|
|
// Codec models.
|
|
//
|
|
#define HDA_CODEC_CONSTRUCT(vendor, id) (((UINT32) (VEN_##vendor##_ID) << 16) | ((id) & 0xFFFF))
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|
|
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// AMD.
|
|
#define HDA_CODEC_ATIRS600_1 HDA_CODEC_CONSTRUCT(ATI, 0x793c)
|
|
#define HDA_CODEC_ATIRS600_2 HDA_CODEC_CONSTRUCT(ATI, 0x7919)
|
|
#define HDA_CODEC_ATIRS690 HDA_CODEC_CONSTRUCT(ATI, 0x791a)
|
|
#define HDA_CODEC_ATIR6XX HDA_CODEC_CONSTRUCT(ATI, 0xaa01)
|
|
#define HDA_CODEC_AMDXXXX HDA_CODEC_CONSTRUCT(AMD, 0xFFFF)
|
|
#define HDA_CODEC_ATIXXXX HDA_CODEC_CONSTRUCT(ATI, 0xffff)
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|
|
|
|
// Analog Devices.
|
|
#define HDA_CODEC_AD1884A HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x184A)
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|
#define HDA_CODEC_AD1882 HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1882)
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|
#define HDA_CODEC_AD1883 HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1883)
|
|
#define HDA_CODEC_AD1884 HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1884)
|
|
#define HDA_CODEC_AD1984A HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x194A)
|
|
#define HDA_CODEC_AD1984B HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x194B)
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|
#define HDA_CODEC_AD1981HD HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1981)
|
|
#define HDA_CODEC_AD1983 HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1983)
|
|
#define HDA_CODEC_AD1984 HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1984)
|
|
#define HDA_CODEC_AD1986A HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1986)
|
|
#define HDA_CODEC_AD1987 HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1987)
|
|
#define HDA_CODEC_AD1988 HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1988)
|
|
#define HDA_CODEC_AD1988B HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x198B)
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|
#define HDA_CODEC_AD1882A HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x882A)
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|
#define HDA_CODEC_AD1989A HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x989A)
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|
#define HDA_CODEC_AD1989B HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x989B)
|
|
#define HDA_CODEC_ADXXXX HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0xFFFF)
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|
|
|
// Cirrus Logic.
|
|
#define HDA_CODEC_CS4206 HDA_CODEC_CONSTRUCT(CIRRUSLOGIC, 0x4206)
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#define HDA_CODEC_CS4207 HDA_CODEC_CONSTRUCT(CIRRUSLOGIC, 0x4207)
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|
#define HDA_CODEC_CS4210 HDA_CODEC_CONSTRUCT(CIRRUSLOGIC, 0x4210)
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|
#define HDA_CODEC_CSXXXX HDA_CODEC_CONSTRUCT(CIRRUSLOGIC, 0xFFFF)
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|
|
|
// Conexant.
|
|
#define HDA_CODEC_CX20549 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5045)
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|
#define HDA_CODEC_CX20551 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5047)
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|
#define HDA_CODEC_CX20561 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5051)
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|
#define HDA_CODEC_CX20582 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5066)
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|
#define HDA_CODEC_CX20583 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5067)
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|
#define HDA_CODEC_CX20584 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5068)
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#define HDA_CODEC_CX20585 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5069)
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#define HDA_CODEC_CX20588 HDA_CODEC_CONSTRUCT(CONEXANT, 0x506C)
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|
#define HDA_CODEC_CX20590 HDA_CODEC_CONSTRUCT(CONEXANT, 0x506E)
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|
#define HDA_CODEC_CX20631 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5097)
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|
#define HDA_CODEC_CX20632 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5098)
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|
#define HDA_CODEC_CX20641 HDA_CODEC_CONSTRUCT(CONEXANT, 0x50A1)
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|
#define HDA_CODEC_CX20642 HDA_CODEC_CONSTRUCT(CONEXANT, 0x50A2)
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|
#define HDA_CODEC_CX20651 HDA_CODEC_CONSTRUCT(CONEXANT, 0x50AB)
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|
#define HDA_CODEC_CX20652 HDA_CODEC_CONSTRUCT(CONEXANT, 0x50AC)
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|
#define HDA_CODEC_CX20664 HDA_CODEC_CONSTRUCT(CONEXANT, 0x50B8)
|
|
#define HDA_CODEC_CX20665 HDA_CODEC_CONSTRUCT(CONEXANT, 0x50B9)
|
|
#define HDA_CODEC_CX20751 HDA_CODEC_CONSTRUCT(CONEXANT, 0x510f)
|
|
#define HDA_CODEC_CX20751_2 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5110)
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|
#define HDA_CODEC_CX20751_4 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5111)
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|
#define HDA_CODEC_CX20755 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5113)
|
|
#define HDA_CODEC_CX20756 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5114)
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|
#define HDA_CODEC_CX20757 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5115)
|
|
#define HDA_CODEC_CX20952 HDA_CODEC_CONSTRUCT(CONEXANT, 0x51d7)
|
|
#define HDA_CODEC_CXXXXX HDA_CODEC_CONSTRUCT(CONEXANT, 0xffff)
|
|
|
|
|
|
// Creative.
|
|
#define HDA_CODEC_CA0110 HDA_CODEC_CONSTRUCT(CREATIVE, 0x000A)
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|
#define HDA_CODEC_CA0110_2 HDA_CODEC_CONSTRUCT(CREATIVE, 0x000B)
|
|
#define HDA_CODEC_SB0880 HDA_CODEC_CONSTRUCT(CREATIVE, 0x000D)
|
|
#define HDA_CODEC_CA0132 HDA_CODEC_CONSTRUCT(CREATIVE, 0x0011)
|
|
#define HDA_CODEC_XFIEA HDA_CODEC_CONSTRUCT(CREATIVE, 0x000a)
|
|
#define HDA_CODEC_XFIED HDA_CODEC_CONSTRUCT(CREATIVE, 0x000b)
|
|
#define HDA_CODEC_CAXXXX HDA_CODEC_CONSTRUCT(CREATIVE, 0xffff)
|
|
|
|
/* CMedia */
|
|
#define HDA_CODEC_CMI8880 HDA_CODEC_CONSTRUCT(CMEDIA, 0x8880)
|
|
#define HDA_CODEC_CMI9880 HDA_CODEC_CONSTRUCT(CMEDIA, 0x9880)
|
|
#define HDA_CODEC_CMIXXXX HDA_CODEC_CONSTRUCT(CMEDIA, 0xffff)
|
|
#define HDA_CODEC_CMI98802 HDA_CODEC_CONSTRUCT(CMEDIA2, 0x4980)
|
|
#define HDA_CODEC_CMIXXXX2 HDA_CODEC_CONSTRUCT(CMEDIA2, 0xffff)
|
|
|
|
// IDT.
|
|
#define HDA_CODEC_IDT92HD75BX HDA_CODEC_CONSTRUCT(IDT, 0x7603)
|
|
#define HDA_CODEC_IDT92HD83C1X HDA_CODEC_CONSTRUCT(IDT, 0x7604)
|
|
#define HDA_CODEC_IDT92HD81B1X HDA_CODEC_CONSTRUCT(IDT, 0x7605)
|
|
#define HDA_CODEC_IDT92HD75B3 HDA_CODEC_CONSTRUCT(IDT, 0x7608)
|
|
#define HDA_CODEC_IDT92HD88B3 HDA_CODEC_CONSTRUCT(IDT, 0x7666)
|
|
#define HDA_CODEC_IDT92HD88B1 HDA_CODEC_CONSTRUCT(IDT, 0x7667)
|
|
#define HDA_CODEC_IDT92HD88B2 HDA_CODEC_CONSTRUCT(IDT, 0x7668)
|
|
#define HDA_CODEC_IDT92HD88B4 HDA_CODEC_CONSTRUCT(IDT, 0x7669)
|
|
#define HDA_CODEC_IDT92HD73D1 HDA_CODEC_CONSTRUCT(IDT, 0x7674)
|
|
#define HDA_CODEC_IDT92HD73C1 HDA_CODEC_CONSTRUCT(IDT, 0x7675)
|
|
#define HDA_CODEC_IDT92HD73E1 HDA_CODEC_CONSTRUCT(IDT, 0x7676)
|
|
#define HDA_CODEC_IDT92HD95 HDA_CODEC_CONSTRUCT(IDT, 0x7695)
|
|
#define HDA_CODEC_IDT92HD71B8 HDA_CODEC_CONSTRUCT(IDT, 0x76B0)
|
|
#define HDA_CODEC_IDT92HD71B8_2 HDA_CODEC_CONSTRUCT(IDT, 0x76B1)
|
|
#define HDA_CODEC_IDT92HD71B7 HDA_CODEC_CONSTRUCT(IDT, 0x76B2)
|
|
#define HDA_CODEC_IDT92HD71B7_2 HDA_CODEC_CONSTRUCT(IDT, 0x76B3)
|
|
#define HDA_CODEC_IDT92HD71B6 HDA_CODEC_CONSTRUCT(IDT, 0x76B4)
|
|
#define HDA_CODEC_IDT92HD71B6_2 HDA_CODEC_CONSTRUCT(IDT, 0x76B5)
|
|
#define HDA_CODEC_IDT92HD71B5 HDA_CODEC_CONSTRUCT(IDT, 0x76B6)
|
|
#define HDA_CODEC_IDT92HD71B5_2 HDA_CODEC_CONSTRUCT(IDT, 0x76B7)
|
|
#define HDA_CODEC_IDT92HD89C3 HDA_CODEC_CONSTRUCT(IDT, 0x76C0)
|
|
#define HDA_CODEC_IDT92HD89C2 HDA_CODEC_CONSTRUCT(IDT, 0x76C1)
|
|
#define HDA_CODEC_IDT92HD89C1 HDA_CODEC_CONSTRUCT(IDT, 0x76C2)
|
|
#define HDA_CODEC_IDT92HD89B3 HDA_CODEC_CONSTRUCT(IDT, 0x76C3)
|
|
#define HDA_CODEC_IDT92HD89B2 HDA_CODEC_CONSTRUCT(IDT, 0x76C4)
|
|
#define HDA_CODEC_IDT92HD89B1 HDA_CODEC_CONSTRUCT(IDT, 0x76C5)
|
|
#define HDA_CODEC_IDT92HD89E3 HDA_CODEC_CONSTRUCT(IDT, 0x76C6)
|
|
#define HDA_CODEC_IDT92HD89E2 HDA_CODEC_CONSTRUCT(IDT, 0x76C7)
|
|
#define HDA_CODEC_IDT92HD89E1 HDA_CODEC_CONSTRUCT(IDT, 0x76C8)
|
|
#define HDA_CODEC_IDT92HD89D3 HDA_CODEC_CONSTRUCT(IDT, 0x76C9)
|
|
#define HDA_CODEC_IDT92HD89D2 HDA_CODEC_CONSTRUCT(IDT, 0x76CA)
|
|
#define HDA_CODEC_IDT92HD89D1 HDA_CODEC_CONSTRUCT(IDT, 0x76CB)
|
|
#define HDA_CODEC_IDT92HD89F3 HDA_CODEC_CONSTRUCT(IDT, 0x76CC)
|
|
#define HDA_CODEC_IDT92HD89F2 HDA_CODEC_CONSTRUCT(IDT, 0x76CD)
|
|
#define HDA_CODEC_IDT92HD89F1 HDA_CODEC_CONSTRUCT(IDT, 0x76CE)
|
|
#define HDA_CODEC_IDT92HD87B1_3 HDA_CODEC_CONSTRUCT(IDT, 0x76D1)
|
|
#define HDA_CODEC_IDT92HD83C1C HDA_CODEC_CONSTRUCT(IDT, 0x76D4)
|
|
#define HDA_CODEC_IDT92HD81B1C HDA_CODEC_CONSTRUCT(IDT, 0x76D5)
|
|
#define HDA_CODEC_IDT92HD87B2_4 HDA_CODEC_CONSTRUCT(IDT, 0x76D9)
|
|
#define HDA_CODEC_IDT92HD93BXX HDA_CODEC_CONSTRUCT(IDT, 0x76Df)
|
|
#define HDA_CODEC_IDT92HD91BXX HDA_CODEC_CONSTRUCT(IDT, 0x76E0)
|
|
#define HDA_CODEC_IDT92HD98BXX HDA_CODEC_CONSTRUCT(IDT, 0x76E3)
|
|
#define HDA_CODEC_IDT92HD99BXX HDA_CODEC_CONSTRUCT(IDT, 0x76E5)
|
|
#define HDA_CODEC_IDT92HD90BXX HDA_CODEC_CONSTRUCT(IDT, 0x76E7)
|
|
#define HDA_CODEC_IDT92HD66B1X5 HDA_CODEC_CONSTRUCT(IDT, 0x76E8)
|
|
#define HDA_CODEC_IDT92HD66B2X5 HDA_CODEC_CONSTRUCT(IDT, 0x76E9)
|
|
#define HDA_CODEC_IDT92HD66B3X5 HDA_CODEC_CONSTRUCT(IDT, 0x76EA)
|
|
#define HDA_CODEC_IDT92HD66C1X5 HDA_CODEC_CONSTRUCT(IDT, 0x76EB)
|
|
#define HDA_CODEC_IDT92HD66C2X5 HDA_CODEC_CONSTRUCT(IDT, 0x76EC)
|
|
#define HDA_CODEC_IDT92HD66C3X5 HDA_CODEC_CONSTRUCT(IDT, 0x76ED)
|
|
#define HDA_CODEC_IDT92HD66B1X3 HDA_CODEC_CONSTRUCT(IDT, 0x76EE)
|
|
#define HDA_CODEC_IDT92HD66B2X3 HDA_CODEC_CONSTRUCT(IDT, 0x76EF)
|
|
#define HDA_CODEC_IDT92HD66B3X3 HDA_CODEC_CONSTRUCT(IDT, 0x76F0)
|
|
#define HDA_CODEC_IDT92HD66C1X3 HDA_CODEC_CONSTRUCT(IDT, 0x76F1)
|
|
#define HDA_CODEC_IDT92HD66C2X3 HDA_CODEC_CONSTRUCT(IDT, 0x76F2)
|
|
#define HDA_CODEC_IDT92HD66C3_65 HDA_CODEC_CONSTRUCT(IDT, 0x76F3)
|
|
#define HDA_CODEC_IDTXXXX HDA_CODEC_CONSTRUCT(IDT, 0xFFFF)
|
|
|
|
|
|
// Intel.
|
|
#define HDA_CODEC_INTELCRESTLINE HDA_CODEC_CONSTRUCT(INTEL, 0x29FB)
|
|
#define HDA_CODEC_INTELBEARLAKE HDA_CODEC_CONSTRUCT(INTEL, 0x2801)
|
|
#define HDA_CODEC_INTELCANTIGA HDA_CODEC_CONSTRUCT(INTEL, 0x2802)
|
|
#define HDA_CODEC_INTELEAGLELAKE HDA_CODEC_CONSTRUCT(INTEL, 0x2803)
|
|
#define HDA_CODEC_INTELIBEXPEAK HDA_CODEC_CONSTRUCT(INTEL, 0x2804)
|
|
#define HDA_CODEC_INTELIBEXPEAK2 HDA_CODEC_CONSTRUCT(INTEL, 0x0054)
|
|
#define HDA_CODEC_INTELCOUGARPOINT HDA_CODEC_CONSTRUCT(INTEL, 0x2805)
|
|
#define HDA_CODEC_INTELPANTHERPOINT HDA_CODEC_CONSTRUCT(INTEL, 0x2806)
|
|
#define HDA_CODEC_INTELHASWELL HDA_CODEC_CONSTRUCT(INTEL, 0x2807)
|
|
#define HDA_CODEC_INTELBROADWELL HDA_CODEC_CONSTRUCT(INTEL, 0x2808)
|
|
#define HDA_CODEC_INTELSKYLAKE HDA_CODEC_CONSTRUCT(INTEL, 0x2809)
|
|
#define HDA_CODEC_INTELBROXTON HDA_CODEC_CONSTRUCT(INTEL, 0x280A)
|
|
#define HDA_CODEC_INTELKABYLAKE HDA_CODEC_CONSTRUCT(INTEL, 0x280B)
|
|
#define HDA_CODEC_INTELCANNONLAKE HDA_CODEC_CONSTRUCT(INTEL, 0x280C)
|
|
#define HDA_CODEC_INTELGEMINILAKE HDA_CODEC_CONSTRUCT(INTEL, 0x280D)
|
|
#define HDA_CODEC_INTELGEMINILAKE2 HDA_CODEC_CONSTRUCT(INTEL, 0x2800)
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#define HDA_CODEC_INTELCDT HDA_CODEC_CONSTRUCT(INTEL, 0x2880) // CedarTrail HDMI
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#define HDA_CODEC_INTELVLV HDA_CODEC_CONSTRUCT(INTEL, 0x2882) // Valleyview2 HDMI
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#define HDA_CODEC_INTELBSW HDA_CODEC_CONSTRUCT(INTEL, 0x2883) // Braswell HDMI
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#define HDA_CODEC_INTELCL HDA_CODEC_CONSTRUCT(INTEL, 0x29fb) // Crestline HDMI
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#define HDA_CODEC_INTELXXXX HDA_CODEC_CONSTRUCT(INTEL, 0xFFFF)
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/* Motorola */
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#define HDA_CODEC_MOTOXXXX HDA_CODEC_CONSTRUCT(MOTO, 0xffff)
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/* Silicon Image */
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#define HDA_CODEC_SII1390 HDA_CODEC_CONSTRUCT(SII, 0x1390)
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#define HDA_CODEC_SII1392 HDA_CODEC_CONSTRUCT(SII, 0x1392)
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#define HDA_CODEC_SIIXXXX HDA_CODEC_CONSTRUCT(SII, 0xffff)
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/* LSI - Lucent/Agere */
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#define HDA_CODEC_AGEREXXXX HDA_CODEC_CONSTRUCT(AGERE, 0xffff)
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#define CONEXANT_VENDORID 0x14f1
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/* Chrontel */
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#define HDA_CODEC_CHXXXX HDA_CODEC_CONSTRUCT(CHRONTEL, 0xffff)
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/* LG */
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#define HDA_CODEC_LGXXXX HDA_CODEC_CONSTRUCT(LG, 0xffff)
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/* Wolfson Microelectronics */
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#define HDA_CODEC_WMXXXX HDA_CODEC_CONSTRUCT(WOLFSON, 0xffff)
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/* QEMU */
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#define HDA_CODEC_QEMUXXXX HDA_CODEC_CONSTRUCT(QEMU, 0xffff)
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/* NVIDIA */
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#define HDA_CODEC_NVIDIAMCP78 HDA_CODEC_CONSTRUCT(NVIDIA, 0x0002)
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#define HDA_CODEC_NVIDIAMCP78_2 HDA_CODEC_CONSTRUCT(NVIDIA, 0x0003)
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#define HDA_CODEC_NVIDIAMCP78_3 HDA_CODEC_CONSTRUCT(NVIDIA, 0x0005)
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#define HDA_CODEC_NVIDIAMCP78_4 HDA_CODEC_CONSTRUCT(NVIDIA, 0x0006)
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#define HDA_CODEC_NVIDIAMCP7A HDA_CODEC_CONSTRUCT(NVIDIA, 0x0007)
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#define HDA_CODEC_NVIDIAGT220 HDA_CODEC_CONSTRUCT(NVIDIA, 0x000A)
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#define HDA_CODEC_NVIDIAGT21X HDA_CODEC_CONSTRUCT(NVIDIA, 0x000B)
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#define HDA_CODEC_NVIDIAMCP89 HDA_CODEC_CONSTRUCT(NVIDIA, 0x000C)
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#define HDA_CODEC_NVIDIAGT240 HDA_CODEC_CONSTRUCT(NVIDIA, 0x000D)
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#define HDA_CODEC_NVIDIAGTX470 HDA_CODEC_CONSTRUCT(NVIDIA, 0x0010)
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#define HDA_CODEC_NVIDIAGTS450 HDA_CODEC_CONSTRUCT(NVIDIA, 0x0011)
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#define HDA_CODEC_NVIDIAGT440 HDA_CODEC_CONSTRUCT(NVIDIA, 0x0014)
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#define HDA_CODEC_NVIDIAGTX550 HDA_CODEC_CONSTRUCT(NVIDIA, 0x0015)
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#define HDA_CODEC_NVIDIAGTX570 HDA_CODEC_CONSTRUCT(NVIDIA, 0x0018)
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#define HDA_CODEC_NVIDIAGT610 HDA_CODEC_CONSTRUCT(NVIDIA, 0x001C)
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#define HDA_CODEC_NVIDIAMCP67 HDA_CODEC_CONSTRUCT(NVIDIA, 0x0067)
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#define HDA_CODEC_NVIDIAMCP73 HDA_CODEC_CONSTRUCT(NVIDIA, 0x8001)
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#define HDA_CODEC_NVIDIAXXXX HDA_CODEC_CONSTRUCT(NVIDIA, 0xFFFF)
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/* Cirrus Logic */
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#define HDA_CODEC_CS4206 HDA_CODEC_CONSTRUCT(CIRRUSLOGIC, 0x4206)
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#define HDA_CODEC_CS4207 HDA_CODEC_CONSTRUCT(CIRRUSLOGIC, 0x4207)
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#define HDA_CODEC_CS4208 HDA_CODEC_CONSTRUCT(CIRRUSLOGIC, 0x4208)
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#define HDA_CODEC_CS4210 HDA_CODEC_CONSTRUCT(CIRRUSLOGIC, 0x4210)
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#define HDA_CODEC_CS4213 HDA_CODEC_CONSTRUCT(CIRRUSLOGIC, 0x4213)
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/* Realtek */
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#define HDA_CODEC_ALC231 HDA_CODEC_CONSTRUCT(REALTEK, 0x0231)
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#define HDA_CODEC_ALC667 HDA_CODEC_CONSTRUCT(REALTEK, 0x0667)
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#define HDA_CODEC_ALC867 HDA_CODEC_CONSTRUCT(REALTEK, 0x0867)
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// Realtek.
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#define HDA_CODEC_ALC221 HDA_CODEC_CONSTRUCT(REALTEK, 0x0221)
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#define HDA_CODEC_ALC225 HDA_CODEC_CONSTRUCT(REALTEK, 0x0225)
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#define HDA_CODEC_ALC230 HDA_CODEC_CONSTRUCT(REALTEK, 0x0230)
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#define HDA_CODEC_ALC233 HDA_CODEC_CONSTRUCT(REALTEK, 0x0233)
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#define HDA_CODEC_ALC235 HDA_CODEC_CONSTRUCT(REALTEK, 0x0235)
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#define HDA_CODEC_ALC236 HDA_CODEC_CONSTRUCT(REALTEK, 0x0236)
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#define HDA_CODEC_ALC255 HDA_CODEC_CONSTRUCT(REALTEK, 0x0255)
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#define HDA_CODEC_ALC256 HDA_CODEC_CONSTRUCT(REALTEK, 0x0256)
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#define HDA_CODEC_ALC257 HDA_CODEC_CONSTRUCT(REALTEK, 0x0257)
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#define HDA_CODEC_ALC260 HDA_CODEC_CONSTRUCT(REALTEK, 0x0260)
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#define HDA_CODEC_ALC262 HDA_CODEC_CONSTRUCT(REALTEK, 0x0262)
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#define HDA_CODEC_ALC267 HDA_CODEC_CONSTRUCT(REALTEK, 0x0267)
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#define HDA_CODEC_ALC268 HDA_CODEC_CONSTRUCT(REALTEK, 0x0268)
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#define HDA_CODEC_ALC269 HDA_CODEC_CONSTRUCT(REALTEK, 0x0269)
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#define HDA_CODEC_ALC270 HDA_CODEC_CONSTRUCT(REALTEK, 0x0270)
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#define HDA_CODEC_ALC272 HDA_CODEC_CONSTRUCT(REALTEK, 0x0272)
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#define HDA_CODEC_ALC273 HDA_CODEC_CONSTRUCT(REALTEK, 0x0273)
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#define HDA_CODEC_ALC275 HDA_CODEC_CONSTRUCT(REALTEK, 0x0275)
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#define HDA_CODEC_ALC276 HDA_CODEC_CONSTRUCT(REALTEK, 0x0276)
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#define HDA_CODEC_ALC280 HDA_CODEC_CONSTRUCT(REALTEK, 0x0280)
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#define HDA_CODEC_ALC282 HDA_CODEC_CONSTRUCT(REALTEK, 0x0282)
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#define HDA_CODEC_ALC283 HDA_CODEC_CONSTRUCT(REALTEK, 0x0283)
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#define HDA_CODEC_ALC284 HDA_CODEC_CONSTRUCT(REALTEK, 0x0284)
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#define HDA_CODEC_ALC285 HDA_CODEC_CONSTRUCT(REALTEK, 0x0285)
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#define HDA_CODEC_ALC286 HDA_CODEC_CONSTRUCT(REALTEK, 0x0286)
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#define HDA_CODEC_ALC288 HDA_CODEC_CONSTRUCT(REALTEK, 0x0288)
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#define HDA_CODEC_ALC289 HDA_CODEC_CONSTRUCT(REALTEK, 0x0289)
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#define HDA_CODEC_ALC290 HDA_CODEC_CONSTRUCT(REALTEK, 0x0290)
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#define HDA_CODEC_ALC292 HDA_CODEC_CONSTRUCT(REALTEK, 0x0292)
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#define HDA_CODEC_ALC293 HDA_CODEC_CONSTRUCT(REALTEK, 0x0293)
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#define HDA_CODEC_ALC294 HDA_CODEC_CONSTRUCT(REALTEK, 0x0294)
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#define HDA_CODEC_ALC295 HDA_CODEC_CONSTRUCT(REALTEK, 0x0295)
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#define HDA_CODEC_ALC298 HDA_CODEC_CONSTRUCT(REALTEK, 0x0298)
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#define HDA_CODEC_ALC660 HDA_CODEC_CONSTRUCT(REALTEK, 0x0660)
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#define HDA_CODEC_ALC662 HDA_CODEC_CONSTRUCT(REALTEK, 0x0662)
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#define HDA_CODEC_ALC663 HDA_CODEC_CONSTRUCT(REALTEK, 0x0663)
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#define HDA_CODEC_ALC665 HDA_CODEC_CONSTRUCT(REALTEK, 0x0665)
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#define HDA_CODEC_ALC668 HDA_CODEC_CONSTRUCT(REALTEK, 0x0668)
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#define HDA_CODEC_ALC670 HDA_CODEC_CONSTRUCT(REALTEK, 0x0670)
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#define HDA_CODEC_ALC671 HDA_CODEC_CONSTRUCT(REALTEK, 0x0671)
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#define HDA_CODEC_ALC680 HDA_CODEC_CONSTRUCT(REALTEK, 0x0680)
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#define HDA_CODEC_ALC861 HDA_CODEC_CONSTRUCT(REALTEK, 0x0861)
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#define HDA_CODEC_ALC861VD HDA_CODEC_CONSTRUCT(REALTEK, 0x0862)
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#define HDA_CODEC_ALC880 HDA_CODEC_CONSTRUCT(REALTEK, 0x0880)
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#define HDA_CODEC_ALC882 HDA_CODEC_CONSTRUCT(REALTEK, 0x0882)
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#define HDA_CODEC_ALC883 HDA_CODEC_CONSTRUCT(REALTEK, 0x0883)
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#define HDA_CODEC_ALC885 HDA_CODEC_CONSTRUCT(REALTEK, 0x0885)
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#define HDA_CODEC_ALC886 HDA_CODEC_CONSTRUCT(REALTEK, 0x0886)
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#define HDA_CODEC_ALC887 HDA_CODEC_CONSTRUCT(REALTEK, 0x0887)
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#define HDA_CODEC_ALC888 HDA_CODEC_CONSTRUCT(REALTEK, 0x0888)
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#define HDA_CODEC_ALC889 HDA_CODEC_CONSTRUCT(REALTEK, 0x0889)
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#define HDA_CODEC_ALC892 HDA_CODEC_CONSTRUCT(REALTEK, 0x0892)
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#define HDA_CODEC_ALC898 HDA_CODEC_CONSTRUCT(REALTEK, 0x0898)
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#define HDA_CODEC_ALC899 HDA_CODEC_CONSTRUCT(REALTEK, 0x0899)
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#define HDA_CODEC_ALC1150 HDA_CODEC_CONSTRUCT(REALTEK, 0x0900)
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#define HDA_CODEC_ALC1220A HDA_CODEC_CONSTRUCT(REALTEK, 0x1168)
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#define HDA_CODEC_ALC1220 HDA_CODEC_CONSTRUCT(REALTEK, 0x1220)
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#define HDA_CODEC_ALCXXXX HDA_CODEC_CONSTRUCT(REALTEK, 0xFFFF)
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// Sigmatel.
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#define HDA_CODEC_STAC9230X HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7612)
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#define HDA_CODEC_STAC9230D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7613)
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#define HDA_CODEC_STAC9229X HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7614)
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#define HDA_CODEC_STAC9229D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7615)
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#define HDA_CODEC_STAC9228X HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7616)
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#define HDA_CODEC_STAC9228D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7617)
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#define HDA_CODEC_STAC9227X HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7618)
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#define HDA_CODEC_STAC9227D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7619)
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#define HDA_CODEC_STAC9274 HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7620)
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#define HDA_CODEC_STAC9274D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7621)
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#define HDA_CODEC_STAC9273X HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7622)
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#define HDA_CODEC_STAC9273D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7623)
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#define HDA_CODEC_STAC9272X HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7624)
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#define HDA_CODEC_STAC9272D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7625)
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#define HDA_CODEC_STAC9271X HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7626)
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#define HDA_CODEC_STAC9271D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7627)
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#define HDA_CODEC_STAC9274X5NH HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7628)
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#define HDA_CODEC_STAC9274D5NH HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7629)
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#define HDA_CODEC_STAC9202 HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7632)
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#define HDA_CODEC_STAC9202D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7633)
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#define HDA_CODEC_STAC9250 HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7634)
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#define HDA_CODEC_STAC9250D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7635)
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#define HDA_CODEC_STAC9251 HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7636)
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#define HDA_CODEC_STAC9250D_1 HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7637)
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#define HDA_CODEC_IDT92HD700X HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7638)
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#define HDA_CODEC_IDT92HD700D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7639)
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#define HDA_CODEC_IDT92HD206X HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7645)
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#define HDA_CODEC_IDT92HD206D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7646)
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#define HDA_CODEC_CXD9872RDK HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7661)
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#define HDA_CODEC_STAC9872AK HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7662)
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#define HDA_CODEC_CXD9872AKD HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7664)
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#define HDA_CODEC_STAC9221 HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7680)
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#define HDA_CODEC_STAC922XD HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7681)
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#define HDA_CODEC_STAC9221_A2 HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7682)
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#define HDA_CODEC_STAC9221D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7683)
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#define HDA_CODEC_STAC9220 HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7690)
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#define HDA_CODEC_STAC9200D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7691)
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#define HDA_CODEC_IDT92HD005 HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7698)
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#define HDA_CODEC_IDT92HD005D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7699)
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#define HDA_CODEC_STAC9205X HDA_CODEC_CONSTRUCT(SIGMATEL, 0x76A0)
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#define HDA_CODEC_STAC9205D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x76A1)
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#define HDA_CODEC_STAC9204X HDA_CODEC_CONSTRUCT(SIGMATEL, 0x76A2)
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#define HDA_CODEC_STAC9204D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x76A3)
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#define HDA_CODEC_STAC9255 HDA_CODEC_CONSTRUCT(SIGMATEL, 0x76A4)
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#define HDA_CODEC_STAC9255D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x76A5)
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#define HDA_CODEC_STAC9254 HDA_CODEC_CONSTRUCT(SIGMATEL, 0x76A6)
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#define HDA_CODEC_STAC9254D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x76A7)
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#define HDA_CODEC_STAC9220_A2 HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7880)
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#define HDA_CODEC_STAC9220_A1 HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7882)
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#define HDA_CODEC_STACXXXX HDA_CODEC_CONSTRUCT(SIGMATEL, 0xFFFF)
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// VIA.
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#define HDA_CODEC_VT1708_8 HDA_CODEC_CONSTRUCT(VIA, 0x1708)
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#define HDA_CODEC_VT1708_9 HDA_CODEC_CONSTRUCT(VIA, 0x1709)
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#define HDA_CODEC_VT1708_A HDA_CODEC_CONSTRUCT(VIA, 0x170A)
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#define HDA_CODEC_VT1708_B HDA_CODEC_CONSTRUCT(VIA, 0x170B)
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#define HDA_CODEC_VT1709_0 HDA_CODEC_CONSTRUCT(VIA, 0xe710)
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#define HDA_CODEC_VT1709_1 HDA_CODEC_CONSTRUCT(VIA, 0xe711)
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#define HDA_CODEC_VT1709_2 HDA_CODEC_CONSTRUCT(VIA, 0xe712)
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#define HDA_CODEC_VT1709_3 HDA_CODEC_CONSTRUCT(VIA, 0xe713)
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#define HDA_CODEC_VT1709_4 HDA_CODEC_CONSTRUCT(VIA, 0xe714)
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#define HDA_CODEC_VT1709_5 HDA_CODEC_CONSTRUCT(VIA, 0xe715)
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#define HDA_CODEC_VT1709_6 HDA_CODEC_CONSTRUCT(VIA, 0xe716)
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#define HDA_CODEC_VT1709_7 HDA_CODEC_CONSTRUCT(VIA, 0xe717)
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#define HDA_CODEC_VT1708B_0 HDA_CODEC_CONSTRUCT(VIA, 0xe720)
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#define HDA_CODEC_VT1708B_1 HDA_CODEC_CONSTRUCT(VIA, 0xe721)
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#define HDA_CODEC_VT1708B_2 HDA_CODEC_CONSTRUCT(VIA, 0xe722)
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#define HDA_CODEC_VT1708B_3 HDA_CODEC_CONSTRUCT(VIA, 0xe723)
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#define HDA_CODEC_VT1708B_4 HDA_CODEC_CONSTRUCT(VIA, 0xe724)
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#define HDA_CODEC_VT1708B_5 HDA_CODEC_CONSTRUCT(VIA, 0xe725)
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#define HDA_CODEC_VT1708B_6 HDA_CODEC_CONSTRUCT(VIA, 0xe726)
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#define HDA_CODEC_VT1708B_7 HDA_CODEC_CONSTRUCT(VIA, 0xe727)
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#define HDA_CODEC_VT1708S_0 HDA_CODEC_CONSTRUCT(VIA, 0x0397)
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#define HDA_CODEC_VT1708S_1 HDA_CODEC_CONSTRUCT(VIA, 0x1397)
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#define HDA_CODEC_VT1708S_2 HDA_CODEC_CONSTRUCT(VIA, 0x2397)
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#define HDA_CODEC_VT1708S_3 HDA_CODEC_CONSTRUCT(VIA, 0x3397)
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#define HDA_CODEC_VT1708S_4 HDA_CODEC_CONSTRUCT(VIA, 0x4397)
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#define HDA_CODEC_VT1708S_5 HDA_CODEC_CONSTRUCT(VIA, 0x5397)
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#define HDA_CODEC_VT1708S_6 HDA_CODEC_CONSTRUCT(VIA, 0x6397)
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#define HDA_CODEC_VT1708S_7 HDA_CODEC_CONSTRUCT(VIA, 0x7397)
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#define HDA_CODEC_VT1702_0 HDA_CODEC_CONSTRUCT(VIA, 0x0398)
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#define HDA_CODEC_VT1702_1 HDA_CODEC_CONSTRUCT(VIA, 0x1398)
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#define HDA_CODEC_VT1702_2 HDA_CODEC_CONSTRUCT(VIA, 0x2398)
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#define HDA_CODEC_VT1702_3 HDA_CODEC_CONSTRUCT(VIA, 0x3398)
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#define HDA_CODEC_VT1702_4 HDA_CODEC_CONSTRUCT(VIA, 0x4398)
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#define HDA_CODEC_VT1702_5 HDA_CODEC_CONSTRUCT(VIA, 0x5398)
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#define HDA_CODEC_VT1702_6 HDA_CODEC_CONSTRUCT(VIA, 0x6398)
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#define HDA_CODEC_VT1702_7 HDA_CODEC_CONSTRUCT(VIA, 0x7398)
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#define HDA_CODEC_VT1716S_0 HDA_CODEC_CONSTRUCT(VIA, 0x0433)
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#define HDA_CODEC_VT1716S_1 HDA_CODEC_CONSTRUCT(VIA, 0xA721)
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#define HDA_CODEC_VT1718S_0 HDA_CODEC_CONSTRUCT(VIA, 0x0428)
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#define HDA_CODEC_VT1718S_1 HDA_CODEC_CONSTRUCT(VIA, 0x4428)
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#define HDA_CODEC_VT1802_0 HDA_CODEC_CONSTRUCT(VIA, 0x0446)
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#define HDA_CODEC_VT1802_1 HDA_CODEC_CONSTRUCT(VIA, 0x8446)
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#define HDA_CODEC_VT1812 HDA_CODEC_CONSTRUCT(VIA, 0x0448)
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#define HDA_CODEC_VT1818S HDA_CODEC_CONSTRUCT(VIA, 0x0440)
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#define HDA_CODEC_VT1828S HDA_CODEC_CONSTRUCT(VIA, 0x4441)
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#define HDA_CODEC_VT2002P_0 HDA_CODEC_CONSTRUCT(VIA, 0x0438)
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#define HDA_CODEC_VT2002P_1 HDA_CODEC_CONSTRUCT(VIA, 0x4438)
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#define HDA_CODEC_VT2020 HDA_CODEC_CONSTRUCT(VIA, 0x0441)
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#define HDA_CODEC_VTXXXX HDA_CODEC_CONSTRUCT(VIA, 0xFFFF)
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#endif
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