mirror of
https://github.com/CloverHackyColor/CloverBootloader.git
synced 2024-12-29 17:17:42 +01:00
318 lines
7.0 KiB
C
318 lines
7.0 KiB
C
/*
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* ati.h
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*
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* Created by Slice on 19.02.12.
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*
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* the code ported from Chameleon project as well as from RadeonFB by Joblo and RadeonHD by dong
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* big thank to Islam M. Ahmed Zaid for the updating the collection
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*/
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#include "Platform.h" //this include needed for Uefi types
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#include "ati_reg.h"
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#define OFFSET_TO_GET_ATOMBIOS_STRINGS_START 0x6e
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#define DATVAL(x) {kPtr, sizeof(x), (UINT8 *)x}
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#define STRVAL(x) {kStr, sizeof(x)-1, (UINT8 *)x}
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#define BYTVAL(x) {kCst, 1, (UINT8 *)(UINTN)x}
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#define WRDVAL(x) {kCst, 2, (UINT8 *)(UINTN)x}
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#define DWRVAL(x) {kCst, 4, (UINT8 *)(UINTN)x}
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// QWRVAL would work only in 64 bit
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//#define QWRVAL(x) {kCst, 8, (UINT8 *)(UINTN)x}
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#define NULVAL {kNul, 0, (UINT8 *)NULL}
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/*Typedefs ENUMS*/
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typedef enum {
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kNul,
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kStr,
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kPtr,
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kCst
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} type_t;
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typedef enum {
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CHIP_FAMILY_UNKNOW,
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/* Old */
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CHIP_FAMILY_R420,
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CHIP_FAMILY_R423,
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CHIP_FAMILY_RV410,
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CHIP_FAMILY_RV515,
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CHIP_FAMILY_R520,
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CHIP_FAMILY_RV530,
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CHIP_FAMILY_RV560,
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CHIP_FAMILY_RV570,
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CHIP_FAMILY_R580,
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/* IGP */
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CHIP_FAMILY_RS600,
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CHIP_FAMILY_RS690,
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CHIP_FAMILY_RS740,
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CHIP_FAMILY_RS780,
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CHIP_FAMILY_RS880,
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/* R600 */
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CHIP_FAMILY_R600,
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CHIP_FAMILY_RV610,
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CHIP_FAMILY_RV620,
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CHIP_FAMILY_RV630,
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CHIP_FAMILY_RV635,
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CHIP_FAMILY_RV670,
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/* R700 */
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CHIP_FAMILY_RV710,
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CHIP_FAMILY_RV730,
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CHIP_FAMILY_RV740,
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CHIP_FAMILY_RV770,
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CHIP_FAMILY_RV772,
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CHIP_FAMILY_RV790,
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/* Evergreen */
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CHIP_FAMILY_CEDAR,
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CHIP_FAMILY_CYPRESS,
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CHIP_FAMILY_HEMLOCK,
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CHIP_FAMILY_JUNIPER,
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CHIP_FAMILY_REDWOOD,
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/* Northern Islands */
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CHIP_FAMILY_BARTS,
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CHIP_FAMILY_CAICOS,
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CHIP_FAMILY_CAYMAN,
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CHIP_FAMILY_TURKS,
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/* Southern Islands */
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CHIP_FAMILY_PALM,
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CHIP_FAMILY_SUMO,
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CHIP_FAMILY_SUMO2,
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CHIP_FAMILY_ARUBA,
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CHIP_FAMILY_TAHITI,
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CHIP_FAMILY_PITCAIRN,
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CHIP_FAMILY_VERDE,
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CHIP_FAMILY_OLAND,
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/* Sea Islands */
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CHIP_FAMILY_HAINAN,
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CHIP_FAMILY_BONAIRE,
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CHIP_FAMILY_KAVERI,
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CHIP_FAMILY_KABINI,
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CHIP_FAMILY_HAWAII,
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CHIP_FAMILY_MULLINS,
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/* Volcanic Islands */
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CHIP_FAMILY_TOPAZ,
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CHIP_FAMILY_AMETHYST,
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CHIP_FAMILY_TONGA,
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CHIP_FAMILY_FIJI,
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CHIP_FAMILY_CARRIZO,
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CHIP_FAMILY_TOBAGO,
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CHIP_FAMILY_ELLESMERE, /* Polaris 10 */
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CHIP_FAMILY_BAFFIN, /* Polaris 11 */
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CHIP_FAMILY_GREENLAND, /* Polaris 12 */
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CHIP_FAMILY_VEGA10, /* Vega 10 */
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CHIP_FAMILY_VEGA20, /* Vega 20 */
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CHIP_FAMILY_NAVI10,
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CHIP_FAMILY_LAST
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} ati_chip_family_t;
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typedef struct {
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const CHAR8 *name;
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UINT8 ports;
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} card_config_t;
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typedef enum {
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kNull,
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/* OLDController */
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kWormy,
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kAlopias,
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kCaretta,
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kKakapo,
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kKipunji,
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kPeregrine,
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kRaven,
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kSphyrna,
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/* AMD2400Controller */
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kIago,
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/* AMD2600Controller */
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kHypoprion,
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kLamna,
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/* AMD3800Controller */
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kMegalodon,
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kTriakis,
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/* AMD4600Controller */
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kFlicker,
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kGliff,
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kShrike,
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/* AMD4800Controller */
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kCardinal,
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kMotmot,
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kQuail,
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/* AMD5000Controller */
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kDouc,
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kLangur,
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kUakari,
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kZonalis,
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kAlouatta,
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kHoolock,
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kVervet,
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kBaboon,
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kEulemur,
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kGalago,
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kColobus,
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kMangabey,
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kNomascus,
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kOrangutan,
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/* AMD6000Controller */
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kPithecia,
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kBulrushes,
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kCattail,
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kHydrilla,
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kDuckweed,
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kFanwort,
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kElodea,
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kKudzu,
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kGibba,
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kLotus,
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kIpomoea,
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kMuskgrass,
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kJuncus,
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kOsmunda,
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kPondweed,
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kSpikerush,
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kTypha,
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/* AMD7000Controller */
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kRamen,
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kTako,
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kNamako,
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kAji,
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kBuri,
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kChutoro,
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kDashimaki,
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kEbi,
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kGari,
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kFutomaki,
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kHamachi,
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kOPM,
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kIkura,
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kIkuraS,
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kJunsai,
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kKani,
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kKaniS,
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kDashimakiS,
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kMaguro,
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kMaguroS,
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/* AMD8000Controller */
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kExmoor,
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kBaladi,
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/* AMD9000Controller */
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kMalteseS,
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kLagotto,
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kGreyhoundS,
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kMaltese,
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kBasset,
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kGreyhound,
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kLabrador,
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/* AMD9300Controller */
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kFleuveSWIP,
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/* AMD9500Controller */
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kAcre,
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kDayman,
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kGuariba,
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kHuallaga,
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kOrinoco,
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/* AMD9510Controller*/
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kBerbice,
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/* AMD9515Controller */
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kMazaruni,
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kLongavi,
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/* AMD9520Controller */
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kElqui,
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kCaroni,
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kFlorin,
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kRadeon, // this is absent FB if not set
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kCfgEnd
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} config_name_t;
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typedef struct {
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UINT16 device_id;
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// UINT32 subsys_id;
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ati_chip_family_t chip_family;
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const CHAR8 *model_name;
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config_name_t cfg_name;
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} radeon_card_info_t;
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typedef struct {
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DevPropDevice *device;
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radeon_card_info_t *info;
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pci_dt_t *pci_dev;
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UINT8 *fb;
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UINT8 *mmio;
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UINT8 *io;
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UINT8 *rom;
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UINT32 rom_size;
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UINT64 vram_size;
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const CHAR8 *cfg_name;
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UINT8 ports;
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UINT32 flags;
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BOOLEAN posted;
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} card_t;
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// Chip flags
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/* enum radeon_chip_flags {
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RADEON_FAMILY_MASK = 0x0000ffffUL,
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RADEON_FLAGS_MASK = 0xffff0000UL,
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RADEON_IS_MOBILITY = 0x00010000UL,
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RADEON_IS_IGP = 0x00020000UL,
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RADEON_SINGLE_CRTC = 0x00040000UL,
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RADEON_IS_AGP = 0x00080000UL,
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RADEON_HAS_HIERZ = 0x00100000UL,
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RADEON_IS_PCIE = 0x00200000UL,
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RADEON_NEW_MEMMAP = 0x00400000UL,
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RADEON_IS_PCI = 0x00800000UL,
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RADEON_IS_IGPGART = 0x01000000UL,
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};*/
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#define MKFLAG(n) (1 << n)
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#define FLAGTRUE MKFLAG(0)
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#define EVERGREEN MKFLAG(1)
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#define FLAGMOBILE MKFLAG(2)
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#define FLAGOLD MKFLAG(3)
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#define FLAGNOTFAKE MKFLAG(4)
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#define FLAGDYNAMIC MKFLAG(5)
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typedef struct {
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type_t type;
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UINT32 size;
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UINT8 *data;
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} value_t;
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typedef struct {
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UINT32 flags;
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BOOLEAN all_ports;
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CONST CHAR8 *name;
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BOOLEAN (*get_value)(value_t *val, INTN index, BOOLEAN Sier);
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value_t default_val;
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} AtiDevProp;
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BOOLEAN get_bootdisplay_val(value_t *val, INTN index, BOOLEAN Sier);
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BOOLEAN get_vrammemory_val(value_t *val, INTN index, BOOLEAN Sier);
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BOOLEAN get_edid_val(value_t *val, INTN index, BOOLEAN Sier);
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BOOLEAN get_display_type(value_t *val, INTN index, BOOLEAN Sier);
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BOOLEAN get_name_val(value_t *val, INTN index, BOOLEAN Sier);
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BOOLEAN get_nameparent_val(value_t *val, INTN index, BOOLEAN Sier);
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BOOLEAN get_model_val(value_t *val, INTN index, BOOLEAN Sier);
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BOOLEAN get_conntype_val(value_t *val, INTN index, BOOLEAN Sier);
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BOOLEAN get_vrammemsize_val(value_t *val, INTN index, BOOLEAN Sier);
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BOOLEAN get_binimage_val(value_t *val, INTN index, BOOLEAN Sier);
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BOOLEAN get_binimage_owr(value_t *val, INTN index, BOOLEAN Sier);
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BOOLEAN get_romrevision_val(value_t *val, INTN index, BOOLEAN Sier);
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BOOLEAN get_deviceid_val(value_t *val, INTN index, BOOLEAN Sier);
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BOOLEAN get_mclk_val(value_t *val, INTN index, BOOLEAN Sier);
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BOOLEAN get_sclk_val(value_t *val, INTN index, BOOLEAN Sier);
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BOOLEAN get_refclk_val(value_t *val, INTN index, BOOLEAN Sier);
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BOOLEAN get_platforminfo_val(value_t *val, INTN index, BOOLEAN Sier);
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BOOLEAN get_vramtotalsize_val(value_t *val, INTN index, BOOLEAN Sier);
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BOOLEAN get_dual_link_val(value_t *val, INTN index, BOOLEAN Sier);
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BOOLEAN get_name_pci_val(value_t *val, INTN index, BOOLEAN Sier);
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extern card_config_t card_configs[];
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extern radeon_card_info_t radeon_cards[];
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extern AtiDevProp ati_devprop_list[];
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extern const CHAR8 *chip_family_name[];
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BOOLEAN
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setup_ati_devprop (
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LOADER_ENTRY *Entry,
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pci_dt_t *ati_dev
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);
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