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44 lines
1.1 KiB
NASM
44 lines
1.1 KiB
NASM
;------------------------------------------------------------------------------
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;
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; GetInterruptState() function for AArch64
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;
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; Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
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; Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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; Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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;
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;------------------------------------------------------------------------------
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EXPORT GetInterruptState
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AREA BaseLib_LowLevel, CODE, READONLY
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DAIF_RD_IRQ_BIT EQU (1 << 7)
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;/**
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; Retrieves the current CPU interrupt state.
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;
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; Returns TRUE is interrupts are currently enabled. Otherwise
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; returns FALSE.
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;
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; @retval TRUE CPU interrupts are enabled.
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; @retval FALSE CPU interrupts are disabled.
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;
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;**/
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;
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;BOOLEAN
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;EFIAPI
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;GetInterruptState (
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; VOID
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; );
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;
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GetInterruptState
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mrs x0, daif
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mov w0, wzr
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tst x0, #DAIF_RD_IRQ_BIT // Check IRQ mask; set Z=1 if clear/unmasked
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bne exit // if Z=1 (eq) return 1, else 0
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mov w0, #1
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exit
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ret
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END
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