mirror of
https://github.com/CloverHackyColor/CloverBootloader.git
synced 2024-11-24 11:45:27 +01:00
522 lines
9.2 KiB
NASM
522 lines
9.2 KiB
NASM
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;
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; Parameters
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; X64 - 64 bit target
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; LEGACY_A20 - use slow A20 Gate
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; CHARACTER_TO_SHOW - character to display
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; FORCE_TEXT_MODE - switch to 80x25 mono mode
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; USB_LOW_EBDA - low-ebda mode
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; GENPAGE - genpage mode
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;
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%ifdef LEGACY_A20
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DELAY_PORT: equ 0xed ; Port to use for 1uS delay
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KBD_CONTROL_PORT: equ 0x60 ; 8042 control port
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KBD_STATUS_PORT: equ 0x64 ; 8042 status port
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WRITE_DATA_PORT_CMD: equ 0xd1 ; 8042 command to write the data port
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ENABLE_A20_CMD: equ 0xdf ; 8042 command to enable A20
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%else
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FAST_ENABLE_A20_PORT: equ 0x92
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FAST_ENABLE_A20_MASK: equ 2
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%endif
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BASE_ADR_16: equ 0x0200
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SIZE_TO_STACK_16: equ 0x0fe0 - BASE_ADR_16
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IA32_EFER: equ 0xC0000080
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%ifndef CHARACTER_TO_SHOW
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%ifdef X64
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%define CHARACTER_TO_SHOW '7'
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%else
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%define CHARACTER_TO_SHOW '3'
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%endif
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%endif
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%assign GDT_DESC_SIZE 8
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%macro GDT_DESC 2
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dw 0xFFFF, 0
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db 0, %1, %2, 0
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%endmacro
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%ifdef X64
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%assign IDT_DESC_SIZE 16
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%macro IDT_DESC 0
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dw 0, SYS_CODE64_SEL
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db 0, 0x8e
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dw 0
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dd 0, 0
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%endmacro
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%else
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%assign IDT_DESC_SIZE 8
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%macro IDT_DESC 0
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dw 0, SYS_CODE_SEL
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db 0, 0x8e
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dw 0
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%endmacro
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%endif
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%ifdef X64
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%ifndef GENPAGE
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section .pagezero start=0
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times BASE_ADR_16 db 0
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%endif
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%else
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%undef GENPAGE
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%endif
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bits 16
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section .text start=BASE_ADR_16
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global _start
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_start:
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jmp .SkipLabel
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%ifdef X64
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db 'CLOVERX64 ' ; Bootloader Label
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%else
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db 'CLOVERIA32 ' ; Bootloader Label
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%endif
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.SkipLabel:
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mov ax, cs
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mov ds, ax
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mov es, ax
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mov ss, ax
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mov sp, MyStack
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;
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; Retrieve Bios Memory Map
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;
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xor ebx, ebx
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lea edi, [MemoryMap]
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.MemMapLoop:
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mov eax, 0xe820
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mov ecx, 20
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mov edx, 0x534d4150 ; SMAP
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int 0x15
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jc .MemMapDone
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add di, 20
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test ebx, ebx
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jnz .MemMapLoop
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.MemMapDone:
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sub di, MemoryMap ; Get the address of the memory map
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mov [MemoryMapSize], edi ; Save the size of the memory map
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;
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; Rebase Self
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;
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xor ebx, ebx
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mov bx, cs
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shl ebx, 4
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add [gdtr + 2], ebx
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add [idtr + 2], ebx
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add [.JumpTo32BitProtectedMode], ebx
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%ifdef X64
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add [.JumpToLongMode], ebx
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%endif
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;
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; Enable A20 Gate
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;
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mov ax, 0x2401
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int 0x15
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jnc .A20GateEnabled
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;
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; If INT 15 Function 2401 is not supported, then attempt to Enable A20 manually.
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;
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%ifdef LEGACY_A20
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;
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; Legacy A20gate
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;
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call Empty8042InputBuffer ; Empty the Input Buffer on the 8042 controller
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jnz .Timeout8042 ; Jump if the 8042 timed out
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out DELAY_PORT, ax ; Delay 1 uS
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mov al, WRITE_DATA_PORT_CMD ; 8042 cmd to write output port
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out KBD_STATUS_PORT, al ; Send command to the 8042
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call Empty8042InputBuffer ; Empty the Input Buffer on the 8042 controller
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jnz .Timeout8042 ; Jump if the 8042 timed out
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mov al, ENABLE_A20_CMD ; gate address bit 20 on
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out KBD_CONTROL_PORT,al ; Send command to thre 8042
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call Empty8042InputBuffer ; Empty the Input Buffer on the 8042 controller
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mov cx, 25 ; Delay 25 uS for the command to complete on the 8042
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.Delay25uS:
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out DELAY_PORT, ax ; Delay 1 uS
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loop .Delay25uS
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.Timeout8042:
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%else
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;
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; WIKI - fast A20gate
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;
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in al, FAST_ENABLE_A20_PORT
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or al, FAST_ENABLE_A20_MASK
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out FAST_ENABLE_A20_PORT, al
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%endif
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.A20GateEnabled:
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%ifdef GENPAGE
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;
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; Create Page Table
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;
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call CreatePageTable
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%endif
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%ifdef FORCE_TEXT_MODE
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;
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; Switch to 80x25 mono text mode (2)
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;
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mov ax, 2
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int 0x10
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%endif
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;
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; Display CHARACTER_TO_SHOW
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;
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mov bx, 0x000F
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mov ax, 0x0E00 | (CHARACTER_TO_SHOW & 255)
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int 0x10
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%ifndef X64
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mov bx, LINEAR_SEL ; Flat data descriptor
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%endif
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;
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; DISABLE INTERRUPTS - Entering Protected Mode
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;
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cli
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%ifdef GENPAGE
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;
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; Ready Address of Page Table in EDX
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;
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movzx edx, word [PageTableSegment]
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shl edx, 4
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%endif
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;
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; load GDT
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;
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lgdt [gdtr]
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%ifndef X64
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;
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; load IDT
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;
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lidt [idtr]
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%endif
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;
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; Enable Protected Mode (set CR0.PE=1)
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;
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mov eax, cr0
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or al, 1
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mov cr0, eax
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.JumpTo32BitProtectedMode: equ $ + 2
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%ifndef X64
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jmp dword LINEAR_CODE_SEL:(BlockSignature + 2)
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%else
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jmp dword LINEAR_CODE_SEL:.In32BitProtectedMode
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.In32BitProtectedMode:
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bits 32
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;
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; Entering Long Mode
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;
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mov ax, LINEAR_SEL
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mov ds, eax
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mov es, eax
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mov ss, eax
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; WARNING: esp invalid here
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;
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; Enable the 64-bit page-translation-table entries by
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; setting CR4.PAE=1 (this is _required_ before activating
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; long mode). Paging is not enabled until after long mode
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; is enabled.
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;
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mov eax, cr4
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or al, 0x20
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mov cr4, eax
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;
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; This is the Trapolean Page Tables that are guarenteed
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; under 4GB.
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;
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; Address Map:
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; 10000 ~ 12000 - efildr (loaded)
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; 20000 ~ 21000 - start64.com
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; 21000 ~ 22000 - efi64.com
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; 22000 ~ 90000 - efildr
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; 90000 ~ 96000 - 4G pagetable (will be reload later)
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;
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%ifdef GENPAGE
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mov cr3, edx
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%elifdef USE_LOW_EBDA
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mov eax, 0x88000
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mov cr3, eax
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%else
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mov eax, 0x90000
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mov cr3, eax
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%endif
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;
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; Enable long mode (set EFER.LME=1).
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;
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mov ecx, IA32_EFER
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rdmsr
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or ax, 0x100
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wrmsr
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;
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; Enable Paging to activate long mode (set CR0.PG=1)
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;
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mov eax, cr0
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bts eax, 31
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mov cr0, eax
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.JumpToLongMode: equ $ + 1
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jmp SYS_CODE64_SEL:.InLongMode
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.InLongMode:
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bits 64
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mov ax, SYS_DATA_SEL
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mov ds, eax
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mov es, eax
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mov ss, eax
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lea rsp, [REL MyStack]
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;
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; load IDT
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;
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lidt [REL idtr]
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jmp BlockSignature + 2
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%endif
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bits 16
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%ifdef LEGACY_A20
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Empty8042InputBuffer:
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xor cx, cx
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.Empty8042Loop:
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out DELAY_PORT, ax ; Delay 1us
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in al, KBD_STATUS_PORT ; Read the 8042 Status Port
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and al, 2 ; Check the Input Buffer Full Flag
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loopnz .Empty8042Loop ; Loop until the input buffer is empty or a timout of 65536 uS
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ret
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%endif
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%ifdef GENPAGE
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;
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; Find place for page table and create it
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;
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EFILDR_BASE: equ 0x2000 ; Offset to start of EFILDR block
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EFILDR_FILE_LENGTH equ 8 ; Dword in EFILDR_HEADER holding size of block
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EBDA_SEG: equ 0x40 ; Segment:Offset for finding the EBDA
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EBDA_OFFSET: equ 0xE
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CreatePageTable:
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mov edx, [EFILDR_BASE + EFILDR_FILE_LENGTH] ; Size of EFILDR block -> EDX
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add edx, EFILDR_BASE + 15 ; Add base
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shr edx, 4 ; And round up to multiple of 16
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mov ax, ds
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add dx, ax ; Add in linear base
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add dx, 255
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xor dl, dl ; And round up to page size
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; DX holds 16-bit segment of page table
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mov cx, ds ; Save DS
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mov ax, EBDA_SEG
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add dh, 6 ; Need 6 pages for table
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mov ds, ax
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mov ax, [EBDA_OFFSET] ; EBDA 16-bit segment now in AX
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mov ds, cx ; Restore DS
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cmp ax, dx ; Does page table fit under EBDA?
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jae .continue ; Yes, continue
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jmp PageTableError ; No, abort
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.continue:
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sub dh, 6 ; Restore DX to start segment of page table
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mov [PageTableSegment], dx ; Stash it for client
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push es
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push di ; Save ES:DI used to build page table
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mov es, dx
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xor di, di ; ES:DI points to start of page table
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inc dh ; Bump DX to next page
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;
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; Set up page table root page (only 1 entry)
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;
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xor eax, eax
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mov ax, dx
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inc dh ; Bump DX to next page
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shl eax, 4
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or al, 3
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stosd
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xor eax, eax
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mov cx, 2046
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rep stosw ; Wipe rest of 1st page
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;
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; Set up page table 2nd page (depth 1 - 4 entries)
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;
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mov cx, 4
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.loop1:
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mov ax, dx
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inc dh ; Bump DX to next page
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shl eax, 4
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or al, 3
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stosd
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xor eax, eax
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stosd
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loop .loop1
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mov cx, 2032 ; Wipe rest of 2nd page
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rep stosw
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;
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; Set up pages 3 - 6 (depth 2 - 2048 entries)
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;
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xor edx, edx ; Start at base of memory
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mov dl, 0x83 ; Flags at leaf nodes mark large pages (2MB each)
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mov cx, 2048
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.loop2:
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mov eax, edx
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add edx, 0x200000 ; Bump EDX to next large page
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stosd
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xor eax, eax
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stosd
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loop .loop2
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;
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; Done - restore ES:DI and return
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;
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pop di
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pop es
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ret
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;
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; Get here if not enough space between boot file
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; and bottom of the EBDA - print error and halt
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;
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PageTableError:
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add sp, 2 ; Clear return address of CreatePageTable
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mov bx, 15
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mov si, PageErrorMsg
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.loop:
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lodsb
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test al, al
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jz .halt
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mov ah, 14
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int 16
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jmp .loop
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.halt:
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hlt
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jmp .halt
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align 2, db 0
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PageTableSegment: dw 0
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PageErrorMsg: db 'Unable to Allocate Memory for Page Table', 0
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%endif
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;
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; Data
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;
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align 2, db 0
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gdtr:
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dw GDT_END - GDT_BASE - 1
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dd GDT_BASE
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;
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; global descriptor table (GDT)
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;
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align GDT_DESC_SIZE, db 0
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GDT_BASE:
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NULL_SEL: equ $ - GDT_BASE
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times GDT_DESC_SIZE db 0
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LINEAR_SEL: equ $ - GDT_BASE
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GDT_DESC 0x92, 0xCF
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LINEAR_CODE_SEL: equ $ - GDT_BASE
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GDT_DESC 0x9A, 0xCF
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SYS_DATA_SEL: equ $ - GDT_BASE
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GDT_DESC 0x92, 0xCF
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SYS_CODE_SEL: equ $ - GDT_BASE
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GDT_DESC 0x9A, 0xCF
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times GDT_DESC_SIZE db 0
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%ifdef X64
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SYS_DATA64_SEL: equ $ - GDT_BASE
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GDT_DESC 0x92, 0xCF
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SYS_CODE64_SEL: equ $ - GDT_BASE
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GDT_DESC 0x9A, 0xAF
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%else
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times GDT_DESC_SIZE db 0
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%endif
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times GDT_DESC_SIZE db 0
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GDT_END:
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align 2, db 0
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idtr:
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dw IDT_END - IDT_BASE - 1
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dd IDT_BASE
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%ifdef X64
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dd 0
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%endif
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;
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; interrupt descriptor table (IDT)
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;
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;
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; Note: The hardware IRQ's specified in this table are the normal PC/AT IRQ
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; mappings. This implementation only uses the system timer and all other
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; IRQs will remain masked.
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;
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align IDT_DESC_SIZE, db 0
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IDT_BASE:
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%rep 20 ; Exceptions 0 - 19
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IDT_DESC
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%endrep
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times 84 * IDT_DESC_SIZE db 0
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%rep 16 ; Interrupts IRQ0 - IRQ15 mapped to vectors 0x68 - 0x77
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IDT_DESC
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%endrep
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times IDT_DESC_SIZE db 0 ; padding
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IDT_END:
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align 4, db 0
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MemoryMapSize:
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dd 0
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MemoryMap:
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times SIZE_TO_STACK_16 - $ + $$ db 0
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MyStack:
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; below is the pieces of the IVT that is used to redirect INT 68h - 6fh
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; back to INT 08h - 0fh when in real mode... It is 'org'ed to a
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; known low address (20f00) so it can be set up by PlMapIrqToVect in
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; 8259.c
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%assign i 8
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%rep 8
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int i
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iret
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%assign i i+1
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%endrep
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times 0x1e - $ + MyStack db 0
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BlockSignature:
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dw 0xaa55
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