mirror of
https://github.com/CloverHackyColor/CloverBootloader.git
synced 2024-12-11 14:28:08 +01:00
84f41b2b58
Signed-off-by: Slice <sergey.slice@gmail.com>
243 lines
5.2 KiB
C
243 lines
5.2 KiB
C
/** @file
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Functions for processor information common to ARM and AARCH64.
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Copyright (c) 2021, NUVIA Inc. All rights reserved.<BR>
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Copyright (c) 2021 - 2022, Ampere Computing LLC. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include <Uefi.h>
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#include <IndustryStandard/ArmCache.h>
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#include <IndustryStandard/ArmStdSmc.h>
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#include <IndustryStandard/SmBios.h>
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#include <Library/ArmLib.h>
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#include <Library/ArmSmcLib.h>
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#include <Library/BaseMemoryLib.h>
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#include "SmbiosProcessor.h"
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/** Returns the maximum cache level implemented by the current CPU.
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@return The maximum cache level implemented.
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**/
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UINT8
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SmbiosProcessorGetMaxCacheLevel (
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VOID
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)
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{
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CLIDR_DATA Clidr;
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UINT8 CacheLevel;
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UINT8 MaxCacheLevel;
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MaxCacheLevel = 0;
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// Read the CLIDR register to find out what caches are present.
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Clidr.Data = ReadCLIDR ();
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// Get the cache type for the L1 cache. If it's 0, there are no caches.
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if (CLIDR_GET_CACHE_TYPE (Clidr.Data, 1) == ClidrCacheTypeNone) {
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return 0;
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}
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for (CacheLevel = 1; CacheLevel <= MAX_ARM_CACHE_LEVEL; CacheLevel++) {
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if (CLIDR_GET_CACHE_TYPE (Clidr.Data, CacheLevel) == ClidrCacheTypeNone) {
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MaxCacheLevel = CacheLevel;
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break;
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}
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}
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return MaxCacheLevel;
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}
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/** Returns whether or not the specified cache level has separate I/D caches.
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@param CacheLevel The cache level (L1, L2 etc.).
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@return TRUE if the cache level has separate I/D caches, FALSE otherwise.
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**/
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BOOLEAN
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SmbiosProcessorHasSeparateCaches (
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UINT8 CacheLevel
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)
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{
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CLIDR_CACHE_TYPE CacheType;
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CLIDR_DATA Clidr;
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BOOLEAN SeparateCaches;
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SeparateCaches = FALSE;
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Clidr.Data = ReadCLIDR ();
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CacheType = CLIDR_GET_CACHE_TYPE (Clidr.Data, CacheLevel - 1);
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if (CacheType == ClidrCacheTypeSeparate) {
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SeparateCaches = TRUE;
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}
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return SeparateCaches;
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}
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/** Checks if ther ARM64 SoC ID SMC call is supported
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@return Whether the ARM64 SoC ID call is supported.
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**/
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BOOLEAN
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HasSmcArm64SocId (
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VOID
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)
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{
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INT32 SmcCallStatus;
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BOOLEAN Arm64SocIdSupported;
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UINTN SmcParam;
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Arm64SocIdSupported = FALSE;
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SmcCallStatus = ArmCallSmc0 (SMCCC_VERSION, NULL, NULL, NULL);
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if ((SmcCallStatus < 0) || ((SmcCallStatus >> 16) >= 1)) {
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SmcParam = SMCCC_ARCH_SOC_ID;
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SmcCallStatus = ArmCallSmc1 (SMCCC_ARCH_FEATURES, &SmcParam, NULL, NULL);
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if (SmcCallStatus >= 0) {
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Arm64SocIdSupported = TRUE;
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}
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}
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return Arm64SocIdSupported;
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}
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/** Fetches the JEP106 code and SoC Revision.
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@param Jep106Code JEP 106 code.
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@param SocRevision SoC revision.
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@retval EFI_SUCCESS Succeeded.
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@retval EFI_UNSUPPORTED Failed.
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**/
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EFI_STATUS
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SmbiosGetSmcArm64SocId (
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OUT INT32 *Jep106Code,
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OUT INT32 *SocRevision
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)
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{
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INT32 SmcCallStatus;
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EFI_STATUS Status;
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UINTN SmcParam;
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Status = EFI_SUCCESS;
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SmcParam = 0;
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SmcCallStatus = ArmCallSmc1 (SMCCC_ARCH_SOC_ID, &SmcParam, NULL, NULL);
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if (SmcCallStatus >= 0) {
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*Jep106Code = SmcCallStatus;
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} else {
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Status = EFI_UNSUPPORTED;
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}
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SmcParam = 1;
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SmcCallStatus = ArmCallSmc1 (SMCCC_ARCH_SOC_ID, &SmcParam, NULL, NULL);
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if (SmcCallStatus >= 0) {
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*SocRevision = SmcCallStatus;
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} else {
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Status = EFI_UNSUPPORTED;
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}
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return Status;
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}
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/** Returns a value for the Processor ID field that conforms to SMBIOS
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requirements.
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@return Processor ID.
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**/
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UINT64
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SmbiosGetProcessorId (
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VOID
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)
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{
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INT32 Jep106Code;
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INT32 SocRevision;
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UINT64 ProcessorId;
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if (HasSmcArm64SocId ()) {
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SmbiosGetSmcArm64SocId (&Jep106Code, &SocRevision);
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ProcessorId = ((UINT64)SocRevision << 32) | Jep106Code;
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} else {
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ProcessorId = ArmReadMidr ();
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}
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return ProcessorId;
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}
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/** Returns the external clock frequency.
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@return The external clock frequency.
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**/
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UINTN
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SmbiosGetExternalClockFrequency (
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VOID
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)
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{
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return ArmReadCntFrq ();
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}
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/** Returns the SMBIOS ProcessorFamily field value.
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@return The value for the ProcessorFamily field.
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**/
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UINT8
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SmbiosGetProcessorFamily (
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VOID
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)
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{
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return ProcessorFamilyIndicatorFamily2;
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}
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/** Returns the ProcessorFamily2 field value.
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@return The value for the ProcessorFamily2 field.
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**/
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UINT16
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SmbiosGetProcessorFamily2 (
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VOID
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)
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{
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UINTN MainIdRegister;
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UINT16 ProcessorFamily2;
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MainIdRegister = ArmReadMidr ();
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if (((MainIdRegister >> 16) & 0xF) < 8) {
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ProcessorFamily2 = ProcessorFamilyARM;
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} else {
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if (sizeof (VOID *) == 4) {
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ProcessorFamily2 = ProcessorFamilyARMv7;
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} else {
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ProcessorFamily2 = ProcessorFamilyARMv8;
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}
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}
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return ProcessorFamily2;
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}
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/** Returns the SMBIOS Processor Characteristics.
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@return Processor Characteristics bitfield.
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**/
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PROCESSOR_CHARACTERISTIC_FLAGS
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SmbiosGetProcessorCharacteristics (
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VOID
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)
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{
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PROCESSOR_CHARACTERISTIC_FLAGS Characteristics;
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ZeroMem (&Characteristics, sizeof (Characteristics));
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Characteristics.ProcessorArm64SocId = HasSmcArm64SocId ();
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return Characteristics;
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}
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