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https://github.com/CloverHackyColor/CloverBootloader.git
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329 lines
10 KiB
C
329 lines
10 KiB
C
/** @file
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Private Header file for Usb Host Controller PEIM
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Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef _RECOVERY_EHC_H_
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#define _RECOVERY_EHC_H_
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#include <PiPei.h>
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#include <Ppi/UsbController.h>
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#include <Ppi/Usb2HostController.h>
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#include <Ppi/IoMmu.h>
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#include <Ppi/EndOfPeiPhase.h>
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#include <Library/DebugLib.h>
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#include <Library/PeimEntryPoint.h>
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#include <Library/PeiServicesLib.h>
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#include <Library/BaseMemoryLib.h>
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#include <Library/TimerLib.h>
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#include <Library/IoLib.h>
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typedef struct _PEI_USB2_HC_DEV PEI_USB2_HC_DEV;
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#define EFI_LIST_ENTRY LIST_ENTRY
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#include "UsbHcMem.h"
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#include "EhciReg.h"
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#include "EhciUrb.h"
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#include "EhciSched.h"
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#define EFI_USB_SPEED_FULL 0x0000
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#define EFI_USB_SPEED_LOW 0x0001
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#define EFI_USB_SPEED_HIGH 0x0002
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#define PAGESIZE 4096
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#define EHC_1_MICROSECOND 1
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#define EHC_1_MILLISECOND (1000 * EHC_1_MICROSECOND)
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#define EHC_1_SECOND (1000 * EHC_1_MILLISECOND)
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//
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// EHCI register operation timeout, set by experience
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//
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#define EHC_RESET_TIMEOUT (1 * EHC_1_SECOND)
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#define EHC_GENERIC_TIMEOUT (10 * EHC_1_MILLISECOND)
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//
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// Wait for roothub port power stable, refers to Spec[EHCI1.0-2.3.9]
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//
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#define EHC_ROOT_PORT_RECOVERY_STALL (20 * EHC_1_MILLISECOND)
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//
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// Sync transfer polling interval, set by experience.
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//
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#define EHC_SYNC_POLL_INTERVAL (6 * EHC_1_MILLISECOND)
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//
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//Iterate through the double linked list. NOT delete safe
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//
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#define EFI_LIST_FOR_EACH(Entry, ListHead) \
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for(Entry = (ListHead)->ForwardLink; Entry != (ListHead); Entry = Entry->ForwardLink)
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//
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//Iterate through the double linked list. This is delete-safe.
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//Don't touch NextEntry
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//
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#define EFI_LIST_FOR_EACH_SAFE(Entry, NextEntry, ListHead) \
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for(Entry = (ListHead)->ForwardLink, NextEntry = Entry->ForwardLink;\
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Entry != (ListHead); Entry = NextEntry, NextEntry = Entry->ForwardLink)
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#define EFI_LIST_CONTAINER(Entry, Type, Field) BASE_CR(Entry, Type, Field)
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#define EHC_LOW_32BIT(Addr64) ((UINT32)(((UINTN)(Addr64)) & 0XFFFFFFFF))
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#define EHC_HIGH_32BIT(Addr64) ((UINT32)(RShiftU64((UINTN)(Addr64), 32) & 0XFFFFFFFF))
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#define EHC_BIT_IS_SET(Data, Bit) ((BOOLEAN)(((Data) & (Bit)) == (Bit)))
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#define EHC_REG_BIT_IS_SET(Ehc, Offset, Bit) \
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(EHC_BIT_IS_SET(EhcReadOpReg ((Ehc), (Offset)), (Bit)))
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#define USB2_HC_DEV_SIGNATURE SIGNATURE_32 ('e', 'h', 'c', 'i')
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struct _PEI_USB2_HC_DEV {
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UINTN Signature;
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PEI_USB2_HOST_CONTROLLER_PPI Usb2HostControllerPpi;
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EDKII_IOMMU_PPI *IoMmu;
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EFI_PEI_PPI_DESCRIPTOR PpiDescriptor;
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//
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// EndOfPei callback is used to stop the EHC DMA operation
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// after exit PEI phase.
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//
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EFI_PEI_NOTIFY_DESCRIPTOR EndOfPeiNotifyList;
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UINT32 UsbHostControllerBaseAddress;
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PEI_URB *Urb;
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USBHC_MEM_POOL *MemPool;
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//
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// Schedule data shared between asynchronous and periodic
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// transfers:
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// ShortReadStop, as its name indicates, is used to terminate
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// the short read except the control transfer. EHCI follows
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// the alternative next QTD point when a short read happens.
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// For control transfer, even the short read happens, try the
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// status stage.
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//
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PEI_EHC_QTD *ShortReadStop;
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EFI_EVENT PollTimer;
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//
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// Asynchronous(bulk and control) transfer schedule data:
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// ReclaimHead is used as the head of the asynchronous transfer
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// list. It acts as the reclamation header.
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//
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PEI_EHC_QH *ReclaimHead;
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//
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// Periodic (interrupt) transfer schedule data:
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//
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VOID *PeriodFrame; // Mapped as common buffer
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VOID *PeriodFrameMap;
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PEI_EHC_QH *PeriodOne;
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EFI_LIST_ENTRY AsyncIntTransfers;
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//
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// EHCI configuration data
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//
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UINT32 HcStructParams; // Cache of HC structure parameter, EHC_HCSPARAMS_OFFSET
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UINT32 HcCapParams; // Cache of HC capability parameter, HCCPARAMS
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UINT32 CapLen; // Capability length
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UINT32 High32bitAddr;
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};
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#define PEI_RECOVERY_USB_EHC_DEV_FROM_EHCI_THIS(a) CR (a, PEI_USB2_HC_DEV, Usb2HostControllerPpi, USB2_HC_DEV_SIGNATURE)
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#define PEI_RECOVERY_USB_EHC_DEV_FROM_THIS_NOTIFY(a) CR (a, PEI_USB2_HC_DEV, EndOfPeiNotifyList, USB2_HC_DEV_SIGNATURE)
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/**
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@param EhcDev EHCI Device.
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@retval EFI_SUCCESS EHCI successfully initialized.
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@retval EFI_ABORTED EHCI was failed to be initialized.
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**/
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EFI_STATUS
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InitializeUsbHC (
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IN PEI_USB2_HC_DEV *EhcDev
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);
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/**
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Initialize the memory management pool for the host controller.
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@param Ehc The EHCI device.
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@param Check4G Whether the host controller requires allocated memory
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from one 4G address space.
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@param Which4G The 4G memory area each memory allocated should be from.
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@retval EFI_SUCCESS The memory pool is initialized.
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@retval EFI_OUT_OF_RESOURCE Fail to init the memory pool.
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**/
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USBHC_MEM_POOL *
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UsbHcInitMemPool (
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IN PEI_USB2_HC_DEV *Ehc,
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IN BOOLEAN Check4G,
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IN UINT32 Which4G
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)
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;
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/**
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Release the memory management pool.
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@param Ehc The EHCI device.
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@param Pool The USB memory pool to free.
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@retval EFI_DEVICE_ERROR Fail to free the memory pool.
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@retval EFI_SUCCESS The memory pool is freed.
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**/
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EFI_STATUS
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UsbHcFreeMemPool (
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IN PEI_USB2_HC_DEV *Ehc,
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IN USBHC_MEM_POOL *Pool
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)
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;
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/**
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Allocate some memory from the host controller's memory pool
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which can be used to communicate with host controller.
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@param Ehc The EHCI device.
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@param Pool The host controller's memory pool.
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@param Size Size of the memory to allocate.
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@return The allocated memory or NULL.
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**/
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VOID *
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UsbHcAllocateMem (
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IN PEI_USB2_HC_DEV *Ehc,
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IN USBHC_MEM_POOL *Pool,
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IN UINTN Size
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)
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;
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/**
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Free the allocated memory back to the memory pool.
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@param Ehc The EHCI device.
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@param Pool The memory pool of the host controller.
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@param Mem The memory to free.
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@param Size The size of the memory to free.
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**/
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VOID
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UsbHcFreeMem (
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IN PEI_USB2_HC_DEV *Ehc,
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IN USBHC_MEM_POOL *Pool,
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IN VOID *Mem,
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IN UINTN Size
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)
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;
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/**
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Provides the controller-specific addresses required to access system memory from a
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DMA bus master.
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@param IoMmu Pointer to IOMMU PPI.
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@param Operation Indicates if the bus master is going to read or write to system memory.
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@param HostAddress The system memory address to map to the PCI controller.
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@param NumberOfBytes On input the number of bytes to map. On output the number of bytes
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that were mapped.
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@param DeviceAddress The resulting map address for the bus master PCI controller to use to
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access the hosts HostAddress.
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@param Mapping A resulting value to pass to Unmap().
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@retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.
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@retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a common buffer.
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@retval EFI_INVALID_PARAMETER One or more parameters are invalid.
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@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
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@retval EFI_DEVICE_ERROR The system hardware could not map the requested address.
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**/
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EFI_STATUS
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IoMmuMap (
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IN EDKII_IOMMU_PPI *IoMmu,
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IN EDKII_IOMMU_OPERATION Operation,
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IN VOID *HostAddress,
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IN OUT UINTN *NumberOfBytes,
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OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
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OUT VOID **Mapping
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);
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/**
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Completes the Map() operation and releases any corresponding resources.
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@param IoMmu Pointer to IOMMU PPI.
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@param Mapping The mapping value returned from Map().
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**/
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VOID
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IoMmuUnmap (
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IN EDKII_IOMMU_PPI *IoMmu,
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IN VOID *Mapping
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);
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/**
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Allocates pages that are suitable for an OperationBusMasterCommonBuffer or
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OperationBusMasterCommonBuffer64 mapping.
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@param IoMmu Pointer to IOMMU PPI.
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@param Pages The number of pages to allocate.
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@param HostAddress A pointer to store the base system memory address of the
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allocated range.
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@param DeviceAddress The resulting map address for the bus master PCI controller to use to
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access the hosts HostAddress.
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@param Mapping A resulting value to pass to Unmap().
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@retval EFI_SUCCESS The requested memory pages were allocated.
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@retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are
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MEMORY_WRITE_COMBINE and MEMORY_CACHED.
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@retval EFI_INVALID_PARAMETER One or more parameters are invalid.
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@retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.
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**/
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EFI_STATUS
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IoMmuAllocateBuffer (
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IN EDKII_IOMMU_PPI *IoMmu,
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IN UINTN Pages,
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OUT VOID **HostAddress,
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OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
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OUT VOID **Mapping
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);
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/**
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Frees memory that was allocated with AllocateBuffer().
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@param IoMmu Pointer to IOMMU PPI.
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@param Pages The number of pages to free.
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@param HostAddress The base system memory address of the allocated range.
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@param Mapping The mapping value returned from Map().
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**/
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VOID
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IoMmuFreeBuffer (
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IN EDKII_IOMMU_PPI *IoMmu,
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IN UINTN Pages,
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IN VOID *HostAddress,
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IN VOID *Mapping
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);
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/**
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Initialize IOMMU.
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@param IoMmu Pointer to pointer to IOMMU PPI.
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**/
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VOID
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IoMmuInit (
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OUT EDKII_IOMMU_PPI **IoMmu
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);
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#endif
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