36 lines
793 B
C
36 lines
793 B
C
/** @file
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*
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* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-2-Clause-Patent
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*
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**/
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#include <Uefi.h>
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#include <Library/IoLib.h>
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#include <Library/ArmGicLib.h>
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VOID
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EFIAPI
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ArmGicV2EnableInterruptInterface (
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IN INTN GicInterruptInterfaceBase
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)
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{
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/*
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* Enable the CPU interface in Non-Secure world
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* Note: The ICCICR register is banked when Security extensions are implemented
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*/
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MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCICR, 0x1);
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}
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VOID
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EFIAPI
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ArmGicV2DisableInterruptInterface (
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IN INTN GicInterruptInterfaceBase
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)
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{
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// Disable Gic Interface
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MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCICR, 0x0);
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MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCPMR, 0x0);
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}
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