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106 lines
2.2 KiB
ArmAsm
106 lines
2.2 KiB
ArmAsm
#------------------------------------------------------------------------------
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#
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# Copyright (c) 2016, Linaro Limited. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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#
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#------------------------------------------------------------------------------
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#include <AsmMacroIoLibV8.h>
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.set CTRL_M_BIT, (1 << 0)
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.macro __replace_entry, el
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// check whether we should disable the MMU
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cbz x3, .L1_\@
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// clean and invalidate first so that we don't clobber
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// adjacent entries that are dirty in the caches
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dc civac, x0
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dsb nsh
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// disable the MMU
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mrs x8, sctlr_el\el
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bic x9, x8, #CTRL_M_BIT
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msr sctlr_el\el, x9
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isb
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// write updated entry
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str x1, [x0]
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// invalidate again to get rid of stale clean cachelines that may
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// have been filled speculatively since the last invalidate
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dmb sy
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dc ivac, x0
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// flush translations for the target address from the TLBs
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lsr x2, x2, #12
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.if \el == 1
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tlbi vaae1, x2
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.else
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tlbi vae\el, x2
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.endif
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dsb nsh
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// re-enable the MMU
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msr sctlr_el\el, x8
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isb
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b .L2_\@
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.L1_\@:
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// write invalid entry
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str xzr, [x0]
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dsb nshst
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// flush translations for the target address from the TLBs
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lsr x2, x2, #12
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.if \el == 1
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tlbi vaae1, x2
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.else
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tlbi vae\el, x2
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.endif
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dsb nsh
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// write updated entry
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str x1, [x0]
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dsb nshst
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.L2_\@:
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.endm
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// Align this routine to a log2 upper bound of its size, so that it is
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// guaranteed not to cross a page or block boundary.
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.balign 0x200
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//VOID
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//ArmReplaceLiveTranslationEntry (
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// IN UINT64 *Entry,
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// IN UINT64 Value,
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// IN UINT64 Address
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// )
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ASM_FUNC(ArmReplaceLiveTranslationEntry)
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// disable interrupts
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mrs x4, daif
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msr daifset, #0xf
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isb
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EL1_OR_EL2_OR_EL3(x5)
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1:__replace_entry 1
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b 4f
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2:__replace_entry 2
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b 4f
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3:__replace_entry 3
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4:msr daif, x4
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ret
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ASM_GLOBAL ASM_PFX(ArmReplaceLiveTranslationEntrySize)
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ASM_PFX(ArmReplaceLiveTranslationEntrySize):
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.long . - ArmReplaceLiveTranslationEntry
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// Double check that we did not overrun the assumed maximum size
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.org ArmReplaceLiveTranslationEntry + 0x200
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