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74 lines
1.6 KiB
C
74 lines
1.6 KiB
C
/** @file
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Support for PCI 3.0 standard.
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Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef __PCI30_H__
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#define __PCI30_H__
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#include <IndustryStandard/Pci23.h>
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///
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/// PCI_CLASS_MASS_STORAGE, Base Class 01h.
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///
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///@{
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#define PCI_CLASS_MASS_STORAGE_SATADPA 0x06
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#define PCI_IF_MASS_STORAGE_SATA 0x00
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#define PCI_IF_MASS_STORAGE_AHCI 0x01
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///@}
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///
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/// PCI_CLASS_WIRELESS, Base Class 0Dh.
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///
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///@{
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#define PCI_SUBCLASS_ETHERNET_80211A 0x20
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#define PCI_SUBCLASS_ETHERNET_80211B 0x21
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///@}
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/**
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Macro that checks whether device is a SATA controller.
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@param _p Specified device.
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@retval TRUE Device is a SATA controller.
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@retval FALSE Device is not a SATA controller.
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**/
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#define IS_PCI_SATADPA(_p) IS_CLASS2 (_p, PCI_CLASS_MASS_STORAGE, PCI_CLASS_MASS_STORAGE_SATADPA)
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///
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/// PCI Capability List IDs and records
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///
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#define EFI_PCI_CAPABILITY_ID_PCIEXP 0x10
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#pragma pack(1)
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///
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/// PCI Data Structure Format
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/// Section 5.1.2, PCI Firmware Specification, Revision 3.0
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///
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typedef struct {
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UINT32 Signature; ///< "PCIR"
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UINT16 VendorId;
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UINT16 DeviceId;
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UINT16 DeviceListOffset;
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UINT16 Length;
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UINT8 Revision;
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UINT8 ClassCode[3];
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UINT16 ImageLength;
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UINT16 CodeRevision;
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UINT8 CodeType;
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UINT8 Indicator;
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UINT16 MaxRuntimeImageLength;
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UINT16 ConfigUtilityCodeHeaderOffset;
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UINT16 DMTFCLPEntryPointOffset;
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} PCI_3_0_DATA_STRUCTURE;
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#pragma pack()
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#endif
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