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34 lines
916 B
NASM
34 lines
916 B
NASM
;------------------------------------------------------------------------------
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;
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; CpuBreakpoint() for AArch64
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;
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; Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
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; Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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; Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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;
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;------------------------------------------------------------------------------
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EXPORT CpuBreakpoint
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AREA BaseLib_LowLevel, CODE, READONLY
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;/**
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; Generates a breakpoint on the CPU.
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;
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; Generates a breakpoint on the CPU. The breakpoint must be implemented such
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; that code can resume normal execution after the breakpoint.
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;
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;**/
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;VOID
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;EFIAPI
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;CpuBreakpoint (
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; VOID
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; );
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;
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CpuBreakpoint
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svc 0xdbdb // Superviser exception. Takes 16bit arg -> Armv7 had 'swi' here.
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ret
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END
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