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364 lines
8.6 KiB
NASM
364 lines
8.6 KiB
NASM
TITLE CpuAsm.asm:
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;------------------------------------------------------------------------------
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;*
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;* Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
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;* This program and the accompanying materials
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;* are licensed and made available under the terms and conditions of the BSD License
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;* which accompanies this distribution. The full text of the license may be found at
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;* http://opensource.org/licenses/bsd-license.php
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;*
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;* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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;* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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;*
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;* CpuAsm.asm
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;*
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;* Abstract:
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;*
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;------------------------------------------------------------------------------
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.686
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.model flat,C
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.code
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EXTRN mErrorCodeFlag:DWORD ; Error code flags for exceptions
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;
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; point to the external interrupt vector table
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;
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ExternalVectorTablePtr DWORD 0
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InitializeExternalVectorTablePtr PROC PUBLIC
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mov eax, [esp+4]
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mov ExternalVectorTablePtr, eax
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ret
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InitializeExternalVectorTablePtr ENDP
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;------------------------------------------------------------------------------
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; VOID
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; SetCodeSelector (
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; UINT16 Selector
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; );
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;------------------------------------------------------------------------------
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SetCodeSelector PROC PUBLIC
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mov ecx, [esp+4]
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sub esp, 0x10
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lea eax, setCodeSelectorLongJump
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mov [esp], eax
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mov [esp+4], cx
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jmp fword ptr [esp]
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setCodeSelectorLongJump:
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add esp, 0x10
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ret
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SetCodeSelector ENDP
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;------------------------------------------------------------------------------
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; VOID
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; SetDataSelectors (
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; UINT16 Selector
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; );
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;------------------------------------------------------------------------------
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SetDataSelectors PROC PUBLIC
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mov ecx, [esp+4]
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mov ss, cx
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mov ds, cx
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mov es, cx
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mov fs, cx
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mov gs, cx
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ret
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SetDataSelectors ENDP
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;---------------------------------------;
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; CommonInterruptEntry ;
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;---------------------------------------;
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; The follow algorithm is used for the common interrupt routine.
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CommonInterruptEntry PROC PUBLIC
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cli
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;
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; All interrupt handlers are invoked through interrupt gates, so
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; IF flag automatically cleared at the entry point
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;
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;
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; Calculate vector number
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;
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; Get the return address of call, actually, it is the
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; address of vector number.
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;
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xchg ecx, [esp]
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mov cx, [ecx]
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and ecx, 0FFFFh
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cmp ecx, 32 ; Intel reserved vector for exceptions?
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jae NoErrorCode
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bt mErrorCodeFlag, ecx
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jc HasErrorCode
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NoErrorCode:
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;
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; Stack:
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; +---------------------+
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; + EFlags +
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; +---------------------+
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; + CS +
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; +---------------------+
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; + EIP +
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; +---------------------+
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; + ECX +
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; +---------------------+ <-- ESP
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;
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; Registers:
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; ECX - Vector Number
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;
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;
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; Put Vector Number on stack
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;
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push ecx
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;
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; Put 0 (dummy) error code on stack, and restore ECX
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;
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xor ecx, ecx ; ECX = 0
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xchg ecx, [esp+4]
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jmp ErrorCodeAndVectorOnStack
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HasErrorCode:
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;
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; Stack:
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; +---------------------+
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; + EFlags +
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; +---------------------+
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; + CS +
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; +---------------------+
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; + EIP +
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; +---------------------+
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; + Error Code +
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; +---------------------+
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; + ECX +
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; +---------------------+ <-- ESP
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;
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; Registers:
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; ECX - Vector Number
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;
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;
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; Put Vector Number on stack and restore ECX
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;
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xchg ecx, [esp]
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ErrorCodeAndVectorOnStack:
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push ebp
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mov ebp, esp
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;
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; Stack:
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; +---------------------+
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; + EFlags +
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; +---------------------+
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; + CS +
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; +---------------------+
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; + EIP +
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; +---------------------+
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; + Error Code +
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; +---------------------+
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; + Vector Number +
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; +---------------------+
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; + EBP +
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; +---------------------+ <-- EBP
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;
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;
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; Align stack to make sure that EFI_FX_SAVE_STATE_IA32 of EFI_SYSTEM_CONTEXT_IA32
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; is 16-byte aligned
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;
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and esp, 0fffffff0h
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sub esp, 12
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;; UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;
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push eax
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push ecx
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push edx
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push ebx
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lea ecx, [ebp + 6 * 4]
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push ecx ; ESP
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push dword ptr [ebp] ; EBP
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push esi
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push edi
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;; UINT32 Gs, Fs, Es, Ds, Cs, Ss;
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mov eax, ss
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push eax
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movzx eax, word ptr [ebp + 4 * 4]
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push eax
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mov eax, ds
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push eax
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mov eax, es
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push eax
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mov eax, fs
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push eax
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mov eax, gs
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push eax
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;; UINT32 Eip;
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mov eax, [ebp + 3 * 4]
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push eax
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;; UINT32 Gdtr[2], Idtr[2];
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sub esp, 8
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sidt [esp]
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mov eax, [esp + 2]
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xchg eax, [esp]
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and eax, 0FFFFh
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mov [esp+4], eax
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sub esp, 8
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sgdt [esp]
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mov eax, [esp + 2]
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xchg eax, [esp]
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and eax, 0FFFFh
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mov [esp+4], eax
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;; UINT32 Ldtr, Tr;
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xor eax, eax
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str ax
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push eax
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sldt ax
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push eax
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;; UINT32 EFlags;
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mov eax, [ebp + 5 * 4]
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push eax
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;; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;
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mov eax, cr4
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or eax, 208h
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mov cr4, eax
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push eax
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mov eax, cr3
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push eax
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mov eax, cr2
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push eax
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xor eax, eax
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push eax
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mov eax, cr0
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push eax
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;; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
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mov eax, dr7
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push eax
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mov eax, dr6
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push eax
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mov eax, dr3
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push eax
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mov eax, dr2
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push eax
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mov eax, dr1
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push eax
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mov eax, dr0
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push eax
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;; FX_SAVE_STATE_IA32 FxSaveState;
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sub esp, 512
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mov edi, esp
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db 0fh, 0aeh, 07h ;fxsave [edi]
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;; UEFI calling convention for IA32 requires that Direction flag in EFLAGs is clear
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cld
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;; UINT32 ExceptionData;
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push dword ptr [ebp + 2 * 4]
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;; call into exception handler
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mov eax, ExternalVectorTablePtr ; get the interrupt vectors base
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or eax, eax ; NULL?
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jz nullExternalExceptionHandler
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mov ecx, [ebp + 4]
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mov eax, [eax + ecx * 4]
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or eax, eax ; NULL?
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jz nullExternalExceptionHandler
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;; Prepare parameter and call
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mov edx, esp
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push edx
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mov edx, dword ptr [ebp + 1 * 4]
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push edx
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;
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; Call External Exception Handler
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;
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call eax
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add esp, 8
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nullExternalExceptionHandler:
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cli
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;; UINT32 ExceptionData;
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add esp, 4
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;; FX_SAVE_STATE_IA32 FxSaveState;
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mov esi, esp
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db 0fh, 0aeh, 0eh ; fxrstor [esi]
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add esp, 512
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;; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
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;; Skip restoration of DRx registers to support in-circuit emualators
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;; or debuggers set breakpoint in interrupt/exception context
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add esp, 4 * 6
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;; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;
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pop eax
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mov cr0, eax
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add esp, 4 ; not for Cr1
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pop eax
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mov cr2, eax
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pop eax
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mov cr3, eax
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pop eax
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mov cr4, eax
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;; UINT32 EFlags;
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pop dword ptr [ebp + 5 * 4]
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;; UINT32 Ldtr, Tr;
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;; UINT32 Gdtr[2], Idtr[2];
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;; Best not let anyone mess with these particular registers...
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add esp, 24
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;; UINT32 Eip;
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pop dword ptr [ebp + 3 * 4]
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;; UINT32 Gs, Fs, Es, Ds, Cs, Ss;
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;; NOTE - modified segment registers could hang the debugger... We
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;; could attempt to insulate ourselves against this possibility,
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;; but that poses risks as well.
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;;
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pop gs
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pop fs
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pop es
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pop ds
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pop dword ptr [ebp + 4 * 4]
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pop ss
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;; UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;
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pop edi
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pop esi
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add esp, 4 ; not for ebp
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add esp, 4 ; not for esp
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pop ebx
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pop edx
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pop ecx
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pop eax
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mov esp, ebp
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pop ebp
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add esp, 8
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iretd
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CommonInterruptEntry ENDP
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END
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