mirror of
https://github.com/CloverHackyColor/CloverBootloader.git
synced 2024-12-17 15:18:06 +01:00
7c0aa811ec
Signed-off-by: Sergey Isakov <isakov-sl@bk.ru>
293 lines
8.7 KiB
C
293 lines
8.7 KiB
C
/** @file
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CPU DXE Module.
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Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#ifndef _CPU_DXE_H_
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#define _CPU_DXE_H_
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#include <PiDxe.h>
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#include <Protocol/Cpu.h>
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#include <Library/UefiDriverEntryPoint.h>
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#include <Library/UefiBootServicesTableLib.h>
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#include <Library/DxeServicesTableLib.h>
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#include <Library/BaseLib.h>
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#include <Library/CpuLib.h>
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#include <Library/BaseMemoryLib.h>
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#include <Library/MemoryAllocationLib.h>
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#include <Library/DebugLib.h>
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#include <Library/MtrrLib.h>
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#include <Library/LocalApicLib.h>
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#include <Library/UefiCpuLib.h>
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#include <Guid/IdleLoopEvent.h>
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//
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//
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//
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#define INTERRUPT_VECTOR_NUMBER 256
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#define EFI_MEMORY_CACHETYPE_MASK (EFI_MEMORY_UC | \
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EFI_MEMORY_WC | \
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EFI_MEMORY_WT | \
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EFI_MEMORY_WB | \
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EFI_MEMORY_UCE \
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)
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/**
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Flush CPU data cache. If the instruction cache is fully coherent
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with all DMA operations then function can just return EFI_SUCCESS.
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@param This Protocol instance structure
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@param Start Physical address to start flushing from.
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@param Length Number of bytes to flush. Round up to chipset
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granularity.
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@param FlushType Specifies the type of flush operation to perform.
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@retval EFI_SUCCESS If cache was flushed
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@retval EFI_UNSUPPORTED If flush type is not supported.
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@retval EFI_DEVICE_ERROR If requested range could not be flushed.
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**/
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EFI_STATUS
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EFIAPI
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CpuFlushCpuDataCache (
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IN EFI_CPU_ARCH_PROTOCOL *This,
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IN EFI_PHYSICAL_ADDRESS Start,
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IN UINT64 Length,
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IN EFI_CPU_FLUSH_TYPE FlushType
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);
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/**
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Enables CPU interrupts.
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@param This Protocol instance structure
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@retval EFI_SUCCESS If interrupts were enabled in the CPU
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@retval EFI_DEVICE_ERROR If interrupts could not be enabled on the CPU.
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**/
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EFI_STATUS
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EFIAPI
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CpuEnableInterrupt (
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IN EFI_CPU_ARCH_PROTOCOL *This
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);
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/**
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Disables CPU interrupts.
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@param This Protocol instance structure
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@retval EFI_SUCCESS If interrupts were disabled in the CPU.
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@retval EFI_DEVICE_ERROR If interrupts could not be disabled on the CPU.
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**/
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EFI_STATUS
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EFIAPI
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CpuDisableInterrupt (
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IN EFI_CPU_ARCH_PROTOCOL *This
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);
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/**
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Return the state of interrupts.
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@param This Protocol instance structure
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@param State Pointer to the CPU's current interrupt state
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@retval EFI_SUCCESS If interrupts were disabled in the CPU.
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@retval EFI_INVALID_PARAMETER State is NULL.
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**/
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EFI_STATUS
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EFIAPI
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CpuGetInterruptState (
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IN EFI_CPU_ARCH_PROTOCOL *This,
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OUT BOOLEAN *State
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);
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/**
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Generates an INIT to the CPU.
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@param This Protocol instance structure
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@param InitType Type of CPU INIT to perform
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@retval EFI_SUCCESS If CPU INIT occurred. This value should never be
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seen.
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@retval EFI_DEVICE_ERROR If CPU INIT failed.
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@retval EFI_UNSUPPORTED Requested type of CPU INIT not supported.
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**/
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EFI_STATUS
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EFIAPI
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CpuInit (
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IN EFI_CPU_ARCH_PROTOCOL *This,
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IN EFI_CPU_INIT_TYPE InitType
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);
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/**
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Registers a function to be called from the CPU interrupt handler.
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@param This Protocol instance structure
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@param InterruptType Defines which interrupt to hook. IA-32
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valid range is 0x00 through 0xFF
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@param InterruptHandler A pointer to a function of type
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EFI_CPU_INTERRUPT_HANDLER that is called
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when a processor interrupt occurs. A null
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pointer is an error condition.
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@retval EFI_SUCCESS If handler installed or uninstalled.
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@retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler
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for InterruptType was previously installed.
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@retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for
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InterruptType was not previously installed.
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@retval EFI_UNSUPPORTED The interrupt specified by InterruptType
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is not supported.
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**/
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EFI_STATUS
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EFIAPI
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CpuRegisterInterruptHandler (
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IN EFI_CPU_ARCH_PROTOCOL *This,
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IN EFI_EXCEPTION_TYPE InterruptType,
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IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
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);
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/**
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Returns a timer value from one of the CPU's internal timers. There is no
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inherent time interval between ticks but is a function of the CPU frequency.
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@param This - Protocol instance structure.
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@param TimerIndex - Specifies which CPU timer is requested.
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@param TimerValue - Pointer to the returned timer value.
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@param TimerPeriod - A pointer to the amount of time that passes
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in femtoseconds (10-15) for each increment
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of TimerValue. If TimerValue does not
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increment at a predictable rate, then 0 is
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returned. The amount of time that has
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passed between two calls to GetTimerValue()
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can be calculated with the formula
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(TimerValue2 - TimerValue1) * TimerPeriod.
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This parameter is optional and may be NULL.
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@retval EFI_SUCCESS - If the CPU timer count was returned.
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@retval EFI_UNSUPPORTED - If the CPU does not have any readable timers.
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@retval EFI_DEVICE_ERROR - If an error occurred while reading the timer.
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@retval EFI_INVALID_PARAMETER - TimerIndex is not valid or TimerValue is NULL.
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**/
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EFI_STATUS
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EFIAPI
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CpuGetTimerValue (
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IN EFI_CPU_ARCH_PROTOCOL *This,
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IN UINT32 TimerIndex,
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OUT UINT64 *TimerValue,
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OUT UINT64 *TimerPeriod OPTIONAL
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);
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/**
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Set memory cacheability attributes for given range of memeory.
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@param This Protocol instance structure
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@param BaseAddress Specifies the start address of the
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memory range
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@param Length Specifies the length of the memory range
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@param Attributes The memory cacheability for the memory range
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@retval EFI_SUCCESS If the cacheability of that memory range is
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set successfully
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@retval EFI_UNSUPPORTED If the desired operation cannot be done
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@retval EFI_INVALID_PARAMETER The input parameter is not correct,
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such as Length = 0
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**/
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EFI_STATUS
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EFIAPI
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CpuSetMemoryAttributes (
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IN EFI_CPU_ARCH_PROTOCOL *This,
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IN EFI_PHYSICAL_ADDRESS BaseAddress,
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IN UINT64 Length,
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IN UINT64 Attributes
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);
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/**
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Label of base address of IDT vector 0.
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This is just a label of base address of IDT vector 0.
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**/
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VOID
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EFIAPI
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AsmIdtVector00 (
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VOID
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);
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/**
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Initializes the pointer to the external interrupt vector table.
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@param VectorTable Address of the external interrupt vector table.
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**/
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VOID
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EFIAPI
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InitializeExternalVectorTablePtr (
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EFI_CPU_INTERRUPT_HANDLER *VectorTable
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);
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/**
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Initialize Global Descriptor Table.
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**/
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VOID
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InitGlobalDescriptorTable (
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VOID
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);
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/**
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Sets the code selector (CS).
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@param Selector Value of code selector.
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**/
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VOID
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EFIAPI
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SetCodeSelector (
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UINT16 Selector
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);
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/**
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Sets the data selector (DS).
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@param Selector Value of data selector.
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**/
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VOID
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EFIAPI
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SetDataSelectors (
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UINT16 Selector
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);
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/**
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Restore original Interrupt Descriptor Table Handler Address.
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@param Index The Index of the interrupt descriptor table handle.
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**/
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VOID
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RestoreInterruptDescriptorTableHandlerAddress (
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IN UINTN Index
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);
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#endif
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