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135 lines
4.6 KiB
C
135 lines
4.6 KiB
C
/*
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* SPDX-License-Identifier: MIT
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*/
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#ifndef __XEN_PUBLIC_HVM_PARAMS_H__
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#define __XEN_PUBLIC_HVM_PARAMS_H__
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#include "hvm_op.h"
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/*
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* Parameter space for HVMOP_{set,get}_param.
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*/
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/*
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* How should CPU0 event-channel notifications be delivered?
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* val[63:56] == 0: val[55:0] is a delivery GSI (Global System Interrupt).
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* val[63:56] == 1: val[55:0] is a delivery PCI INTx line, as follows:
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* Domain = val[47:32], Bus = val[31:16],
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* DevFn = val[15: 8], IntX = val[ 1: 0]
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* val[63:56] == 2: val[7:0] is a vector number, check for
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* XENFEAT_hvm_callback_vector to know if this delivery
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* method is available.
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* If val == 0 then CPU0 event-channel notifications are not delivered.
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*/
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#define HVM_PARAM_CALLBACK_IRQ 0
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/*
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* These are not used by Xen. They are here for convenience of HVM-guest
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* xenbus implementations.
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*/
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#define HVM_PARAM_STORE_PFN 1
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#define HVM_PARAM_STORE_EVTCHN 2
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#define HVM_PARAM_PAE_ENABLED 4
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#define HVM_PARAM_IOREQ_PFN 5
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#define HVM_PARAM_BUFIOREQ_PFN 6
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#define HVM_PARAM_BUFIOREQ_EVTCHN 26
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#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
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/* Expose Viridian interfaces to this HVM guest? */
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#define HVM_PARAM_VIRIDIAN 9
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#endif
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/*
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* Set mode for virtual timers (currently x86 only):
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* delay_for_missed_ticks (default):
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* Do not advance a vcpu's time beyond the correct delivery time for
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* interrupts that have been missed due to preemption. Deliver missed
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* interrupts when the vcpu is rescheduled and advance the vcpu's virtual
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* time stepwise for each one.
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* no_delay_for_missed_ticks:
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* As above, missed interrupts are delivered, but guest time always tracks
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* wallclock (i.e., real) time while doing so.
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* no_missed_ticks_pending:
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* No missed interrupts are held pending. Instead, to ensure ticks are
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* delivered at some non-zero rate, if we detect missed ticks then the
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* internal tick alarm is not disabled if the VCPU is preempted during the
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* next tick period.
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* one_missed_tick_pending:
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* Missed interrupts are collapsed together and delivered as one 'late tick'.
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* Guest time always tracks wallclock (i.e., real) time.
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*/
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#define HVM_PARAM_TIMER_MODE 10
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#define HVMPTM_delay_for_missed_ticks 0
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#define HVMPTM_no_delay_for_missed_ticks 1
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#define HVMPTM_no_missed_ticks_pending 2
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#define HVMPTM_one_missed_tick_pending 3
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/* Boolean: Enable virtual HPET (high-precision event timer)? (x86-only) */
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#define HVM_PARAM_HPET_ENABLED 11
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/* Identity-map page directory used by Intel EPT when CR0.PG=0. */
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#define HVM_PARAM_IDENT_PT 12
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/* Device Model domain, defaults to 0. */
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#define HVM_PARAM_DM_DOMAIN 13
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/* ACPI S state: currently support S0 and S3 on x86. */
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#define HVM_PARAM_ACPI_S_STATE 14
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/* TSS used on Intel when CR0.PE=0. */
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#define HVM_PARAM_VM86_TSS 15
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/* Boolean: Enable aligning all periodic vpts to reduce interrupts */
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#define HVM_PARAM_VPT_ALIGN 16
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/* Console debug shared memory ring and event channel */
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#define HVM_PARAM_CONSOLE_PFN 17
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#define HVM_PARAM_CONSOLE_EVTCHN 18
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/*
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* Select location of ACPI PM1a and TMR control blocks. Currently two locations
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* are supported, specified by version 0 or 1 in this parameter:
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* - 0: default, use the old addresses
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* PM1A_EVT == 0x1f40; PM1A_CNT == 0x1f44; PM_TMR == 0x1f48
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* - 1: use the new default qemu addresses
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* PM1A_EVT == 0xb000; PM1A_CNT == 0xb004; PM_TMR == 0xb008
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* You can find these address definitions in <hvm/ioreq.h>
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*/
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#define HVM_PARAM_ACPI_IOPORTS_LOCATION 19
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/* Enable blocking memory events, async or sync (pause vcpu until response)
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* onchangeonly indicates messages only on a change of value */
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#define HVM_PARAM_MEMORY_EVENT_CR0 20
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#define HVM_PARAM_MEMORY_EVENT_CR3 21
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#define HVM_PARAM_MEMORY_EVENT_CR4 22
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#define HVM_PARAM_MEMORY_EVENT_INT3 23
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#define HVM_PARAM_MEMORY_EVENT_SINGLE_STEP 25
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#define HVM_PARAM_MEMORY_EVENT_MSR 30
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#define HVMPME_MODE_MASK (3 << 0)
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#define HVMPME_mode_disabled 0
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#define HVMPME_mode_async 1
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#define HVMPME_mode_sync 2
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#define HVMPME_onchangeonly (1 << 2)
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/* Boolean: Enable nestedhvm (hvm only) */
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#define HVM_PARAM_NESTEDHVM 24
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/* Params for the mem event rings */
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#define HVM_PARAM_PAGING_RING_PFN 27
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#define HVM_PARAM_ACCESS_RING_PFN 28
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#define HVM_PARAM_SHARING_RING_PFN 29
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/* SHUTDOWN_* action in case of a triple fault */
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#define HVM_PARAM_TRIPLE_FAULT_REASON 31
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#define HVM_NR_PARAMS 32
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#endif /* __XEN_PUBLIC_HVM_PARAMS_H__ */
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