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69 lines
2.1 KiB
C
69 lines
2.1 KiB
C
/** @file
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Provides a service to retrieve a pointer to the PEI Services Table.
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Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef __PEI_SERVICES_TABLE_POINTER_LIB_H__
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#define __PEI_SERVICES_TABLE_POINTER_LIB_H__
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/**
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Retrieves the cached value of the PEI Services Table pointer.
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Returns the cached value of the PEI Services Table pointer in a CPU specific manner
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as specified in the CPU binding section of the Platform Initialization Pre-EFI
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Initialization Core Interface Specification.
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If the cached PEI Services Table pointer is NULL, then ASSERT().
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@return The pointer to PeiServices.
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**/
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CONST EFI_PEI_SERVICES **
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EFIAPI
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GetPeiServicesTablePointer (
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VOID
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);
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/**
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Caches a pointer PEI Services Table.
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Caches the pointer to the PEI Services Table specified by PeiServicesTablePointer
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in a CPU specific manner as specified in the CPU binding section of the Platform Initialization
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Pre-EFI Initialization Core Interface Specification.
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If PeiServicesTablePointer is NULL, then ASSERT().
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@param PeiServicesTablePointer The address of PeiServices pointer.
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**/
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VOID
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EFIAPI
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SetPeiServicesTablePointer (
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IN CONST EFI_PEI_SERVICES ** PeiServicesTablePointer
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);
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/**
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Perform CPU specific actions required to migrate the PEI Services Table
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pointer from temporary RAM to permanent RAM.
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For IA32 CPUs, the PEI Services Table pointer is stored in the 4 bytes
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immediately preceding the Interrupt Descriptor Table (IDT) in memory.
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For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes
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immediately preceding the Interrupt Descriptor Table (IDT) in memory.
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For Itanium and ARM CPUs, a the PEI Services Table Pointer is stored in
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a dedicated CPU register. This means that there is no memory storage
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associated with storing the PEI Services Table pointer, so no additional
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migration actions are required for Itanium or ARM CPUs.
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**/
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VOID
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EFIAPI
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MigratePeiServicesTablePointer (
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VOID
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);
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#endif
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