mirror of
https://github.com/CloverHackyColor/CloverBootloader.git
synced 2024-11-14 10:05:43 +01:00
902 lines
31 KiB
ArmAsm
902 lines
31 KiB
ArmAsm
#------------------------------------------------------------------------------
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#*
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#* Copyright (c) 2006 - 2007, Intel Corporation. All rights reserved.<BR>
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#* This program and the accompanying materials
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#* are licensed and made available under the terms and conditions of the BSD License
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#* which accompanies this distribution. The full text of the license may be found at
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#* http://opensource.org/licenses/bsd-license.php
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#*
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#* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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#* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#*
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#* start32.asm
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#*
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#* Abstract:
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#*
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#------------------------------------------------------------------------------
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#define data32 .byte 0x66
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#define addr32 .byte 0x67
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#.MODEL small
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.stack:
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.486p:
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.code16
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.equ FAT_DIRECTORY_ENTRY_SIZE, 0x020
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.equ FAT_DIRECTORY_ENTRY_SHIFT, 5
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.equ BLOCK_SIZE, 0x0200
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.equ BLOCK_MASK, 0x01ff
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.equ BLOCK_SHIFT, 9
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.org 0x0
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.global _start
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_start:
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Ia32Jump:
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jmp BootSectorEntryPoint # JMP inst - 3 bytes
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nop
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OemId: .ascii "INTEL " # OemId - 8 bytes
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SectorSize: .word 0 # Sector Size - 2 bytes
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SectorsPerCluster: .byte 0 # Sector Per Cluster - 1 byte
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ReservedSectors: .word 0 # Reserved Sectors - 2 bytes
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NoFats: .byte 0 # Number of FATs - 1 byte
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RootEntries: .word 0 # Root Entries - 2 bytes
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Sectors: .word 0 # Number of Sectors - 2 bytes
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Media: .byte 0 # Media - 1 byte
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SectorsPerFat16: .word 0 # Sectors Per FAT for FAT12/FAT16 - 2 byte
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SectorsPerTrack: .word 0 # Sectors Per Track - 2 bytes
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Heads: .word 0 # Heads - 2 bytes
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HiddenSectors: .long 0 # Hidden Sectors - 4 bytes
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LargeSectors: .long 0 # Large Sectors - 4 bytes
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#******************************************************************************
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#
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#The structure for FAT32 starting at offset 36 of the boot sector. (At this point,
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#the BPB/boot sector for FAT12 and FAT16 differs from the BPB/boot sector for FAT32.)
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#
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#******************************************************************************
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SectorsPerFat32: .long 0 # Sectors Per FAT for FAT32 - 4 bytes
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ExtFlags: .word 0 # Mirror Flag - 2 bytes
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FSVersion: .word 0 # File System Version - 2 bytes
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RootCluster: .long 0 # 1st Cluster Number of Root Dir - 4 bytes
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FSInfo: .word 0 # Sector Number of FSINFO - 2 bytes
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BkBootSector: .word 0 # Sector Number of Bk BootSector - 2 bytes
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Reserved: .fill 12,1,0 # Reserved Field - 12 bytes
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PhysicalDrive: .byte 0 # Physical Drive Number - 1 byte
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Reserved1: .byte 0 # Reserved Field - 1 byte
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Signature: .byte 0 # Extended Boot Signature - 1 byte
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VolId: .ascii " " # Volume Serial Number - 4 bytes
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FatLabel: .ascii "Clover " # Volume Label - 11 bytes
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FileSystemType: .ascii "HFSPlus " # File System Type - 8 bytes
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BootSectorEntryPoint:
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#ASSUME ds:@code
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#ASSUME ss:@code
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# ds = 1000, es = 2000 + x (size of first cluster >> 4)
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# cx = Start Cluster of EfiLdr
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# dx = Start Cluster of Efivar.bin
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# Re use the BPB data stored in Boot Sector
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movw $0x7c00, %bp
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JumpFarInstruction:
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.byte 0xea
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JumpOffset:
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.word 0x200
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JumpSegment:
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.word 0x2000
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/*
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PrintStringAndHalt:
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movw $0xb800, %ax
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movw %ax, %es
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movw $160, %di
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rep
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movsw
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Halt:
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jmp Halt
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ErrorString:
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.byte 'S', 0x0c, 'E', 0x0c, 'r', 0x0c, 'r', 0x0c, 'o', 0x0c, 'r', 0x0c, '!', 0x0c
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*/
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.org 0x01fa # Will cause build break
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LBAOffsetForBootSector:
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.long 0x0
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.org 0x01fe # Will cause build break
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.word 0xaa55
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#******************************************************************************
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#******************************************************************************
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#******************************************************************************
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.equ DELAY_PORT, 0x0ed # Port to use for 1uS delay
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.equ KBD_CONTROL_PORT, 0x060 # 8042 control port
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.equ KBD_STATUS_PORT, 0x064 # 8042 status port
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.equ WRITE_DATA_PORT_CMD, 0x0d1 # 8042 command to write the data port
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.equ ENABLE_A20_CMD, 0x0df # 8042 command to enable A20
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.org 0x200 # Will cause build break
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.code16
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jmp start
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#Em64String:
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# .byte 'E', 0x0c, 'm', 0x0c, '6', 0x0c, '4', 0x0c, 'T', 0x0c, ' ', 0x0c, 'U', 0x0c, 'n', 0x0c, 's', 0x0c, 'u', 0x0c, 'p', 0x0c, 'p', 0x0c, 'o', 0x0c, 'r', 0x0c, 't', 0x0c, 'e', 0x0c, 'd', 0x0c, '!', 0x0c
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Label: .ascii "Clover " # Bootloader Label
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start:
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movw %cs, %ax
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movw %ax, %ds
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movw %ax, %es
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movw %ax, %ss
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movw $MyStack, %sp
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# mov ax,0b800h
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# mov es,ax
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# mov byte ptr es:[160],'a'
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# mov ax,cs
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# mov es,ax
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# movw $0xb800, %ax
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# movw %ax, %es
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# movw $0x61, byte ptr %es:[160]
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# movw %cs, %ax
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# movw %ax, %es
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//advanced algo
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/*
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; use the INT 0x15, eax= 0xE820 BIOS function to get a memory map
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; inputs: es:di -> destination buffer for 24 byte entries
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; outputs: bp = entry count, trashes all registers except esi
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do_e820:
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xor ebx, ebx ; ebx must be 0 to start
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xor bp, bp ; keep an entry count in bp
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mov edx, 0x0534D4150 ; Place "SMAP" into edx
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mov eax, 0xe820
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mov [es:di + 20], dword 1 ; force a valid ACPI 3.X entry
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mov ecx, 24 ; ask for 24 bytes
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int 0x15
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jc short .failed ; carry set on first call means "unsupported function"
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mov edx, 0x0534D4150 ; Some BIOSes apparently trash this register?
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cmp eax, edx ; on success, eax must have been reset to "SMAP"
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jne short .failed
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test ebx, ebx ; ebx = 0 implies list is only 1 entry long (worthless)
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je short .failed
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jmp short .jmpin
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.e820lp:
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mov eax, 0xe820 ; eax, ecx get trashed on every int 0x15 call
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mov [es:di + 20], dword 1 ; force a valid ACPI 3.X entry
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mov ecx, 24 ; ask for 24 bytes again
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int 0x15
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jc short .e820f ; carry set means "end of list already reached"
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mov edx, 0x0534D4150 ; repair potentially trashed register
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.jmpin:
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jcxz .skipent ; skip any 0 length entries
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cmp cl, 20 ; got a 24 byte ACPI 3.X response?
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jbe short .notext
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test byte [es:di + 20], 1 ; if so: is the "ignore this data" bit clear?
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je short .skipent
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.notext:
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mov ecx, [es:di + 8] ; get lower dword of memory region length
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or ecx, [es:di + 12] ; "or" it with upper dword to test for zero
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jz .skipent ; if length qword is 0, skip entry
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inc bp ; got a good entry: ++count, move to next storage spot
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add di, 24
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.skipent:
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test ebx, ebx ; if ebx resets to 0, list is complete
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jne short .e820lp
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.e820f:
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mov [mmap_ent], bp ; store the entry count
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clc ; there is "jc" on end of list to this point, so the carry must be cleared
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ret
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.failed:
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stc ; "function unsupported" error exit
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ret
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*/
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/* xorl %ebx, %ebx
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xorl %ebp, %ebp
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movl $0x534d4150, %edx # 0x534d4150 = 'SMAP'
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movl $0xe820, %eax
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leal MemoryMap, %edi
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movl $1, %es:20(%di)
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movl $24, %ecx
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int $0x15
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jc MemMapDone
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movl $0x534d4150, %edx
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cmpl %edx, %eax
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jne MemMapDone
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testl %ebx, %ebx
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je MemMapDone
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jmp JumpIn
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MemMapLoop:
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movl $0xe820, %eax
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movl $1, %es:20(%di)
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int $0x15
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jc MemMapDone
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movl $0x534d4150, %edx
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JumpIn:
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jcxz SkipEntry
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cmpb $20, %cl
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jbe NoText
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# movl 20(%edi), %eax
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testb $1, 20(%edi)
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je SkipEntry
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NoText:
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movl %es:8(%di), %ecx
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orl %es:12(%di), %ecx
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jz SkipEntry
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incl %ebp
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addl $24, %edi
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SkipEntry:
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test %ebx, %ebx
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jne MemMapLoop
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MemMapDone:
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movl %ebp, MemoryMapSize
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clc
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*/
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movl $0, %ebx
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leal MemoryMap, %edi
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MemMapLoop:
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movl $0xe820, %eax
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movl $20, %ecx #WIKI said $24
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movl $0x534d4150, %edx # 0x534d4150 = 'SMAP'
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int $0x15
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jc MemMapDone
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addl $20, %edi
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cmpl $0, %ebx
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je MemMapDone
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jmp MemMapLoop
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MemMapDone:
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leal MemoryMap, %eax
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subl %eax, %edi # Get the address of the memory map
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movl %edi, MemoryMapSize # Save the size of the memory map
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xorl %ebx, %ebx
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movw %cs, %bx # BX=segment
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shll $4, %ebx # BX="linear" address of segment base
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leal GDT_BASE(%ebx), %eax # EAX=PHYSICAL address of gdt
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movl %eax, gdtr + 2 # Put address of gdt into the gdtr
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leal IDT_BASE(%ebx), %eax # EAX=PHYSICAL address of idt
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movl %eax, idtr + 2 # Put address of idt into the idtr
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leal MemoryMapSize(%ebx), %edx # Physical base address of the memory map
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addl $0x1000, %ebx # Source of EFI32 = $0x21000
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movl %ebx, JUMP+2
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addl $0x1000, %ebx
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movl %ebx, %esi # Source of EFILDR32 = $0x22000
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# mov ax,0b800h
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# mov es,ax
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# mov byte ptr es:[162],'b'
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# mov ax,cs
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# mov es,ax
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# movw $0xb800, %ax
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# movw %ax, %es
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# movw $0x62, byte ptr %es:[162]
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# movw %cs, %ax
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# movw %ax, %es
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#
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# Enable A20 Gate
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#
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movw $0x2401, %ax # Enable A20 Gate
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int $0x15
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jnc A20GateEnabled # Jump if it succeeded
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#
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# If INT 15 Function 2401 is not supported, then attempt to Enable A20 manually.
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#
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#New algo from WIKI
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/* cli
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call a20wait
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movb $0xAD, %al
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outb %al, $KBD_STATUS_PORT
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call a20wait
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movb $0xD0, %al
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outb %al, $KBD_STATUS_PORT
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call a20wait2
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inb $KBD_CONTROL_PORT, %al
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pushl %eax
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call a20wait
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movb $0xD1, %al
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outb %al, $KBD_STATUS_PORT
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call a20wait
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popl %eax
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orb $2, %al
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outb %al, $KBD_CONTROL_PORT
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call a20wait
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movb $0xAE, %al
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outb %al, $KBD_STATUS_PORT
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call a20wait
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*/
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#UEFI/DUET
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call Empty8042InputBuffer # Empty the Input Buffer on the 8042 controller
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jnz Timeout8042 # Jump if the 8042 timed out
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outw %ax, $DELAY_PORT # Delay 1 uS
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movb $WRITE_DATA_PORT_CMD, %al # 8042 cmd to write output port
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outb %al, $KBD_STATUS_PORT # Send command to the 8042
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call Empty8042InputBuffer # Empty the Input Buffer on the 8042 controller
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jnz Timeout8042 # Jump if the 8042 timed out
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movb $ENABLE_A20_CMD, %al # gate address bit 20 on
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outb %al, $KBD_CONTROL_PORT # Send command to thre 8042
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call Empty8042InputBuffer # Empty the Input Buffer on the 8042 controller
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movw $25, %cx # Delay 25 uS for the command to complete on the 8042
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Delay25uS:
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outw %ax, $DELAY_PORT # Delay 1 uS
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loopl Delay25uS
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Timeout8042:
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#WIKI -fast A20gate
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# inb $0x92, %al
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# orb $2, %al
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# outb %al, $0x92
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A20GateEnabled:
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#//Slice - switch to graphics mode (1), or 80x25 mono text mode (2)
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movw $0x0002, %ax
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int $0x10
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#put char 6
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movl $0x000F, %ebx
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movl $0x0E33, %eax
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movl $0x0010, %ecx
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int $0x10
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movw $0x0008, %bx # Flat data descriptor
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#PAUSE1:
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# jmp PAUSE1
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#
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# DISABLE INTERRUPTS - Entering Protected Mode
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#
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cli
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.byte 0x66
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lgdt gdtr
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#PAUSE2:
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# jmp PAUSE2
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# addr32
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data32
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lidt idtr
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#PAUSE3:
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# jmp PAUSE3
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movl %cr0, %eax
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orb $1, %al
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# data32
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# or $1, %eax
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movl %eax, %cr0
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JUMP:
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# jmp far 0010:00020000
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data32
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.byte 0xea
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.long 0x00020000
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.word 0x0010
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Empty8042InputBuffer:
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movw $0, %cx
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Empty8042Loop:
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outw %ax, $DELAY_PORT # Delay 1us
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inb $KBD_STATUS_PORT, %al # Read the 8042 Status Port
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andb $0x2, %al # Check the Input Buffer Full Flag
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loopnz Empty8042Loop # Loop until the input buffer is empty or a timout of 65536 uS
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ret
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/*
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a20wait:
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inb $KBD_STATUS_PORT, %al
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testb $2, %al
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jnz a20wait
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ret
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a20wait2:
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inb $KBD_STATUS_PORT, %al
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testb $1, %al
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jz a20wait2
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ret
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*/
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/*
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PrintStringAndHalt:
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leaw ErrorString, %si
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movw $7, %cx
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movw $0xb800, %ax
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movw %ax, %es
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movw $160, %di
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rep
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movsw
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Halt:
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jmp Halt
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ErrorString:
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.byte 'S', 0x0c, 'E', 0x0c, 'r', 0x0c, 'r', 0x0c, 'o', 0x0c, 'r', 0x0c, '!', 0x0c
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*/
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##############################################################################
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# data
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##############################################################################
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.p2align 1
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gdtr: .word GDT_END - GDT_BASE - 1
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.long 0 # (GDT base gets set above)
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##############################################################################
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# global descriptor table (GDT)
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##############################################################################
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.p2align 1
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GDT_BASE:
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# null descriptor
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.equ NULL_SEL, .-GDT_BASE
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.word 0 # limit 15:0
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.word 0 # base 15:0
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.byte 0 # base 23:16
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.byte 0 # type
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.byte 0 # limit 19:16, flags
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.byte 0 # base 31:24
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# linear data segment descriptor
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.equ LINEAR_SEL, .-GDT_BASE
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.word 0xFFFF # limit 0xFFFFF
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.word 0 # base 0
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.byte 0
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.byte 0x92 # present, ring 0, data, expand-up, writable
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.byte 0xCF # page-granular, 32-bit
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.byte 0
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# linear code segment descriptor
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.equ LINEAR_CODE_SEL, .-GDT_BASE
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.word 0xFFFF # limit 0xFFFFF
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.word 0 # base 0
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.byte 0
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.byte 0x9A # present, ring 0, data, expand-up, writable
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.byte 0xCF # page-granular, 32-bit
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.byte 0
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# system data segment descriptor
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.equ SYS_DATA_SEL, .-GDT_BASE
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.word 0xFFFF # limit 0xFFFFF
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.word 0 # base 0
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.byte 0
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.byte 0x92 # present, ring 0, data, expand-up, writable
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.byte 0xCF # page-granular, 32-bit
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.byte 0
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# system code segment descriptor
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.equ SYS_CODE_SEL, .-GDT_BASE
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.word 0xFFFF # limit 0xFFFFF
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.word 0 # base 0
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.byte 0
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.byte 0x9A # present, ring 0, data, expand-up, writable
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.byte 0xCF # page-granular, 32-bit
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.byte 0
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# spare segment descriptor
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.equ SPARE3_SEL, .-GDT_BASE
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.word 0 # limit 0xFFFFF
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.word 0 # base 0
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.byte 0
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.byte 0 # present, ring 0, data, expand-up, writable
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.byte 0 # page-granular, 32-bit
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.byte 0
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# spare segment descriptor
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.equ SPARE4_SEL, .-GDT_BASE
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.word 0 # limit 0xFFFFF
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.word 0 # base 0
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.byte 0
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.byte 0 # present, ring 0, data, expand-up, writable
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.byte 0 # page-granular, 32-bit
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.byte 0
|
|
|
|
# spare segment descriptor
|
|
.equ SPARE5_SEL, .-GDT_BASE
|
|
.word 0 # limit 0xFFFFF
|
|
.word 0 # base 0
|
|
.byte 0
|
|
.byte 0 # present, ring 0, data, expand-up, writable
|
|
.byte 0 # page-granular, 32-bit
|
|
.byte 0
|
|
|
|
GDT_END:
|
|
|
|
.p2align 1
|
|
|
|
|
|
|
|
idtr: .word IDT_END - IDT_BASE - 1
|
|
.long 0 # (IDT base gets set above)
|
|
##############################################################################
|
|
# interrupt descriptor table (IDT)
|
|
#
|
|
# Note: The hardware IRQ's specified in this table are the normal PC/AT IRQ
|
|
# mappings. This implementation only uses the system timer and all other
|
|
# IRQs will remain masked. The descriptors for vectors 33+ are provided
|
|
# for convenience.
|
|
##############################################################################
|
|
|
|
#idt_tag db "IDT",0
|
|
.p2align 1
|
|
|
|
IDT_BASE:
|
|
# divide by zero (INT 0)
|
|
.equ DIV_ZERO_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
|
|
# debug exception (INT 1)
|
|
.equ DEBUG_EXCEPT_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
|
|
# NMI (INT 2)
|
|
.equ NMI_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
|
|
# soft breakpoint (INT 3)
|
|
.equ BREAKPOINT_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
|
|
# overflow (INT 4)
|
|
.equ OVERFLOW_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
|
|
# bounds check (INT 5)
|
|
.equ BOUNDS_CHECK_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
|
|
# invalid opcode (INT 6)
|
|
.equ INVALID_OPCODE_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
|
|
# device not available (INT 7)
|
|
.equ DEV_NOT_AVAIL_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
|
|
# double fault (INT 8)
|
|
.equ DOUBLE_FAULT_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
|
|
# Coprocessor segment overrun - reserved (INT 9)
|
|
.equ RSVD_INTR_SEL1, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
|
|
# invalid TSS (INT 0ah)
|
|
.equ INVALID_TSS_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
|
|
# segment not present (INT 0bh)
|
|
.equ SEG_NOT_PRESENT_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
|
|
# stack fault (INT 0ch)
|
|
.equ STACK_FAULT_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
|
|
# general protection (INT 0dh)
|
|
.equ GP_FAULT_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
|
|
# page fault (INT 0eh)
|
|
.equ PAGE_FAULT_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
|
|
# Intel reserved - do not use (INT 0fh)
|
|
.equ RSVD_INTR_SEL2, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
|
|
# floating point error (INT 10h)
|
|
.equ FLT_POINT_ERR_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
|
|
# alignment check (INT 11h)
|
|
.equ ALIGNMENT_CHECK_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
|
|
# machine check (INT 12h)
|
|
.equ MACHINE_CHECK_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
|
|
# SIMD floating-point exception (INT 13h)
|
|
.equ SIMD_EXCEPTION_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
|
|
# 84 unspecified descriptors, First 12 of them are reserved, the rest are avail
|
|
.fill 84 * 8, 1, 0
|
|
|
|
# IRQ 0 (System timer) - (INT 68h)
|
|
.equ IRQ0_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
|
|
# IRQ 1 (8042 Keyboard controller) - (INT 69h)
|
|
.equ IRQ1_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
|
|
# Reserved - IRQ 2 redirect (IRQ 2) - DO NOT USE!!! - (INT 6ah)
|
|
.equ IRQ2_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
|
|
# IRQ 3 (COM 2) - (INT 6bh)
|
|
.equ IRQ3_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
|
|
# IRQ 4 (COM 1) - (INT 6ch)
|
|
.equ IRQ4_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
|
|
# IRQ 5 (LPT 2) - (INT 6dh)
|
|
.equ IRQ5_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
|
|
# IRQ 6 (Floppy controller) - (INT 6eh)
|
|
.equ IRQ6_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
|
|
# IRQ 7 (LPT 1) - (INT 6fh)
|
|
.equ IRQ7_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
|
|
# IRQ 8 (RTC Alarm) - (INT 70h)
|
|
.equ IRQ8_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
|
|
# IRQ 9 - (INT 71h)
|
|
.equ IRQ9_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
|
|
# IRQ 10 - (INT 72h)
|
|
.equ IRQ10_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
|
|
# IRQ 11 - (INT 73h)
|
|
.equ IRQ11_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
|
|
# IRQ 12 (PS/2 mouse) - (INT 74h)
|
|
.equ IRQ12_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
|
|
# IRQ 13 (Floating point error) - (INT 75h)
|
|
.equ IRQ13_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
|
|
# IRQ 14 (Secondary IDE) - (INT 76h)
|
|
.equ IRQ14_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
|
|
# IRQ 15 (Primary IDE) - (INT 77h)
|
|
.equ IRQ15_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
|
|
.fill 8, 1, 0
|
|
|
|
IDT_END:
|
|
|
|
.p2align 1
|
|
|
|
MemoryMapSize: .long 0
|
|
MemoryMap: .long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
|
|
.long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
|
|
|
.org 0x0fe0
|
|
MyStack:
|
|
# below is the pieces of the IVT that is used to redirect INT 68h - 6fh
|
|
# back to INT 08h - 0fh when in real mode... It is 'org'ed to a
|
|
# known low address (20f00) so it can be set up by PlMapIrqToVect in
|
|
# 8259.c
|
|
|
|
int $8
|
|
iret
|
|
|
|
int $9
|
|
iret
|
|
|
|
int $10
|
|
iret
|
|
|
|
int $11
|
|
iret
|
|
|
|
int $12
|
|
iret
|
|
|
|
int $13
|
|
iret
|
|
|
|
int $14
|
|
iret
|
|
|
|
int $15
|
|
iret
|
|
|
|
|
|
.org 0x0ffe
|
|
BlockSignature:
|
|
.word 0xaa55
|
|
|
|
|