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32 lines
724 B
NASM
32 lines
724 B
NASM
;------------------------------------------------------------------------------
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;
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; EnableInterrupts() for ARM
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;
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; Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
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; Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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;
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;------------------------------------------------------------------------------
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EXPORT EnableInterrupts
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AREA Interrupt_enable, CODE, READONLY
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;/**
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; Enables CPU interrupts.
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;
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;**/
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;VOID
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;EFIAPI
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;EnableInterrupts (
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; VOID
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; );
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;
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EnableInterrupts
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MRS R0,CPSR
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BIC R0,R0,#0x80 ;Enable IRQ interrupts
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MSR CPSR_c,R0
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BX LR
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END
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