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103 lines
4.0 KiB
C
103 lines
4.0 KiB
C
/** @file
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This PPI manipulates the I2C host controller to perform transactions as a master
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on the I2C bus using the current state of any switches or multiplexers in the I2C bus.
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Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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@par Revision Reference:
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This PPI is introduced in PI Version 1.3.
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**/
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#ifndef __I2C_MASTER_PPI_H__
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#define __I2C_MASTER_PPI_H__
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#include <Pi/PiI2c.h>
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#define EFI_PEI_I2C_MASTER_PPI_GUID \
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{ 0xb3bfab9b, 0x9f9c, 0x4e8b, { 0xad, 0x37, 0x7f, 0x8c, 0x51, 0xfc, 0x62, 0x80 }}
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typedef struct _EFI_PEI_I2C_MASTER_PPI EFI_PEI_I2C_MASTER_PPI;
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/**
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Set the frequency for the I2C clock line.
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@param This Pointer to an EFI_PEI_I2C_MASTER_PPI structure.
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@param BusClockHertz Pointer to the requested I2C bus clock frequency in Hertz.
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Upon return this value contains the actual frequency
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in use by the I2C controller.
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@retval EFI_SUCCESS The bus frequency was set successfully.
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@retval EFI_INVALID_PARAMETER BusClockHertz is NULL
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@retval EFI_UNSUPPORTED The controller does not support this frequency.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *EFI_PEI_I2C_MASTER_PPI_SET_BUS_FREQUENCY) (
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IN EFI_PEI_I2C_MASTER_PPI *This,
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IN UINTN *BusClockHertz
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);
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/**
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Reset the I2C controller and configure it for use.
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@param This Pointer to an EFI_PEI_I2C_MASTER_PPI structure.
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@retval EFI_SUCCESS The reset completed successfully.
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@retval EFI_DEVICE_ERROR The reset operation failed.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *EFI_PEI_I2C_MASTER_PPI_RESET) (
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IN CONST EFI_PEI_I2C_MASTER_PPI *This
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);
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/**
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Start an I2C transaction on the host controller.
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@param This Pointer to an EFI_PEI_I2C_MASTER_PPI structure.
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@param SlaveAddress Address of the device on the I2C bus.
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Set the I2C_ADDRESSING_10_BIT when using 10-bit addresses,
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clear this bit for 7-bit addressing.
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Bits 0-6 are used for 7-bit I2C slave addresses and
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bits 0-9 are used for 10-bit I2C slave addresses.
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@param RequestPacket Pointer to an EFI_I2C_REQUEST_PACKET structure describing the I2C transaction.
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@retval EFI_SUCCESS The transaction completed successfully.
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@retval EFI_BAD_BUFFER_SIZE The RequestPacket->LengthInBytes value is too large.
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@retval EFI_DEVICE_ERROR There was an I2C error (NACK) during the transaction.
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@retval EFI_INVALID_PARAMETER RequestPacket is NULL
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@retval EFI_NO_RESPONSE The I2C device is not responding to the slave address.
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EFI_DEVICE_ERROR will be returned if the controller cannot distinguish when the NACK occurred.
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@retval EFI_NOT_FOUND Reserved bit set in the SlaveAddress parameter
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@retval EFI_OUT_OF_RESOURCES Insufficient memory for I2C transaction
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@retval EFI_UNSUPPORTED The controller does not support the requested transaction.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *EFI_PEI_I2C_MASTER_PPI_START_REQUEST) (
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IN CONST EFI_PEI_I2C_MASTER_PPI *This,
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IN UINTN SlaveAddress,
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IN EFI_I2C_REQUEST_PACKET *RequestPacket
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);
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///
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/// This PPI manipulates the I2C host controller to perform transactions as a master on the I2C bus
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/// using the current state of any switches or multiplexers in the I2C bus.
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///
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struct _EFI_PEI_I2C_MASTER_PPI {
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EFI_PEI_I2C_MASTER_PPI_SET_BUS_FREQUENCY SetBusFrequency;
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EFI_PEI_I2C_MASTER_PPI_RESET Reset;
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EFI_PEI_I2C_MASTER_PPI_START_REQUEST StartRequest;
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CONST EFI_I2C_CONTROLLER_CAPABILITIES *I2cControllerCapabilities;
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EFI_GUID Identifier;
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};
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extern EFI_GUID gEfiPeiI2cMasterPpiGuid;
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#endif
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