mirror of
https://github.com/CloverHackyColor/CloverBootloader.git
synced 2024-12-11 14:28:08 +01:00
853 lines
29 KiB
ArmAsm
853 lines
29 KiB
ArmAsm
#------------------------------------------------------------------------------
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#*
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#* Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
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#* Copyright (c) 2016, Clover Inc. All rights reserved.<BR>
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#* This program and the accompanying materials
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#* are licensed and made available under the terms and conditions of the BSD License
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#* which accompanies this distribution. The full text of the license may be found at
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#* http://opensource.org/licenses/bsd-license.php
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#*
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#* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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#* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#*
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#* st32_64H.S
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#*
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#* Abstract:
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#*
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#------------------------------------------------------------------------------
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# Build with
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# as -o st32_64H.o st32_64H.S
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# ld --oformat=binary -Ttext=0x200 -o st32_64H.com st32_64H.o
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#
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# To change character displayed use --defsym CHARACTER_TO_SHOW=<int value> parameter to as
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#
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.code16
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/*
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.equ DELAY_PORT, 0x0ed # Port to use for 1uS delay
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.equ KBD_CONTROL_PORT, 0x060 # 8042 control port
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.equ KBD_STATUS_PORT, 0x064 # 8042 status port
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.equ WRITE_DATA_PORT_CMD, 0x0d1 # 8042 command to write the data port
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.equ ENABLE_A20_CMD, 0x0df # 8042 command to enable A20
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*/
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.equ FAST_ENABLE_A20_PORT, 0x92
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.equ FAST_ENABLE_A20_MASK, 2
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.equ IA32_EFER, 0xC0000080
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.ifndef CHARACTER_TO_SHOW
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.equ CHARACTER_TO_SHOW, 'T'
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.endif
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.globl _start
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_start:
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jmp 1f
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.ascii "CLOVERX64 "
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1:
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movw %cs,%ax
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movw %ax,%ds
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movw %ax,%es
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movw %ax,%ss
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movw $MyStack, %sp
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#
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# Retrieve Bios Memory Map
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#
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xorl %ebx,%ebx
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leal MemoryMap,%edi
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MemMapLoop:
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movl $0xe820,%eax
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movl $20,%ecx
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movl $0x534d4150, %edx # SMAP
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int $0x15
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jc MemMapDone
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addw $20,%di
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test %ebx,%ebx
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jne MemMapLoop
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MemMapDone:
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subw $MemoryMap,%di # Get the address of the memory map
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movl %edi, MemoryMapSize # Save the size of the memory map
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#
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# Rebase Self
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#
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xorl %ebx,%ebx
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movw %cs,%bx # BX=segment
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shll $4,%ebx # BX="linear" address of segment base
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addl %ebx, (gdtr + 2) # Rebase address of GDT
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addl %ebx, (idtr + 2) # Rebase address of IDT
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addl %ebx, JumpToLongMode # Rebase ljmp Real Mode -> Long Mode
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#
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# Enable A20 Gate
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#
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movw $0x2401,%ax # Enable A20 Gate
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int $0x15
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jnc A20GateEnabled # Jump if it suceeded
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#
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# If INT 15 Function 2401 is not supported, then attempt to Enable A20 manually.
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#
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/*
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call Empty8042InputBuffer # Empty the Input Buffer on the 8042 controller
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jnz Timeout8042 # Jump if the 8042 timed out
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outw %ax, $DELAY_PORT # Delay 1 uS
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movb $WRITE_DATA_PORT_CMD, %al # 8042 cmd to write output port
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outb %al, $KBD_STATUS_PORT # Send command to the 8042
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call Empty8042InputBuffer # Empty the Input Buffer on the 8042 controller
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jnz Timeout8042 # Jump if the 8042 timed out
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movb $ENABLE_A20_CMD, %al # gate address bit 20 on
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outb %al, $KBD_CONTROL_PORT # Send command to thre 8042
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call Empty8042InputBuffer # Empty the Input Buffer on the 8042 controller
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movw $25,%cx # Delay 25 uS for the command to complete on the 8042
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Delay25uS:
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outw %ax, $DELAY_PORT # Delay 1 uS
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loop Delay25uS
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Timeout8042:
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*/
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# WIKI - fast A20gate
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inb $FAST_ENABLE_A20_PORT, %al
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orb $FAST_ENABLE_A20_MASK, %al
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outb %al, $FAST_ENABLE_A20_PORT
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A20GateEnabled:
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#
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# Create Page Table
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#
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call CreatePageTable
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#
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# DISABLE INTERRUPTS - Entering Protected Mode
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# 253668.pdf page 401
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#
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movw $0x000F, %bx
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movw $(0x0E00 | (CHARACTER_TO_SHOW & 255)), %ax
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int $0x10
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cli
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#
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# Ready Address of Page Table in EDX
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#
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movzwl PageTableSegment, %edx
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shll $4, %edx
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#
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# load GDT
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#
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lgdtl gdtr
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#
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# Enable the 64-bit page-translation-table entries by
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# setting CR4.PAE=1 (this is _required_ before activating
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# long mode). Paging is not enabled until after long mode
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# is enabled.
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#
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movl %cr4, %eax
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orb $0x20, %al
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movl %eax, %cr4
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#
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# This is the Trapolean Page Tables that are guarenteed
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# under 4GB.
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#
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# Address Map:
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# 10000 ~ 12000 - efildr (loaded)
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# 20000 ~ 21000 - start64.com
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# 21000 ~ 22000 - efi64.com
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# 22000 ~ 90000 - efildr
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# 90000 ~ 96000 - 4G pagetable (will be reload later)
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#
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movl %edx, %cr3
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#
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# Enable long mode (set EFER.LME=1).
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#
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movl $IA32_EFER, %ecx
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rdmsr
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orw $0x100, %ax
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wrmsr # Write EFER.
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#
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# Enable protected mode and paging to activate long mode (set CR0.PE=1, CR0.PG=1)
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#
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movl %cr0, %eax # Read CR0.
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orl $0x80000001, %eax # Set PE, PG
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movl %eax, %cr0 # Write CR0.
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.equ JumpToLongMode, . + 2
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ljmpl $0x38, $InLongMode # 0x38 is SYS_CODE64_SEL
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InLongMode:
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.code64
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movw $SYS_DATA_SEL,%ax
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movw %ax,%ds
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movw %ax,%es
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movw %ax,%ss
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leaq MyStack(%rip), %rsp # Reload RSP
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#
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# load IDT
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#
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lidtq idtr(%rip)
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jmp BlockSignature + 2
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.code16
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/*
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Empty8042InputBuffer:
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xorw %cx,%cx
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Empty8042Loop:
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outw %ax, $DELAY_PORT # Delay 1us
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inb $KBD_STATUS_PORT, %al # Read the 8042 Status Port
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andb $0x2,%al # Check the Input Buffer Full Flag
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loopnz Empty8042Loop # Loop until the input buffer is empty or a timout of 65536 uS
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ret
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*/
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#
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# Find place for page table and create it
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#
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.equ EFILDR_BASE, 0x2000 # Offset to start of EFILDR block
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.equ EFILDR_FILE_LENGTH, 8 # Dword in EFILDR_HEADER holding size of block
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.equ EBDA_SEG, 0x40 # Segment:Offset for finding the EBDA
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.equ EBDA_OFFSET, 0xE
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CreatePageTable:
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movl (EFILDR_BASE + EFILDR_FILE_LENGTH), %edx # Size of EFILDR block -> EDX
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addl $(EFILDR_BASE + 15), %edx # Add base
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shrl $4, %edx # And round up to multiple of 16
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movw %ds, %ax
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addw %ax, %dx # Add in linear base
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addw $255, %dx
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xorb %dl, %dl # And round up to page size
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# DX holds 16-bit segment of page table
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movw %ds, %cx # Save DS
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movw $EBDA_SEG, %ax
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addb $6, %dh # Need 6 pages for table
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movw %ax, %ds
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movw EBDA_OFFSET, %ax # EBDA 16-bit segment now in AX
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movw %cx, %ds # Restore DS
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cmpw %dx, %ax # Does page table fit under EBDA?
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jae 1f # Yes, continue
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jmp PageTableError # No, abort
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1:
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subb $6, %dh # Restore DX to start segment of page table
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movw %dx, PageTableSegment # Stash it for client
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pushw %es
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pushw %di # Save ES:DI used to build page table
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movw %dx, %es
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xorw %di, %di # ES:DI points to start of page table
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incb %dh # Bump DX to next page
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#
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# Set up page table root page (only 1 entry)
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#
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xorl %eax, %eax
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movw %dx, %ax
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incb %dh # Bump DX to next page
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shll $4, %eax
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orb $3, %al
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stosl
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xorl %eax, %eax
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movw $2046, %cx
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rep stosw # Wipe rest of 1st page
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#
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# Set up page table 2nd page (depth 1 - 4 entries)
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#
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movw $4, %cx
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2:
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movw %dx, %ax
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incb %dh # Bump DX to next page
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shll $4, %eax
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orb $3, %al
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stosl
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xorl %eax, %eax
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stosl
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loop 2b
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movw $2032, %cx # Wipe rest of 2nd page
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rep stosw
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#
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# Set up pages 3 - 6 (depth 2 - 2048 entries)
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#
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xorl %edx, %edx # Start at base of memory
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movb $0x83, %dl # Flags at leaf nodes mark large pages (2MB each)
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movw $2048, %cx
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3:
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movl %edx, %eax
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addl $0x200000, %edx # Bump EDX to next large page
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stosl
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xorl %eax, %eax
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stosl
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loop 3b
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#
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# Done - restore ES:DI and return
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#
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popw %di
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popw %es
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ret
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#
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# Get here if not enough space between boot file
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# and bottom of the EBDA - print error and halt
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#
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PageTableError:
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addw $2, %sp # Clear return address of CreatePageTable
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movw $15, %bx
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movw $PageErrorMsg, %si
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1:
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lodsb
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testb %al, %al
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jz 2f
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movb $14, %ah
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int $16
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jmp 1b
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2:
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hlt
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jmp 2b
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##############################################################################
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# data
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##############################################################################
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.p2align 1
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PageTableSegment: .word 0
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PageErrorMsg: .asciz "Unable to Allocate Memory for Page Table"
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.p2align 1
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gdtr: .word GDT_END - GDT_BASE - 1 # GDT limit
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.long GDT_BASE # (GDT base gets adjusted above)
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##############################################################################
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# global descriptor table (GDT)
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##############################################################################
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.p2align 1
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GDT_BASE:
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# null descriptor
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.equ NULL_SEL, .-GDT_BASE # Selector [0x0]
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.word 0 # limit 15:0
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.word 0 # base 15:0
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.byte 0 # base 23:16
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.byte 0 # type
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.byte 0 # limit 19:16, flags
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.byte 0 # base 31:24
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# linear data segment descriptor
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.equ LINEAR_DATA_SEL, .-GDT_BASE # Selector [0x8]
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.word 0xFFFF # limit 0xFFFFF
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.word 0 # base 0
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.byte 0
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.byte 0x92 # present, ring 0, data, expand-up, writable
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.byte 0xCF # page-granular, 32-bit
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.byte 0
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# linear code segment descriptor
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.equ LINEAR_CODE_SEL, .-GDT_BASE # Selector [0x10]
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.word 0xFFFF # limit 0xFFFFF
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.word 0 # base 0
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.byte 0
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.byte 0x9A # present, ring 0, code, non-conforming, readable
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.byte 0xCF # page-granular, 32-bit
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.byte 0
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# system data segment descriptor
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.equ SYS_DATA_SEL, .-GDT_BASE # Selector [0x18]
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.word 0xFFFF # limit 0xFFFFF
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.word 0 # base 0
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.byte 0
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.byte 0x92 # present, ring 0, data, expand-up, writable
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.byte 0xCF # page-granular, 32-bit
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.byte 0
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# system code segment descriptor
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.equ SYS_CODE_SEL, .-GDT_BASE # Selector [0x20]
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.word 0xFFFF # limit 0xFFFFF
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.word 0 # base 0
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.byte 0
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.byte 0x9A # present, ring 0, code, non-conforming, readable
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.byte 0xCF # page-granular, 32-bit
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.byte 0
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# spare segment descriptor
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.equ SPARE3_SEL, .-GDT_BASE # Selector [0x28]
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.word 0 # limit 0
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.word 0 # base 0
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.byte 0 #
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.byte 0 # non-present, ring 0, system, reserved
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.byte 0 #
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.byte 0
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#
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# system data segment descriptor
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#
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.equ SYS_DATA64_SEL, .-GDT_BASE # Selector [0x30]
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.word 0xFFFF # limit 0xFFFFF
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.word 0 # base 0
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.byte 0
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.byte 0x92 # present, ring 0, data, expand-up, writable
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.byte 0xCF # page-granular, 32-bit
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.byte 0
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#
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# system code segment descriptor
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#
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.equ SYS_CODE64_SEL, .-GDT_BASE # Selector [0x38]
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.word 0xFFFF # limit 0xFFFFF
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.word 0 # base 0
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.byte 0
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.byte 0x9A # present, ring 0, code, non-conforming, readable
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.byte 0xAF # page-granular, 64-bit
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.byte 0
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# spare segment descriptor
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.equ SPARE4_SEL, .-GDT_BASE # Selector [0x40]
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.word 0 # limit 0
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.word 0 # base 0
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.byte 0
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.byte 0 # non-present, ring 0, system, reserved
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.byte 0 #
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.byte 0
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GDT_END:
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.p2align 1
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idtr: .word IDT_END - IDT_BASE - 1 # IDT limit
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.quad IDT_BASE # (IDT base gets adjusted above)
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##############################################################################
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# interrupt descriptor table (IDT)
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#
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# Note: The hardware IRQ's specified in this table are the normal PC/AT IRQ
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# mappings. This implementation only uses the system timer and all other
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# IRQs will remain masked. The descriptors for vectors 33+ are provided
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# for convenience.
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##############################################################################
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.p2align 1
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IDT_BASE:
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# divide by zero (INT 0)
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.equ DIV_ZERO_SEL, .-IDT_BASE
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.word 0 # offset 15:0
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.word SYS_CODE64_SEL # selector 15:0
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.byte 0 # 0 for interrupt gate
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.byte 0x0e | 0x80 # type = 386 interrupt gate, present
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.word 0 # offset 31:16
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.long 0 # offset 63:32
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.long 0 # 0 for reserved
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# debug exception (INT 1)
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.equ DEBUG_EXCEPT_SEL, .-IDT_BASE
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.word 0 # offset 15:0
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.word SYS_CODE64_SEL # selector 15:0
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.byte 0 # 0 for interrupt gate
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.byte 0x0e | 0x80 # type = 386 interrupt gate, present
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.word 0 # offset 31:16
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.long 0 # offset 63:32
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.long 0 # 0 for reserved
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# NMI (INT 2)
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.equ NMI_SEL, .-IDT_BASE
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.word 0 # offset 15:0
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.word SYS_CODE64_SEL # selector 15:0
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.byte 0 # 0 for interrupt gate
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.byte 0x0e | 0x80 # type = 386 interrupt gate, present
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.word 0 # offset 31:16
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.long 0 # offset 63:32
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.long 0 # 0 for reserved
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# soft breakpoint (INT 3)
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.equ BREAKPOINT_SEL, .-IDT_BASE
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.word 0 # offset 15:0
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.word SYS_CODE64_SEL # selector 15:0
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.byte 0 # 0 for interrupt gate
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.byte 0x0e | 0x80 # type = 386 interrupt gate, present
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.word 0 # offset 31:16
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.long 0 # offset 63:32
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.long 0 # 0 for reserved
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# overflow (INT 4)
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.equ OVERFLOW_SEL, .-IDT_BASE
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.word 0 # offset 15:0
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.word SYS_CODE64_SEL # selector 15:0
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.byte 0 # 0 for interrupt gate
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.byte 0x0e | 0x80 # type = 386 interrupt gate, present
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.word 0 # offset 31:16
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.long 0 # offset 63:32
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.long 0 # 0 for reserved
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# bounds check (INT 5)
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.equ BOUNDS_CHECK_SEL, .-IDT_BASE
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.word 0 # offset 15:0
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.word SYS_CODE64_SEL # selector 15:0
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.byte 0 # 0 for interrupt gate
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.byte 0x0e | 0x80 # type = 386 interrupt gate, present
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.word 0 # offset 31:16
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.long 0 # offset 63:32
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.long 0 # 0 for reserved
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# invalid opcode (INT 6)
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.equ INVALID_OPCODE_SEL, .-IDT_BASE
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.word 0 # offset 15:0
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.word SYS_CODE64_SEL # selector 15:0
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.byte 0 # 0 for interrupt gate
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.byte 0x0e | 0x80 # type = 386 interrupt gate, present
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.word 0 # offset 31:16
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.long 0 # offset 63:32
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.long 0 # 0 for reserved
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# device not available (INT 7)
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.equ DEV_NOT_AVAIL_SEL, .-IDT_BASE
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.word 0 # offset 15:0
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.word SYS_CODE64_SEL # selector 15:0
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.byte 0 # 0 for interrupt gate
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.byte 0x0e | 0x80 # type = 386 interrupt gate, present
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.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# double fault (INT 8)
|
|
.equ DOUBLE_FAULT_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# Coprocessor segment overrun - reserved (INT 9)
|
|
.equ RSVD_INTR_SEL1, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# invalid TSS (INT 0ah)
|
|
.equ INVALID_TSS_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# segment not present (INT 0bh)
|
|
.equ SEG_NOT_PRESENT_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# stack fault (INT 0ch)
|
|
.equ STACK_FAULT_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# general protection (INT 0dh)
|
|
.equ GP_FAULT_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# page fault (INT 0eh)
|
|
.equ PAGE_FAULT_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# Intel reserved - do not use (INT 0fh)
|
|
.equ RSVD_INTR_SEL2, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# floating point error (INT 10h)
|
|
.equ FLT_POINT_ERR_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# alignment check (INT 11h)
|
|
.equ ALIGNMENT_CHECK_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# machine check (INT 12h)
|
|
.equ MACHINE_CHECK_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# SIMD floating-point exception (INT 13h)
|
|
.equ SIMD_EXCEPTION_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# 84 unspecified descriptors, First 12 of them are reserved, the rest are avail
|
|
.fill 84 * 16, 1, 0 # db (84 * 16) dup(0)
|
|
|
|
# IRQ 0 (System timer) - (INT 68h)
|
|
.equ IRQ0_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# IRQ 1 (8042 Keyboard controller) - (INT 69h)
|
|
.equ IRQ1_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# Reserved - IRQ 2 redirect (IRQ 2) - DO NOT USE!!! - (INT 6ah)
|
|
.equ IRQ2_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# IRQ 3 (COM 2) - (INT 6bh)
|
|
.equ IRQ3_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# IRQ 4 (COM 1) - (INT 6ch)
|
|
.equ IRQ4_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# IRQ 5 (LPT 2) - (INT 6dh)
|
|
.equ IRQ5_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# IRQ 6 (Floppy controller) - (INT 6eh)
|
|
.equ IRQ6_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# IRQ 7 (LPT 1) - (INT 6fh)
|
|
.equ IRQ7_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# IRQ 8 (RTC Alarm) - (INT 70h)
|
|
.equ IRQ8_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# IRQ 9 - (INT 71h)
|
|
.equ IRQ9_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# IRQ 10 - (INT 72h)
|
|
.equ IRQ10_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# IRQ 11 - (INT 73h)
|
|
.equ IRQ11_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# IRQ 12 (PS/2 mouse) - (INT 74h)
|
|
.equ IRQ12_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# IRQ 13 (Floating point error) - (INT 75h)
|
|
.equ IRQ13_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# IRQ 14 (Secondary IDE) - (INT 76h)
|
|
.equ IRQ14_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# IRQ 15 (Primary IDE) - (INT 77h)
|
|
.equ IRQ15_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.word SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
.fill 16, 1, 0
|
|
|
|
IDT_END:
|
|
|
|
.p2align 1
|
|
|
|
MemoryMapSize: .long 0
|
|
MemoryMap: .fill 267, 4, 0
|
|
|
|
.org 0x0de0
|
|
|
|
MyStack:
|
|
# below is the pieces of the IVT that is used to redirect INT 68h - 6fh
|
|
# back to INT 08h - 0fh when in real mode... It is 'org'ed to a
|
|
# known low address (20f00) so it can be set up by PlMapIrqToVect in
|
|
# 8259.c
|
|
|
|
int $8
|
|
iret
|
|
|
|
int $9
|
|
iret
|
|
|
|
int $10
|
|
iret
|
|
|
|
int $11
|
|
iret
|
|
|
|
int $12
|
|
iret
|
|
|
|
int $13
|
|
iret
|
|
|
|
int $14
|
|
iret
|
|
|
|
int $15
|
|
iret
|
|
|
|
.org 0x0dfe
|
|
BlockSignature:
|
|
.word 0xaa55
|