191 lines
5.5 KiB
C
191 lines
5.5 KiB
C
/** @file
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SMRAM Save State Map Definitions.
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SMRAM Save State Map definitions based on contents of the
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Intel(R) 64 and IA-32 Architectures Software Developer's Manual
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Volume 3C, Section 34.4 SMRAM
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Volume 3C, Section 34.5 SMI Handler Execution Environment
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Volume 3C, Section 34.7 Managing Synchronous and Asynchronous SMIs
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Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#ifndef __SMRAM_SAVE_STATE_MAP_H__
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#define __SMRAM_SAVE_STATE_MAP_H__
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///
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/// Default SMBASE address
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///
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#define SMM_DEFAULT_SMBASE 0x30000
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///
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/// Offset of SMM handler from SMBASE
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///
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#define SMM_HANDLER_OFFSET 0x8000
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///
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/// Offset of SMRAM Save State Map from SMBASE
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///
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#define SMRAM_SAVE_STATE_MAP_OFFSET 0xfc00
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#pragma pack (1)
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///
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/// 32-bit SMRAM Save State Map
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///
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typedef struct {
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UINT8 Reserved[0x200]; // 7c00h
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// Padded an extra 0x200 bytes so 32-bit and 64-bit
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// SMRAM Save State Maps are the same size
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UINT8 Reserved1[0xf8]; // 7e00h
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UINT32 SMBASE; // 7ef8h
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UINT32 SMMRevId; // 7efch
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UINT16 IORestart; // 7f00h
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UINT16 AutoHALTRestart; // 7f02h
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UINT8 Reserved2[0x9C]; // 7f08h
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UINT32 IOMemAddr; // 7fa0h
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UINT32 IOMisc; // 7fa4h
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UINT32 _ES; // 7fa8h
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UINT32 _CS; // 7fach
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UINT32 _SS; // 7fb0h
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UINT32 _DS; // 7fb4h
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UINT32 _FS; // 7fb8h
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UINT32 _GS; // 7fbch
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UINT32 Reserved3; // 7fc0h
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UINT32 _TR; // 7fc4h
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UINT32 _DR7; // 7fc8h
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UINT32 _DR6; // 7fcch
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UINT32 _EAX; // 7fd0h
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UINT32 _ECX; // 7fd4h
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UINT32 _EDX; // 7fd8h
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UINT32 _EBX; // 7fdch
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UINT32 _ESP; // 7fe0h
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UINT32 _EBP; // 7fe4h
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UINT32 _ESI; // 7fe8h
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UINT32 _EDI; // 7fech
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UINT32 _EIP; // 7ff0h
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UINT32 _EFLAGS; // 7ff4h
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UINT32 _CR3; // 7ff8h
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UINT32 _CR0; // 7ffch
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} SMRAM_SAVE_STATE_MAP32;
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///
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/// 64-bit SMRAM Save State Map
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///
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typedef struct {
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UINT8 Reserved1[0x1d0]; // 7c00h
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UINT32 GdtBaseHiDword; // 7dd0h
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UINT32 LdtBaseHiDword; // 7dd4h
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UINT32 IdtBaseHiDword; // 7dd8h
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UINT8 Reserved2[0xc]; // 7ddch
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UINT64 IO_EIP; // 7de8h
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UINT8 Reserved3[0x50]; // 7df0h
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UINT32 _CR4; // 7e40h
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UINT8 Reserved4[0x48]; // 7e44h
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UINT32 GdtBaseLoDword; // 7e8ch
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UINT32 Reserved5; // 7e90h
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UINT32 IdtBaseLoDword; // 7e94h
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UINT32 Reserved6; // 7e98h
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UINT32 LdtBaseLoDword; // 7e9ch
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UINT8 Reserved7[0x38]; // 7ea0h
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UINT64 EptVmxControl; // 7ed8h
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UINT32 EnEptVmxControl; // 7ee0h
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UINT8 Reserved8[0x14]; // 7ee4h
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UINT32 SMBASE; // 7ef8h
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UINT32 SMMRevId; // 7efch
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UINT16 IORestart; // 7f00h
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UINT16 AutoHALTRestart; // 7f02h
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UINT8 Reserved9[0x18]; // 7f04h
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UINT64 _R15; // 7f1ch
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UINT64 _R14;
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UINT64 _R13;
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UINT64 _R12;
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UINT64 _R11;
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UINT64 _R10;
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UINT64 _R9;
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UINT64 _R8;
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UINT64 _RAX; // 7f5ch
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UINT64 _RCX;
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UINT64 _RDX;
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UINT64 _RBX;
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UINT64 _RSP;
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UINT64 _RBP;
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UINT64 _RSI;
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UINT64 _RDI;
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UINT64 IOMemAddr; // 7f9ch
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UINT32 IOMisc; // 7fa4h
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UINT32 _ES; // 7fa8h
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UINT32 _CS;
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UINT32 _SS;
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UINT32 _DS;
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UINT32 _FS;
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UINT32 _GS;
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UINT32 _LDTR; // 7fc0h
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UINT32 _TR;
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UINT64 _DR7; // 7fc8h
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UINT64 _DR6;
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UINT64 _RIP; // 7fd8h
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UINT64 IA32_EFER; // 7fe0h
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UINT64 _RFLAGS; // 7fe8h
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UINT64 _CR3; // 7ff0h
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UINT64 _CR0; // 7ff8h
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} SMRAM_SAVE_STATE_MAP64;
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///
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/// Union of 32-bit and 64-bit SMRAM Save State Maps
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///
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typedef union {
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SMRAM_SAVE_STATE_MAP32 x86;
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SMRAM_SAVE_STATE_MAP64 x64;
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} SMRAM_SAVE_STATE_MAP;
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///
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/// Minimum SMM Revision ID that supports IOMisc field in SMRAM Save State Map
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///
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#define SMRAM_SAVE_STATE_MIN_REV_ID_IOMISC 0x30004
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///
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/// SMRAM Save State Map IOMisc I/O Length Values
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///
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#define SMM_IO_LENGTH_BYTE 0x01
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#define SMM_IO_LENGTH_WORD 0x02
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#define SMM_IO_LENGTH_DWORD 0x04
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///
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/// SMRAM Save State Map IOMisc I/O Instruction Type Values
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///
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#define SMM_IO_TYPE_IN_IMMEDIATE 0x9
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#define SMM_IO_TYPE_IN_DX 0x1
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#define SMM_IO_TYPE_OUT_IMMEDIATE 0x8
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#define SMM_IO_TYPE_OUT_DX 0x0
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#define SMM_IO_TYPE_INS 0x3
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#define SMM_IO_TYPE_OUTS 0x2
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#define SMM_IO_TYPE_REP_INS 0x7
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#define SMM_IO_TYPE_REP_OUTS 0x6
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///
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/// SMRAM Save State Map IOMisc structure
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///
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typedef union {
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struct {
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UINT32 SmiFlag:1;
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UINT32 Length:3;
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UINT32 Type:4;
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UINT32 Reserved1:8;
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UINT32 Port:16;
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} Bits;
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UINT32 Uint32;
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} SMRAM_SAVE_STATE_IOMISC;
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#pragma pack ()
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#endif
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