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@ -11,6 +11,8 @@ Once configured, you can use any of the 8 pins for your projects. Up-to 256 shif
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to provide more pins, without using more GPIO pins on the controller. They are linked by connecting pin Q of the closer
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shift register to the pin QH of the next shift register.
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The use of CLK INH pin is optional, as it can be directly connected to ground.
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.. code-block:: yaml
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@ -30,7 +32,7 @@ Configuration variables:
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- **data_pin** (**Required**, :ref:`Pin Schema <config-pin_schema>`): Pin connected to SN74HC165 Serial Output (QH) input.
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- **clock_pin** (**Required**, :ref:`Pin Schema <config-pin_schema>`): Pin connected to SN74HC165 Clock (CLK) pin
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- **load_pin** (**Required**, :ref:`Pin Schema <config-pin_schema>`): Pin connected to SN74HC165 Load input (SH/LD) pin
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- **clock_inhibit_pin** (**Required**, :ref:`Pin Schema <config-pin_schema>`): Pin connected to SN74HC165 Clock Inhibit (CLK INH) pin
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- **clock_inhibit_pin** (*Optional*, :ref:`Pin Schema <config-pin_schema>`): Pin connected to SN74HC165 Clock Inhibit (CLK INH) pin
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- **sr_count** (*Optional*, int): Number of daisy-chained shift registers, up-to 256. Defaults to ``1``.
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