mirror of
https://github.com/esphome/esphome.git
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Add quad spi features (#5925)
Co-authored-by: Jesse Hills <3060199+jesserockz@users.noreply.github.com>
This commit is contained in:
parent
2283b3b443
commit
1fef769496
@ -29,12 +29,15 @@ from esphome.const import (
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PLATFORM_ESP32,
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PLATFORM_ESP8266,
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PLATFORM_RP2040,
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CONF_ALLOW_OTHER_USES,
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CONF_DATA_PINS,
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)
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from esphome.core import coroutine_with_priority, CORE
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CODEOWNERS = ["@esphome/core", "@clydebarrow"]
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spi_ns = cg.esphome_ns.namespace("spi")
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SPIComponent = spi_ns.class_("SPIComponent", cg.Component)
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QuadSPIComponent = spi_ns.class_("QuadSPIComponent", cg.Component)
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SPIDevice = spi_ns.class_("SPIDevice")
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SPIDataRate = spi_ns.enum("SPIDataRate")
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SPIMode = spi_ns.enum("SPIMode")
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@ -190,12 +193,9 @@ def get_hw_spi(config, available):
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def validate_spi_config(config):
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available = list(range(len(get_hw_interface_list())))
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for spi in config:
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# map pin number to schema
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spi[CONF_CLK_PIN] = pins.gpio_output_pin_schema(spi[CONF_CLK_PIN])
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interface = spi[CONF_INTERFACE]
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if spi[CONF_FORCE_SW]:
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if interface == "any":
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spi[CONF_INTERFACE] = interface = "software"
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elif interface != "software":
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raise cv.Invalid("force_sw is deprecated - use interface: software")
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if interface == "software":
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pass
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elif interface == "any":
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@ -229,6 +229,8 @@ def validate_spi_config(config):
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spi, spi[CONF_INTERFACE_INDEX]
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):
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raise cv.Invalid("Invalid pin selections for hardware SPI interface")
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if CONF_DATA_PINS in spi and CONF_INTERFACE_INDEX not in spi:
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raise cv.Invalid("Quad mode requires a hardware interface")
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return config
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@ -249,14 +251,26 @@ def get_spi_interface(index):
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return "new SPIClass(HSPI)"
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# Do not use a pin schema for the number, as that will trigger a pin reuse error due to duplication of the
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# clock pin in the standard and quad schemas.
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clk_pin_validator = cv.maybe_simple_value(
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{
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cv.Required(CONF_NUMBER): cv.Any(cv.int_, cv.string),
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cv.Optional(CONF_ALLOW_OTHER_USES): cv.boolean,
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},
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key=CONF_NUMBER,
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)
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SPI_SCHEMA = cv.All(
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cv.Schema(
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{
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cv.GenerateID(): cv.declare_id(SPIComponent),
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cv.Required(CONF_CLK_PIN): pins.gpio_output_pin_schema,
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cv.Required(CONF_CLK_PIN): clk_pin_validator,
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cv.Optional(CONF_MISO_PIN): pins.gpio_input_pin_schema,
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cv.Optional(CONF_MOSI_PIN): pins.gpio_output_pin_schema,
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cv.Optional(CONF_FORCE_SW, default=False): cv.boolean,
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cv.Optional(CONF_FORCE_SW): cv.invalid(
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"force_sw is deprecated - use interface: software"
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),
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cv.Optional(CONF_INTERFACE, default="any"): cv.one_of(
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*sum(get_hw_interface_list(), ["software", "hardware", "any"]),
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lower=True,
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@ -267,8 +281,34 @@ SPI_SCHEMA = cv.All(
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cv.only_on([PLATFORM_ESP32, PLATFORM_ESP8266, PLATFORM_RP2040]),
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)
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SPI_QUAD_SCHEMA = cv.All(
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cv.Schema(
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{
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cv.GenerateID(): cv.declare_id(QuadSPIComponent),
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cv.Required(CONF_CLK_PIN): clk_pin_validator,
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cv.Required(CONF_DATA_PINS): cv.All(
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cv.ensure_list(pins.internal_gpio_output_pin_number),
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cv.Length(min=4, max=4),
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),
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cv.Optional(CONF_INTERFACE, default="hardware"): cv.one_of(
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*sum(get_hw_interface_list(), ["hardware"]),
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lower=True,
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),
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}
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),
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cv.only_with_esp_idf,
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)
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CONFIG_SCHEMA = cv.All(
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cv.ensure_list(SPI_SCHEMA),
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# Order is important. SPI_SCHEMA is the default.
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cv.ensure_list(
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cv.Any(
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SPI_SCHEMA,
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SPI_QUAD_SCHEMA,
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msg="Standard SPI requires mosi_pin and/or miso_pin; quad SPI requires data_pins only."
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+ " A clock pin is always required",
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),
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),
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validate_spi_config,
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)
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@ -277,43 +317,46 @@ CONFIG_SCHEMA = cv.All(
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async def to_code(configs):
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cg.add_define("USE_SPI")
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cg.add_global(spi_ns.using)
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if CORE.using_arduino:
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cg.add_library("SPI", None)
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for spi in configs:
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var = cg.new_Pvariable(spi[CONF_ID])
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await cg.register_component(var, spi)
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clk = await cg.gpio_pin_expression(spi[CONF_CLK_PIN])
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cg.add(var.set_clk(clk))
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if CONF_MISO_PIN in spi:
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miso = await cg.gpio_pin_expression(spi[CONF_MISO_PIN])
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cg.add(var.set_miso(miso))
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if CONF_MOSI_PIN in spi:
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mosi = await cg.gpio_pin_expression(spi[CONF_MOSI_PIN])
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cg.add(var.set_mosi(mosi))
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if CONF_INTERFACE_INDEX in spi:
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index = spi[CONF_INTERFACE_INDEX]
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cg.add(var.set_interface(cg.RawExpression(get_spi_interface(index))))
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if miso := spi.get(CONF_MISO_PIN):
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cg.add(var.set_miso(await cg.gpio_pin_expression(miso)))
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if mosi := spi.get(CONF_MOSI_PIN):
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cg.add(var.set_mosi(await cg.gpio_pin_expression(mosi)))
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if data_pins := spi.get(CONF_DATA_PINS):
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cg.add(var.set_data_pins(data_pins))
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if (index := spi.get(CONF_INTERFACE_INDEX)) is not None:
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interface = get_spi_interface(index)
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cg.add(var.set_interface(cg.RawExpression(interface)))
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cg.add(
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var.set_interface_name(
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re.sub(
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r"\W", "", get_spi_interface(index).replace("new SPIClass", "")
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)
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re.sub(r"\W", "", interface.replace("new SPIClass", ""))
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)
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)
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if CORE.using_arduino:
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cg.add_library("SPI", None)
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def spi_device_schema(
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cs_pin_required=True, default_data_rate=cv.UNDEFINED, default_mode=cv.UNDEFINED
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cs_pin_required=True,
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default_data_rate=cv.UNDEFINED,
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default_mode=cv.UNDEFINED,
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quad=False,
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):
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"""Create a schema for an SPI device.
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:param cs_pin_required: If true, make the CS_PIN required in the config.
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:param default_data_rate: Optional data_rate to use as default
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:param default_mode Optional. The default SPI mode to use.
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:param quad If set, will require an SPI component configured as quad data bits.
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:return: The SPI device schema, `extend` this in your config schema.
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"""
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schema = {
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cv.GenerateID(CONF_SPI_ID): cv.use_id(SPIComponent),
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cv.GenerateID(CONF_SPI_ID): cv.use_id(
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QuadSPIComponent if quad else SPIComponent
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),
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cv.Optional(CONF_DATA_RATE, default=default_data_rate): SPI_DATA_RATE_SCHEMA,
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cv.Optional(CONF_SPI_MODE, default=default_mode): cv.enum(
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SPI_MODE_OPTIONS, upper=True
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@ -49,7 +49,8 @@ void SPIComponent::setup() {
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}
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if (this->using_hw_) {
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this->spi_bus_ = SPIComponent::get_bus(this->interface_, this->clk_pin_, this->sdo_pin_, this->sdi_pin_);
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this->spi_bus_ =
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SPIComponent::get_bus(this->interface_, this->clk_pin_, this->sdo_pin_, this->sdi_pin_, this->data_pins_);
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if (this->spi_bus_ == nullptr) {
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ESP_LOGE(TAG, "Unable to allocate SPI interface");
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this->mark_failed();
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@ -68,6 +69,9 @@ void SPIComponent::dump_config() {
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LOG_PIN(" CLK Pin: ", this->clk_pin_)
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LOG_PIN(" SDI Pin: ", this->sdi_pin_)
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LOG_PIN(" SDO Pin: ", this->sdo_pin_)
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for (size_t i = 0; i != this->data_pins_.size(); i++) {
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ESP_LOGCONFIG(TAG, " Data pin %u: GPIO%d", i, this->data_pins_[i]);
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}
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if (this->spi_bus_->is_hw()) {
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ESP_LOGCONFIG(TAG, " Using HW SPI: %s", this->interface_name_);
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} else {
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@ -1,11 +1,12 @@
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#pragma once
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#include "esphome/core/application.h"
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#include "esphome/core/component.h"
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#include "esphome/core/hal.h"
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#include "esphome/core/log.h"
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#include "esphome/core/application.h"
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#include <vector>
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#include <map>
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#include <utility>
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#include <vector>
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#ifdef USE_ARDUINO
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@ -208,6 +209,10 @@ class SPIDelegate {
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esph_log_e("spi_device", "variable length write not implemented");
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}
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virtual void write_cmd_addr_data(size_t cmd_bits, uint32_t cmd, size_t addr_bits, uint32_t address,
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const uint8_t *data, size_t length, uint8_t bus_width) {
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esph_log_e("spi_device", "write_cmd_addr_data not implemented");
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}
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// write 16 bits
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virtual void write16(uint16_t data) {
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if (this->bit_order_ == BIT_ORDER_MSB_FIRST) {
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@ -331,6 +336,7 @@ class SPIComponent : public Component {
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void set_miso(GPIOPin *sdi) { this->sdi_pin_ = sdi; }
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void set_mosi(GPIOPin *sdo) { this->sdo_pin_ = sdo; }
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void set_data_pins(std::vector<uint8_t> pins) { this->data_pins_ = std::move(pins); }
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void set_interface(SPIInterface interface) {
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this->interface_ = interface;
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@ -348,15 +354,19 @@ class SPIComponent : public Component {
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GPIOPin *clk_pin_{nullptr};
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GPIOPin *sdi_pin_{nullptr};
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GPIOPin *sdo_pin_{nullptr};
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std::vector<uint8_t> data_pins_{};
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SPIInterface interface_{};
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bool using_hw_{false};
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const char *interface_name_{nullptr};
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SPIBus *spi_bus_{};
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std::map<SPIClient *, SPIDelegate *> devices_;
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static SPIBus *get_bus(SPIInterface interface, GPIOPin *clk, GPIOPin *sdo, GPIOPin *sdi);
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static SPIBus *get_bus(SPIInterface interface, GPIOPin *clk, GPIOPin *sdo, GPIOPin *sdi,
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const std::vector<uint8_t> &data_pins);
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};
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using QuadSPIComponent = SPIComponent;
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/**
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* Base class for SPIDevice, un-templated.
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*/
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@ -422,18 +432,49 @@ class SPIDevice : public SPIClient {
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void read_array(uint8_t *data, size_t length) { return this->delegate_->read_array(data, length); }
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/**
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* Write a single data item, up to 32 bits.
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* @param data The data
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* @param num_bits The number of bits to write. The lower num_bits of data will be sent.
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*/
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void write(uint16_t data, size_t num_bits) { this->delegate_->write(data, num_bits); };
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/* Write command, address and data. Command and address will be written as single-bit SPI,
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* data phase can be multiple bit (currently only 1 or 4)
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* @param cmd_bits Number of bits to write in the command phase
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* @param cmd The command value to write
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* @param addr_bits Number of bits to write in addr phase
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* @param address Address data
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* @param data Plain data bytes
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* @param length Number of data bytes
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* @param bus_width The number of data lines to use for the data phase.
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*/
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void write_cmd_addr_data(size_t cmd_bits, uint32_t cmd, size_t addr_bits, uint32_t address, const uint8_t *data,
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size_t length, uint8_t bus_width = 1) {
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this->delegate_->write_cmd_addr_data(cmd_bits, cmd, addr_bits, address, data, length, bus_width);
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}
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void write_byte(uint8_t data) { this->delegate_->write_array(&data, 1); }
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/**
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* Write the array data, replace with received data.
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* @param data
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* @param length
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*/
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void transfer_array(uint8_t *data, size_t length) { this->delegate_->transfer(data, length); }
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uint8_t transfer_byte(uint8_t data) { return this->delegate_->transfer(data); }
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// the driver will byte-swap if required.
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/** Write 16 bit data. The driver will byte-swap if required.
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*/
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void write_byte16(uint16_t data) { this->delegate_->write16(data); }
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// avoid use of this if possible. It's inefficient and ugly.
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/**
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* Write an array of data as 16 bit values, byte-swapping if required. Use of this should be avoided as
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* it is horribly slow.
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* @param data
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* @param length
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*/
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void write_array16(const uint16_t *data, size_t length) { this->delegate_->write_array16(data, length); }
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void enable() { this->delegate_->begin_transaction(); }
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@ -85,7 +85,8 @@ class SPIBusHw : public SPIBus {
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bool is_hw() override { return true; }
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};
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SPIBus *SPIComponent::get_bus(SPIInterface interface, GPIOPin *clk, GPIOPin *sdo, GPIOPin *sdi) {
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SPIBus *SPIComponent::get_bus(SPIInterface interface, GPIOPin *clk, GPIOPin *sdo, GPIOPin *sdi,
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const std::vector<uint8_t> &data_pins) {
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return new SPIBusHw(clk, sdo, sdi, interface);
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}
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@ -104,6 +104,60 @@ class SPIDelegateHw : public SPIDelegate {
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}
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}
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/**
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* Write command, address and data
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* @param cmd_bits Number of bits to write in the command phase
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* @param cmd The command value to write
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* @param addr_bits Number of bits to write in addr phase
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* @param address Address data
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* @param data Remaining data bytes
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* @param length Number of data bytes
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* @param bus_width The number of data lines to use
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*/
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void write_cmd_addr_data(size_t cmd_bits, uint32_t cmd, size_t addr_bits, uint32_t address, const uint8_t *data,
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size_t length, uint8_t bus_width) override {
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spi_transaction_ext_t desc = {};
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if (length == 0 && cmd_bits == 0 && addr_bits == 0) {
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esph_log_w(TAG, "Nothing to transfer");
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return;
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}
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desc.base.flags = SPI_TRANS_VARIABLE_ADDR | SPI_TRANS_VARIABLE_CMD | SPI_TRANS_VARIABLE_DUMMY;
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if (bus_width == 4) {
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desc.base.flags |= SPI_TRANS_MODE_QIO;
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} else if (bus_width == 8) {
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desc.base.flags |= SPI_TRANS_MODE_OCT;
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}
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desc.command_bits = cmd_bits;
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desc.address_bits = addr_bits;
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desc.dummy_bits = 0;
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desc.base.rxlength = 0;
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desc.base.cmd = cmd;
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desc.base.addr = address;
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do {
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size_t chunk_size = std::min(length, MAX_TRANSFER_SIZE);
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if (data != nullptr && chunk_size != 0) {
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desc.base.length = chunk_size * 8;
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desc.base.tx_buffer = data;
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length -= chunk_size;
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data += chunk_size;
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} else {
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length = 0;
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desc.base.length = 0;
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}
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esp_err_t err = spi_device_polling_start(this->handle_, (spi_transaction_t *) &desc, portMAX_DELAY);
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if (err == ESP_OK) {
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err = spi_device_polling_end(this->handle_, portMAX_DELAY);
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}
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if (err != ESP_OK) {
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ESP_LOGE(TAG, "Transmit failed - err %X", err);
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return;
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}
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// if more data is to be sent, skip the command and address phases.
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desc.command_bits = 0;
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desc.address_bits = 0;
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} while (length != 0);
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}
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void transfer(uint8_t *ptr, size_t length) override { this->transfer(ptr, ptr, length); }
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uint8_t transfer(uint8_t data) override {
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@ -142,13 +196,27 @@ class SPIDelegateHw : public SPIDelegate {
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class SPIBusHw : public SPIBus {
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public:
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SPIBusHw(GPIOPin *clk, GPIOPin *sdo, GPIOPin *sdi, SPIInterface channel) : SPIBus(clk, sdo, sdi), channel_(channel) {
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SPIBusHw(GPIOPin *clk, GPIOPin *sdo, GPIOPin *sdi, SPIInterface channel, std::vector<uint8_t> data_pins)
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: SPIBus(clk, sdo, sdi), channel_(channel) {
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spi_bus_config_t buscfg = {};
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buscfg.mosi_io_num = Utility::get_pin_no(sdo);
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buscfg.miso_io_num = Utility::get_pin_no(sdi);
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buscfg.sclk_io_num = Utility::get_pin_no(clk);
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buscfg.quadwp_io_num = -1;
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buscfg.quadhd_io_num = -1;
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buscfg.flags = SPICOMMON_BUSFLAG_MASTER | SPICOMMON_BUSFLAG_SCLK;
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if (data_pins.empty()) {
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buscfg.mosi_io_num = Utility::get_pin_no(sdo);
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buscfg.miso_io_num = Utility::get_pin_no(sdi);
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buscfg.quadwp_io_num = -1;
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buscfg.quadhd_io_num = -1;
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} else {
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buscfg.data0_io_num = data_pins[0];
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buscfg.data1_io_num = data_pins[1];
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buscfg.data2_io_num = data_pins[2];
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buscfg.data3_io_num = data_pins[3];
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buscfg.data4_io_num = -1;
|
||||
buscfg.data5_io_num = -1;
|
||||
buscfg.data6_io_num = -1;
|
||||
buscfg.data7_io_num = -1;
|
||||
buscfg.flags |= SPICOMMON_BUSFLAG_QUAD;
|
||||
}
|
||||
buscfg.max_transfer_sz = MAX_TRANSFER_SIZE;
|
||||
auto err = spi_bus_initialize(channel, &buscfg, SPI_DMA_CH_AUTO);
|
||||
if (err != ESP_OK)
|
||||
@ -166,8 +234,9 @@ class SPIBusHw : public SPIBus {
|
||||
bool is_hw() override { return true; }
|
||||
};
|
||||
|
||||
SPIBus *SPIComponent::get_bus(SPIInterface interface, GPIOPin *clk, GPIOPin *sdo, GPIOPin *sdi) {
|
||||
return new SPIBusHw(clk, sdo, sdi, interface);
|
||||
SPIBus *SPIComponent::get_bus(SPIInterface interface, GPIOPin *clk, GPIOPin *sdo, GPIOPin *sdi,
|
||||
const std::vector<uint8_t> &data_pins) {
|
||||
return new SPIBusHw(clk, sdo, sdi, interface, data_pins);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
@ -28,6 +28,15 @@ spi:
|
||||
allow_other_uses: false
|
||||
mosi_pin: GPIO6
|
||||
interface: any
|
||||
- id: quad_spi
|
||||
clk_pin: 47
|
||||
data_pins:
|
||||
-
|
||||
number: 40
|
||||
allow_other_uses: false
|
||||
- 41
|
||||
- 42
|
||||
- 43
|
||||
|
||||
spi_device:
|
||||
id: spidev
|
||||
|
Loading…
Reference in New Issue
Block a user