Upstream/esphome
1
0
Fork 0
mirror of https://github.com/esphome/esphome.git synced 2024-12-11 14:49:20 +01:00
Code Issues Projects Releases Wiki Activity

Apply suggestions from code review

Browse Source 
Accepted changes

Co-authored-by: Jesse Hills <3060199+jesserockz@users.noreply.github.com>
This commit is contained in:
KoenBreeman 2024-08-16 10:26:17 +02:00
parent c7503a44bd
commit 7226e89d8d
4 changed files with 4 additions and 23 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
esphome/components/m5stack4relay/m5stack4relay.h
View File

@ -9,7 +9,6 @@ namespace m5stack4relay {
static constexpr uint8_t UNIT_4RELAY_REG = 0X10; static constexpr uint8_t UNIT_4RELAY_REG = 0X10;
static constexpr uint8_t UNIT_4RELAY_RELAY_REG = 0X11; static constexpr uint8_t UNIT_4RELAY_RELAY_REG = 0X11;
enum class RelayBit : uint8_t { RELAY1 = 0, RELAY2 = 1, RELAY3 = 2, RELAY4 = 3 };
class M5Stack4Relay : public Component, public i2c::I2CDevice { class M5Stack4Relay : public Component, public i2c::I2CDevice {
public: public:

21
esphome/components/m5stack4relay/switch/__init__.py
View File

@ -18,14 +18,6 @@ CONF_Relay_2 = 2
CONF_Relay_3 = 3 CONF_Relay_3 = 3
CONF_Relay_4 = 4 CONF_Relay_4 = 4
RelayBit_ = m5stack4relay_ns.enum("RelayBit", is_class=True)
SWITCH_MAP = {
CONF_Relay_1: RelayBit_.RELAY1,
CONF_Relay_2: RelayBit_.RELAY2,
CONF_Relay_3: RelayBit_.RELAY3,
CONF_Relay_4: RelayBit_.RELAY4,
}
CONFIG_SCHEMA = ( CONFIG_SCHEMA = (
@ -34,11 +26,7 @@ CONFIG_SCHEMA = (
{ {
cv.GenerateID(): cv.declare_id(M5StackSwitch), cv.GenerateID(): cv.declare_id(M5StackSwitch),
cv.GenerateID(CONF_M5STACK4RELAY_ID): cv.use_id(M5Stack4Relay), cv.GenerateID(CONF_M5STACK4RELAY_ID): cv.use_id(M5Stack4Relay),
cv.Required(CONF_CHANNEL): cv.enum(SWITCH_MAP), cv.Required(CONF_CHANNEL): cv.int_range(min=1, max=4),
cv.Optional(CONF_INTERLOCK): cv.ensure_list(cv.use_id(switch.Switch)),
cv.Optional(
CONF_INTERLOCK_WAIT_TIME, default="0ms"
): cv.positive_time_period_milliseconds,
} }
) )
.extend(cv.COMPONENT_SCHEMA) .extend(cv.COMPONENT_SCHEMA)
@ -52,10 +40,3 @@ async def to_code(config):
cg.add(var.set_channel(config[CONF_CHANNEL])) cg.add(var.set_channel(config[CONF_CHANNEL]))
if CONF_INTERLOCK in config:
interlock = []
for it in config[CONF_INTERLOCK]:
lock = await cg.get_variable(it)
interlock.append(lock)
cg.add(var.set_interlock(interlock))
cg.add(var.set_interlock_wait_time(config[CONF_INTERLOCK_WAIT_TIME]))

3
esphome/components/m5stack4relay/switch/m5stack4relay_switch.cpp
View File

@ -23,6 +23,7 @@ void M5Stack4RelaySwitch::setup() {
void M5Stack4RelaySwitch::dump_config() { void M5Stack4RelaySwitch::dump_config() {
LOG_SWITCH("", "M5Stack4Relay Switch", this); LOG_SWITCH("", "M5Stack4Relay Switch", this);
ESP_LOGCONFIG(TAG, " Channel: %u", this->channel_);
if (!this->interlock_.empty()) { if (!this->interlock_.empty()) {
ESP_LOGCONFIG(TAG, " Interlocks:"); ESP_LOGCONFIG(TAG, " Interlocks:");
@ -63,7 +64,7 @@ void M5Stack4RelaySwitch::write_state(bool state) {
} }
// This will be called every time the user requests a state change. // This will be called every time the user requests a state change.
this->parent_->relay_write(this->channel_, state); this->parent_->relay_write(this->channel_ - 1, state);
// Acknowledge new state by publishing it // Acknowledge new state by publishing it
this->publish_state(state); this->publish_state(state);

2
esphome/components/m5stack4relay/switch/m5stack4relay_switch.h
View File

@ -16,7 +16,7 @@ class M5Stack4RelaySwitch : public Component, public switch_::Switch, public Par
void dump_config() override; void dump_config() override;
void write_state(bool state) override; void write_state(bool state) override;
void set_channel(RelayBit channel) { this->channel_ = (uint8_t) channel; } void set_channel(uint8_t channel) { this->channel_ = channel; }
void set_interlock(const std::vector<Switch *> &interlock); void set_interlock(const std::vector<Switch *> &interlock);
void set_interlock_wait_time(uint32_t interlock_wait_time) { interlock_wait_time_ = interlock_wait_time; } void set_interlock_wait_time(uint32_t interlock_wait_time) { interlock_wait_time_ = interlock_wait_time; }