diff --git a/esphome/components/spi/__init__.py b/esphome/components/spi/__init__.py
index d45362435e..c2335bd92a 100644
--- a/esphome/components/spi/__init__.py
+++ b/esphome/components/spi/__init__.py
@@ -32,7 +32,10 @@ from esphome.const import (
     CONF_ALLOW_OTHER_USES,
     CONF_DATA_PINS,
 )
-from esphome.core import coroutine_with_priority, CORE
+from esphome.core import (
+    coroutine_with_priority,
+    CORE,
+)
 
 CODEOWNERS = ["@esphome/core", "@clydebarrow"]
 spi_ns = cg.esphome_ns.namespace("spi")
@@ -73,6 +76,8 @@ CONF_SPI_MODE = "spi_mode"
 CONF_FORCE_SW = "force_sw"
 CONF_INTERFACE = "interface"
 CONF_INTERFACE_INDEX = "interface_index"
+TYPE_SINGLE = "single"
+TYPE_QUAD = "quad"
 
 # RP2040 SPI pin assignments are complicated;
 # refer to GPIO function select table in https://datasheets.raspberrypi.com/rp2040/rp2040-datasheet.pdf
@@ -297,18 +302,19 @@ SPI_QUAD_SCHEMA = cv.All(
             ),
         }
     ),
+    cv.only_on([PLATFORM_ESP32]),
     cv.only_with_esp_idf,
 )
 
 CONFIG_SCHEMA = cv.All(
-    # Order is important. SPI_SCHEMA is the default.
     cv.ensure_list(
-        cv.Any(
-            SPI_SCHEMA,
-            SPI_QUAD_SCHEMA,
-            msg="Standard SPI requires mosi_pin and/or miso_pin; quad SPI requires data_pins only."
-            + " A clock pin is always required",
-        ),
+        cv.typed_schema(
+            {
+                TYPE_SINGLE: SPI_SCHEMA,
+                TYPE_QUAD: SPI_QUAD_SCHEMA,
+            },
+            default_type=TYPE_SINGLE,
+        )
     ),
     validate_spi_config,
 )
diff --git a/tests/components/spi/test.esp32-s3-idf.yaml b/tests/components/spi/test.esp32-s3-idf.yaml
new file mode 100644
index 0000000000..3aae21cbeb
--- /dev/null
+++ b/tests/components/spi/test.esp32-s3-idf.yaml
@@ -0,0 +1,23 @@
+spi:
+  - id: spi_id_1
+    type: single
+    clk_pin:
+      number: GPIO7
+      allow_other_uses: false
+    mosi_pin: GPIO6
+    interface: hardware
+  - id: quad_spi
+    type: quad
+    clk_pin: 47
+    interface: spi3
+    data_pins:
+      - number: 40
+        allow_other_uses: false
+      - 41
+      - 42
+      - 43
+  - id: spi_id_3
+    clk_pin: 8
+    mosi_pin: 9
+    interface: any
+
diff --git a/tests/test8.1.yaml b/tests/test8.1.yaml
index fdfa8bc786..ab3d0d44aa 100644
--- a/tests/test8.1.yaml
+++ b/tests/test8.1.yaml
@@ -23,20 +23,12 @@ psram:
 
 spi:
   - id: spi_id_1
+    type: single
     clk_pin:
       number: GPIO7
       allow_other_uses: false
     mosi_pin: GPIO6
-    interface: any
-  - id: quad_spi
-    clk_pin: 47
-    data_pins:
-      - number: 40
-        allow_other_uses: false
-      - 41
-      - 42
-      - 43
-
+    interface: hardware
 spi_device:
   id: spidev
   data_rate: 2MHz