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Add PHY register writes to enable external clock on Ethernet with RTL8201 (#6704)
Co-authored-by: Jesse Hills <3060199+jesserockz@users.noreply.github.com>
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@ -184,6 +184,10 @@ void EthernetComponent::setup() {
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// KSZ8081RNA default is incorrect. It expects a 25MHz clock instead of the 50MHz we provide.
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this->ksz8081_set_clock_reference_(mac);
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}
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if (this->type_ == ETHERNET_TYPE_RTL8201 && this->clk_mode_ == EMAC_CLK_EXT_IN) {
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// Change in default behavior of RTL8201FI may require register setting to enable external clock
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this->rtl8201_set_rmii_mode_(mac);
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}
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#endif
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// use ESP internal eth mac
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@ -583,6 +587,46 @@ void EthernetComponent::ksz8081_set_clock_reference_(esp_eth_mac_t *mac) {
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ESP_LOGVV(TAG, "KSZ8081 PHY Control 2: %s", format_hex_pretty((u_int8_t *) &phy_control_2, 2).c_str());
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}
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}
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constexpr uint8_t RTL8201_RMSR_REG_ADDR = 0x10;
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void EthernetComponent::rtl8201_set_rmii_mode_(esp_eth_mac_t *mac) {
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esp_err_t err;
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uint32_t phy_rmii_mode;
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err = mac->write_phy_reg(mac, this->phy_addr_, 0x1f, 0x07);
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ESPHL_ERROR_CHECK(err, "Setting Page 7 failed");
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/*
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* RTL8201 RMII Mode Setting Register (RMSR)
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* Page 7 Register 16
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*
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* bit 0 Reserved 0
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* bit 1 Rg_rmii_rxdsel 1 (default)
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* bit 2 Rg_rmii_rxdv_sel: 0 (default)
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* bit 3 RMII Mode: 1 (RMII Mode)
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* bit 4~7 Rg_rmii_rx_offset: 1111 (default)
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* bit 8~11 Rg_rmii_tx_offset: 1111 (default)
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* bit 12 Rg_rmii_clkdir: 1 (Input)
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* bit 13~15 Reserved 000
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*
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* Binary: 0001 1111 1111 1010
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* Hex: 0x1FFA
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*
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*/
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err = mac->read_phy_reg(mac, this->phy_addr_, RTL8201_RMSR_REG_ADDR, &(phy_rmii_mode));
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ESPHL_ERROR_CHECK(err, "Read PHY RMSR Register failed");
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ESP_LOGV(TAG, "Hardware default RTL8201 RMII Mode Register is: 0x%04X", phy_rmii_mode);
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err = mac->write_phy_reg(mac, this->phy_addr_, RTL8201_RMSR_REG_ADDR, 0x1FFA);
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ESPHL_ERROR_CHECK(err, "Setting Register 16 RMII Mode Setting failed");
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err = mac->read_phy_reg(mac, this->phy_addr_, RTL8201_RMSR_REG_ADDR, &(phy_rmii_mode));
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ESPHL_ERROR_CHECK(err, "Read PHY RMSR Register failed");
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ESP_LOGV(TAG, "Setting RTL8201 RMII Mode Register to: 0x%04X", phy_rmii_mode);
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err = mac->write_phy_reg(mac, this->phy_addr_, 0x1f, 0x0);
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ESPHL_ERROR_CHECK(err, "Setting Page 0 failed");
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}
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#endif
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} // namespace ethernet
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@ -86,6 +86,8 @@ class EthernetComponent : public Component {
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void dump_connect_params_();
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/// @brief Set `RMII Reference Clock Select` bit for KSZ8081.
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void ksz8081_set_clock_reference_(esp_eth_mac_t *mac);
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/// @brief Set `RMII Mode Setting Register` for RTL8201.
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void rtl8201_set_rmii_mode_(esp_eth_mac_t *mac);
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std::string use_address_;
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#ifdef USE_ETHERNET_SPI
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