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Make i2s_audio bclk_pin optional (#4801)
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5099595aee
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@ -42,8 +42,8 @@ I2S_PORTS = {
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CONFIG_SCHEMA = cv.Schema(
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{
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cv.GenerateID(): cv.declare_id(I2SAudioComponent),
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cv.Required(CONF_I2S_BCLK_PIN): pins.internal_gpio_output_pin_number,
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cv.Required(CONF_I2S_LRCLK_PIN): pins.internal_gpio_output_pin_number,
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cv.Optional(CONF_I2S_BCLK_PIN): pins.internal_gpio_output_pin_number,
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}
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)
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@ -66,5 +66,6 @@ async def to_code(config):
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var = cg.new_Pvariable(config[CONF_ID])
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await cg.register_component(var, config)
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cg.add(var.set_bclk_pin(config[CONF_I2S_BCLK_PIN]))
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cg.add(var.set_lrclk_pin(config[CONF_I2S_LRCLK_PIN]))
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if CONF_I2S_BCLK_PIN in config:
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cg.add(var.set_bclk_pin(config[CONF_I2S_BCLK_PIN]))
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@ -29,8 +29,8 @@ class I2SAudioComponent : public Component {
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};
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}
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void set_bclk_pin(uint8_t pin) { this->bclk_pin_ = pin; }
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void set_lrclk_pin(uint8_t pin) { this->lrclk_pin_ = pin; }
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void set_bclk_pin(int pin) { this->bclk_pin_ = pin; }
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void set_lrclk_pin(int pin) { this->lrclk_pin_ = pin; }
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void lock() { this->lock_.lock(); }
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bool try_lock() { return this->lock_.try_lock(); }
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@ -41,8 +41,11 @@ class I2SAudioComponent : public Component {
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protected:
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Mutex lock_;
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uint8_t bclk_pin_;
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uint8_t lrclk_pin_;
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I2SAudioIn *audio_in_{nullptr};
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I2SAudioOut *audio_out_{nullptr};
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int bclk_pin_{I2S_PIN_NO_CHANGE};
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int lrclk_pin_;
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i2s_port_t port_{};
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};
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