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https://github.com/esphome/esphome.git
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[sn74hc595] Enforce type field to distinguish gpio vs spi mode (#6609)
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parent
7e5b100b77
commit
8cb809d84d
@ -4,14 +4,13 @@ from esphome import pins
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from esphome.components import spi
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from esphome.const import (
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CONF_ID,
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CONF_SPI_ID,
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CONF_NUMBER,
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CONF_INVERTED,
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CONF_DATA_PIN,
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CONF_CLOCK_PIN,
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CONF_OUTPUT,
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CONF_TYPE,
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)
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from esphome.core import EsphomeError
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MULTI_CONF = True
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@ -34,53 +33,53 @@ CONF_LATCH_PIN = "latch_pin"
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CONF_OE_PIN = "oe_pin"
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CONF_SR_COUNT = "sr_count"
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CONFIG_SCHEMA = cv.Any(
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cv.Schema(
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TYPE_GPIO = "gpio"
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TYPE_SPI = "spi"
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_COMMON_SCHEMA = cv.Schema(
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{
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cv.Required(CONF_ID): cv.declare_id(SN74HC595GPIOComponent),
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cv.Required(CONF_DATA_PIN): pins.gpio_output_pin_schema,
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cv.Required(CONF_CLOCK_PIN): pins.gpio_output_pin_schema,
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cv.Required(CONF_LATCH_PIN): pins.gpio_output_pin_schema,
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cv.Optional(CONF_OE_PIN): pins.gpio_output_pin_schema,
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cv.Optional(CONF_SR_COUNT, default=1): cv.int_range(min=1, max=256),
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}
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).extend(cv.COMPONENT_SCHEMA),
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cv.Schema(
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{
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cv.Required(CONF_ID): cv.declare_id(SN74HC595SPIComponent),
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cv.Required(CONF_LATCH_PIN): pins.gpio_output_pin_schema,
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cv.Optional(CONF_OE_PIN): pins.gpio_output_pin_schema,
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cv.Optional(CONF_SR_COUNT, default=1): cv.int_range(min=1, max=256),
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}
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)
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.extend(cv.COMPONENT_SCHEMA)
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.extend(spi.spi_device_schema(cs_pin_required=False))
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.extend(
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CONFIG_SCHEMA = cv.typed_schema(
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{
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cv.Required(CONF_SPI_ID): cv.use_id(spi.SPIComponent),
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TYPE_GPIO: _COMMON_SCHEMA.extend(
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{
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cv.Required(CONF_ID): cv.declare_id(SN74HC595GPIOComponent),
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cv.Required(CONF_DATA_PIN): pins.gpio_output_pin_schema,
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cv.Required(CONF_CLOCK_PIN): pins.gpio_output_pin_schema,
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}
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),
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msg='Either "data_pin" and "clock_pin" must be set or "spi_id" must be set.',
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).extend(cv.COMPONENT_SCHEMA),
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TYPE_SPI: _COMMON_SCHEMA.extend(
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{
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cv.Required(CONF_ID): cv.declare_id(SN74HC595SPIComponent),
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}
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)
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.extend(cv.COMPONENT_SCHEMA)
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.extend(spi.spi_device_schema(cs_pin_required=False)),
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},
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default_type=TYPE_GPIO,
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)
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async def to_code(config):
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var = cg.new_Pvariable(config[CONF_ID])
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await cg.register_component(var, config)
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if CONF_DATA_PIN in config:
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if config[CONF_TYPE] == TYPE_GPIO:
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data_pin = await cg.gpio_pin_expression(config[CONF_DATA_PIN])
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cg.add(var.set_data_pin(data_pin))
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clock_pin = await cg.gpio_pin_expression(config[CONF_CLOCK_PIN])
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cg.add(var.set_clock_pin(clock_pin))
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elif CONF_SPI_ID in config:
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await spi.register_spi_device(var, config)
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else:
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raise EsphomeError("Not supported")
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await spi.register_spi_device(var, config)
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latch_pin = await cg.gpio_pin_expression(config[CONF_LATCH_PIN])
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cg.add(var.set_latch_pin(latch_pin))
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if CONF_OE_PIN in config:
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oe_pin = await cg.gpio_pin_expression(config[CONF_OE_PIN])
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if oe_pin := config.get(CONF_OE_PIN):
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oe_pin = await cg.gpio_pin_expression(oe_pin)
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cg.add(var.set_oe_pin(oe_pin))
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cg.add(var.set_sr_count(config[CONF_SR_COUNT]))
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27
tests/components/sn74hc595/test.esp32-c3-idf.yaml
Normal file
27
tests/components/sn74hc595/test.esp32-c3-idf.yaml
Normal file
@ -0,0 +1,27 @@
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spi:
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- id: spi_sn74hc595
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clk_pin: 6
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mosi_pin: 7
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miso_pin: 5
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sn74hc595:
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- id: sn74hc595_hub
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clock_pin: 0
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data_pin: 1
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latch_pin: 2
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oe_pin: 3
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sr_count: 2
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- id: sn74hc595_hub_2
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latch_pin: 8
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oe_pin: 9
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spi_id: spi_sn74hc595
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type: spi
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sr_count: 2
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switch:
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- platform: gpio
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name: SN74HC595 Pin 0
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pin:
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sn74hc595: sn74hc595_hub_2
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number: 0
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inverted: false
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27
tests/components/sn74hc595/test.esp32-c3.yaml
Normal file
27
tests/components/sn74hc595/test.esp32-c3.yaml
Normal file
@ -0,0 +1,27 @@
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spi:
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- id: spi_sn74hc595
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clk_pin: 6
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mosi_pin: 7
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miso_pin: 5
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sn74hc595:
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- id: sn74hc595_hub
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clock_pin: 0
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data_pin: 1
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latch_pin: 2
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oe_pin: 3
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sr_count: 2
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- id: sn74hc595_hub_2
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latch_pin: 8
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oe_pin: 9
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spi_id: spi_sn74hc595
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type: spi
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sr_count: 2
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switch:
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- platform: gpio
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name: SN74HC595 Pin 0
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pin:
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sn74hc595: sn74hc595_hub_2
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number: 0
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inverted: false
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27
tests/components/sn74hc595/test.esp32-idf.yaml
Normal file
27
tests/components/sn74hc595/test.esp32-idf.yaml
Normal file
@ -0,0 +1,27 @@
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spi:
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- id: spi_sn74hc595
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clk_pin: 16
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mosi_pin: 17
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miso_pin: 15
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sn74hc595:
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- id: sn74hc595_hub
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clock_pin: 12
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data_pin: 13
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latch_pin: 14
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oe_pin: 18
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sr_count: 2
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- id: sn74hc595_hub_2
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latch_pin: 21
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oe_pin: 22
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spi_id: spi_sn74hc595
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type: spi
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sr_count: 2
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switch:
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- platform: gpio
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name: SN74HC595 Pin 0
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pin:
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sn74hc595: sn74hc595_hub_2
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number: 0
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inverted: false
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27
tests/components/sn74hc595/test.esp32.yaml
Normal file
27
tests/components/sn74hc595/test.esp32.yaml
Normal file
@ -0,0 +1,27 @@
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spi:
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- id: spi_sn74hc595
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clk_pin: 16
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mosi_pin: 17
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miso_pin: 15
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sn74hc595:
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- id: sn74hc595_hub
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clock_pin: 12
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data_pin: 13
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latch_pin: 14
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oe_pin: 18
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sr_count: 2
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- id: sn74hc595_hub_2
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latch_pin: 21
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oe_pin: 22
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spi_id: spi_sn74hc595
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type: spi
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sr_count: 2
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switch:
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- platform: gpio
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name: SN74HC595 Pin 0
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pin:
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sn74hc595: sn74hc595_hub_2
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number: 0
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inverted: false
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27
tests/components/sn74hc595/test.esp8266.yaml
Normal file
27
tests/components/sn74hc595/test.esp8266.yaml
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@ -0,0 +1,27 @@
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spi:
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- id: spi_sn74hc595
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clk_pin: 14
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mosi_pin: 13
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miso_pin: 12
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sn74hc595:
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- id: sn74hc595_hub
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clock_pin: 0
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data_pin: 2
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latch_pin: 4
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oe_pin: 5
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sr_count: 2
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- id: sn74hc595_hub_2
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latch_pin: 15
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oe_pin: 16
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spi_id: spi_sn74hc595
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type: spi
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sr_count: 2
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switch:
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- platform: gpio
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name: SN74HC595 Pin 0
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pin:
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sn74hc595: sn74hc595_hub_2
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number: 0
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inverted: false
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27
tests/components/sn74hc595/test.rp2040.yaml
Normal file
27
tests/components/sn74hc595/test.rp2040.yaml
Normal file
@ -0,0 +1,27 @@
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spi:
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- id: spi_sn74hc595
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clk_pin: 6
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mosi_pin: 5
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miso_pin: 4
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sn74hc595:
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- id: sn74hc595_hub
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clock_pin: 0
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data_pin: 1
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latch_pin: 2
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oe_pin: 3
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sr_count: 2
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- id: sn74hc595_hub_2
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latch_pin: 8
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oe_pin: 9
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spi_id: spi_sn74hc595
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type: spi
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sr_count: 2
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switch:
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- platform: gpio
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name: SN74HC595 Pin 0
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pin:
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sn74hc595: sn74hc595_hub_2
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number: 0
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inverted: false
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@ -3996,6 +3996,7 @@ sn74hc595:
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number: GPIO32
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sr_count: 2
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spi_id: spi_bus
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type: spi
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rtttl:
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output: gpio_19
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