mirror of
https://github.com/Fohdeesha/lab-docu.git
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269 lines
9.0 KiB
C
269 lines
9.0 KiB
C
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/* FILE: sym_dmi.h - MPT/Fusion Driver IOCTL Support header file
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*
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*************************************************************************
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* *
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* Copyright 2001 LSI Logic. All rights reserved. *
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* *
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* This file is confidential and a trade secret of LSI Logic. *
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* The receipt of or possession of this file does not convey any *
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* rights to reproduce or disclose its contents or to manufacture, *
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* use, or sell anything is may describe, in whole, or in part, *
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* without the specific written consent of LSI Logic. *
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* *
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************************************************************************/
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/*+++HDR
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*
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* Version History
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* ---------------
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*
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* Date Who? Description
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* -------- ---- -------------------------------------------------------
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* 03/20/00 SAM Initial version
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* 02/14/01 SCH Added Domain Validation
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* 05/14/01 SCH Added MPI Event logging
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* 07/09/01 SCH Changed MAX_VERSION_STRING from 80 to 32
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* 01/02/02 SCH Added MPI diagnostic reset IOCTL
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* 10/30/03 SCH Added InBand IOCTL support
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* 03/24/04 BJH Added Diagnostic IOCTL support
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* 09/10/08 SCH Added ADAPTER_TYPE_SAS2 define
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* 10/20/08 SCH Modified diag buffer structures for Gen2
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---*/
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#ifndef SYM_DMI_H
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#define SYM_DMI_H
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#define VERSION_SIZE 4
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#define MAX_VERSION_STRING 32
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// support for MPI messages via an application or service IOCTL
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#define MPI_MSG_IOCTL 0x806D7069 // mpi
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#define DATA_FROM_APP 0x01
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#define SCSI_IO 0x4000
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#define DUAL_SGLS 0x8000
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typedef struct _IOCTL_DETAILS {
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U16 Dir; // data xfer direction
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U16 MsgSize; // size in 32 bit words
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U32 DataSize; // data xfer size in bytes
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U32 FormattedMsg[1];
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} IOCTL_DETAILS, *pIOCTL_DETAILS;
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// support for host driver info / MPI event logging IOCTL
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#define DRVR_INFO_IOCTL 0x8043494D // CIM
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/* Adapter Types */
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#define ADAPTER_TYPE_SCSI 0
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#define ADAPTER_TYPE_SCSI_OVER_FC 1
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#define ADAPTER_TYPE_IP_OVER_FC 2
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#define ADAPTER_TYPE_SAS 3
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#define ADAPTER_TYPE_SAS2 4
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/* Page Codes */
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#define ADAPTER_INFO_PAGE 1
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#define PCI_CONFIG_SPACE_PAGE 3
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#define EVENT_QUERY 10
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#define EVENT_ENABLE 11
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#define GET_EVENTS 12
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/* Event Queue Defines */
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#define EVENT_QUEUE_SIZE 50
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#define MAX_EVENT_DATA_LENGTH 48
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// structure to hold PCI bus/device/function information
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typedef struct _MPI_PCI_INFO {
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union {
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struct {
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ULONG DeviceNumber:5;
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ULONG FunctionNumber:3;
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ULONG BusNumber:24;
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} bits;
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ULONG AsULONG;
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} u;
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} MPI_PCI_INFO, *PMPI_PCI_INFO;
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// Adapter Info structure
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typedef struct _DRVR_ADAPTER_INFO_OUT
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{
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int AdapterType;
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int MpiPortNumber;
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int PciDeviceId;
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int PciDeviceHwRev;
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int SubSystem;
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int SubSystemVendorId;
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int NumDevicesAttached;
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int MpiVersion;
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U32 BiosVersion;
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char DriverVersion[MAX_VERSION_STRING];
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BOOLEAN BusChangeEvent;
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U8 HostId;
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U16 Reserved1;
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MPI_PCI_INFO PciInfo;
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U32 PciSegmentId;
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} DRVR_ADAPTER_INFO_OUT, *PTR_DRVR_ADAPTER_INFO_OUT;
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typedef struct _DRVR_INFO_SRB
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{
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SRB_IO_CONTROL Sic;
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int PageCode; // [IN]
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char PageVersion[VERSION_SIZE]; // [OUT]
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DRVR_ADAPTER_INFO_OUT AdapterPageOut;
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} DRVR_INFO_SRB, *PTR_DRVR_INFO_SRB;
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typedef struct _PCI_CONFIG_SPACE_SRB
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{
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SRB_IO_CONTROL Sic;
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int PageCode; // [IN]
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char PageVersion[VERSION_SIZE]; // [OUT]
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U32 reserved[3];
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U8 PciConfigSpace[256];
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} PCI_CONFIG_SPACE_SRB, *PTR_PCI_CONFIG_SPACE_SRB;
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// support for MPI Event Queue
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typedef struct _MPI_EVENTS_SRB
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{
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SRB_IO_CONTROL Sic;
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int PageCode; // [IN]
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char PageVersion[VERSION_SIZE]; // [OUT]
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U32 EventData[1]; // page code dependent
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} MPI_EVENTS_SRB, *PTR_MPI_EVENTS_SRB;
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typedef struct _MPI_EVENTS_QUEUE
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{
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U32 EventType; // from reply frame
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U32 EventNumber; // from DevExt->EventNum
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U32 EventData[MAX_EVENT_DATA_LENGTH]; // from reply frame
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} MPI_EVENTS_QUEUE, *PTR_MPI_EVENTS_QUEUE;
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// support for MPI Diagnostic Reset IOCTL
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#define MPI_DIAG_RESET 0x80727374 // rst
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typedef struct _MPI_DIAG_RESET_SRB
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{
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SRB_IO_CONTROL Sic;
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U32 NewImageSize; // replacement image size
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U32 NewFWImage[1]; // new FW image to save
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} MPI_DIAG_RESET_SRB, *PTR_MPI_DIAG_RESET_SRB;
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// A NewImageSize of 0 indicates that no new FW image is being downloaded
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// MPI register reae/write access IOCTL
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#define MPI_REG_ACCESS 0x80771959 // magic number
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#define REG_IO_READ 1
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#define REG_IO_WRITE 2
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#define REG_MEM_READ 3
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#define REG_MEM_WRITE 4
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typedef struct _MPI_REG_ACCESS_SRB
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{
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SRB_IO_CONTROL Sic;
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U32 Command; // command (read/write)
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U32 RegOffset; // register offset
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U32 RegData; // register data
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} MPI_REG_ACCESS_SRB, *PTR_MPI_REG_ACCESS_SRB;
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// support for bus/target - DevHandle mapping IOCTL
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// application can suppy bus/target and get devHandle or
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// supply devHandle and get bus/target
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#define MPI_BTDH_MAPPING 0x804D4150 // MAP
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typedef struct _MPI_BTDH_MAP_SRB
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{
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SRB_IO_CONTROL Sic;
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U32 TargetID; // target ID
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U32 Bus; // bus
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U16 DevHandle; // device handle
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U16 Reserved;
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} MPI_BTDH_MAP_SRB, *PTR_MPI_BTDH_MAP_SRB;
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#define MPI_FW_DIAG_IOCTL (0x80646961) // dia
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#define MPI_FW_DIAG_NEW (0x806E6577) // new
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#define MPI_FW_DIAG_TYPE_REGISTER (0x00000001)
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#define MPI_FW_DIAG_TYPE_UNREGISTER (0x00000002)
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#define MPI_FW_DIAG_TYPE_QUERY (0x00000003)
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#define MPI_FW_DIAG_TYPE_READ_BUFFER (0x00000004)
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#define MPI_FW_DIAG_TYPE_RELEASE (0x00000005)
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#define MPI_FW_DIAG_INVALID_UID (0x00000000)
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#define FW_DIAGNOSTIC_BUFFER_COUNT (3)
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#define FW_DIAGNOSTIC_UID_NOT_FOUND (0xFF)
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#define MPI_FW_DIAG_ERROR_SUCCESS (0x00000000)
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#define MPI_FW_DIAG_ERROR_FAILURE (0x00000001)
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#define MPI_FW_DIAG_ERROR_INVALID_PARAMETER (0x00000003)
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#define MPI_FW_DIAG_ERROR_POST_FAILED (0x00000010)
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#define MPI_FW_DIAG_ERROR_INVALID_UID (0x00000011)
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#define MPI_FW_DIAG_ERROR_RELEASE_FAILED (0x00000012)
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#define MPI_FW_DIAG_ERROR_NO_BUFFER (0x00000013)
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#define MPI_FW_DIAG_ERROR_ALREADY_RELEASED (0x00000014)
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typedef struct _MPI_FW_DIAG_IOCTL_SRB
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{
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SRB_IO_CONTROL Sic;
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U32 MpiDiagType;
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U8 PageVersion[4];
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U32 MpiDiagData[1];
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} MPI_FW_DIAG_IOCTL_SRB, *PTR_MPI_FW_DIAG_IOCTL_SRB;
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/* diag register for gen 1 */
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typedef struct _MPI_FW_DIAG_REGISTER
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{
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U8 TraceLevel;
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U8 BufferType;
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U16 Flags;
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U32 ExtendedType;
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U32 ProductSpecific[4];
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U32 RequestedBufferSize;
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U32 UniqueId;
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} MPI_FW_DIAG_REGISTER, *PTR_MPI_FW_DIAG_REGISTER;
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typedef struct _MPI_FW_DIAG_UNREGISTER
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{
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U32 UniqueId;
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} MPI_FW_DIAG_UNREGISTER, *PTR_MPI_FW_DIAG_UNREGISTER;
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#define MPI_FW_DIAG_FLAG_APP_OWNED (0x0001)
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#define MPI_FW_DIAG_FLAG_BUFFER_VALID (0x0002)
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#define MPI_FW_DIAG_FLAG_FW_BUFFER_ACCESS (0x0004)
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/* diag query for gen 1 */
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typedef struct _MPI_FW_DIAG_QUERY
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{
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U8 TraceLevel;
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U8 BufferType;
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U16 Flags;
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U32 ExtendedType;
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U32 ProductSpecific[4];
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U32 TotalBufferSize;
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U32 DriverAddedBufferSize;
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U32 UniqueId;
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} MPI_FW_DIAG_QUERY, *PTR_MPI_FW_DIAG_QUERY;
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typedef struct _MPI_FW_DIAG_RELEASE
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{
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U32 UniqueId;
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} MPI_FW_DIAG_RELEASE, *PTR_MPI_FW_DIAG_RELEASE;
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#define MPI_FW_DIAG_FLAG_REREGISTER (0x0001)
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#define MPI_FW_DIAG_FLAG_FORCE_RELEASE (0x0002)
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typedef struct _MPI_FW_DIAG_READ_BUFFER
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{
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U8 Status;
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U8 Reserved;
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U16 Flags;
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U32 StartingOffset;
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U32 BytesToRead;
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U32 UniqueId;
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U32 DataBuffer[1];
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} MPI_FW_DIAG_READ_BUFFER, *PTR_MPI_FW_DIAG_READ_BUFFER;
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#endif
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